提交 a8dc7cb3 编写于 作者: D Dave Gerlach 提交者: Tony Lindgren

Revert "ARM: dts: dra7: Move to operating-points-v2 table"

This reverts commit f80bc97f.

The original commit updated the cpufreq operating points tables for
dra7xx but was merged before the driver making use of the node was
merged, which breaks the existing cpufreq implementation on the system,
so revert the patch until the ti-cpufreq driver is merged.
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
上级 0f416d13
......@@ -82,9 +82,11 @@
compatible = "arm,cortex-a15";
reg = <0>;
operating-points-v2 = <&cpu0_opp_table>;
ti,syscon-efuse = <&scm_wkup 0x20c 0xf80000 19>;
ti,syscon-rev = <&scm_wkup 0x204>;
operating-points = <
/* kHz uV */
1000000 1060000
1176000 1160000
>;
clocks = <&dpll_mpu_ck>;
clock-names = "cpu";
......@@ -98,24 +100,6 @@
};
};
cpu0_opp_table: opp_table0 {
compatible = "operating-points-v2";
opp-shared;
opp_nom@1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1060000 850000 1150000>;
opp-supported-hw = <0xFF 0x01>;
opp-suspend;
};
opp_od@1176000000 {
opp-hz = /bits/ 64 <1176000000>;
opp-microvolt = <1160000 885000 1160000>;
opp-supported-hw = <0xFF 0x02>;
};
};
/*
* The soc node represents the soc top level view. It is used for IPs
* that are not memory mapped in the MPU view or for the MPU itself.
......
......@@ -17,7 +17,6 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <1>;
operating-points-v2 = <&cpu0_opp_table>;
};
};
......
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