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kernel_linux
提交 a50d0796 编写于 作者: M Matt Carlson 提交者： David S. Miller
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操作

tg3: Add 5719 ASIC rev 

This patch adds the 5719 ASIC revision.
Signed-off-by: NMatt Carlson <mcarlson@broadcom.com>
Signed-off-by: NMichael Chan <mchan@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
上级 9c7df915
隐藏空白更改
内联 并排
Showing with 52 addition and 18 deletion
drivers/net/tg3.c
浏览文件 @ a50d0796
...@@ -1084,7 +1084,8 @@ static int tg3_mdio_init(struct tg3 *tp) ...@@ -1084,7 +1084,8 @@ static int tg3_mdio_init(struct tg3 *tp)
u32 reg; u32 reg;
struct phy_device *phydev; struct phy_device *phydev;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) { if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) {
u32 is_serdes; u32 is_serdes;
tp->phy_addr = PCI_FUNC(tp->pdev->devfn) + 1; tp->phy_addr = PCI_FUNC(tp->pdev->devfn) + 1;
...@@ -1600,7 +1601,8 @@ static void tg3_phy_toggle_apd(struct tg3 *tp, bool enable) ...@@ -1600,7 +1601,8 @@ static void tg3_phy_toggle_apd(struct tg3 *tp, bool enable)
u32 reg; u32 reg;
if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) || if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ||
(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 && ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) &&
(tp->tg3_flags2 & TG3_FLG2_MII_SERDES))) (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)))
return; return;
...@@ -1975,7 +1977,8 @@ static int tg3_phy_reset(struct tg3 *tp) ...@@ -1975,7 +1977,8 @@ static int tg3_phy_reset(struct tg3 *tp)
} }
} }
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 && if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) &&
(tp->tg3_flags2 & TG3_FLG2_MII_SERDES)) (tp->tg3_flags2 & TG3_FLG2_MII_SERDES))
return 0; return 0;
...@@ -2060,6 +2063,7 @@ static void tg3_frob_aux_power(struct tg3 *tp) ...@@ -2060,6 +2063,7 @@ static void tg3_frob_aux_power(struct tg3 *tp)
/* The GPIOs do something completely different on 57765. */ /* The GPIOs do something completely different on 57765. */
if ((tp->tg3_flags2 & TG3_FLG2_IS_NIC) == 0 || if ((tp->tg3_flags2 & TG3_FLG2_IS_NIC) == 0 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
return; return;
...@@ -7083,6 +7087,7 @@ static int tg3_chip_reset(struct tg3 *tp) ...@@ -7083,6 +7087,7 @@ static int tg3_chip_reset(struct tg3 *tp)
tp->pci_chip_rev_id != CHIPREV_ID_5750_A0 && tp->pci_chip_rev_id != CHIPREV_ID_5750_A0 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 && GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 && GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) { GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) {
val = tr32(0x7c00); val = tr32(0x7c00);
...@@ -7518,7 +7523,8 @@ static void tg3_rings_reset(struct tg3 *tp) ...@@ -7518,7 +7523,8 @@ static void tg3_rings_reset(struct tg3 *tp)
/* Disable all receive return rings but the first. */ /* Disable all receive return rings but the first. */
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 17; limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 17;
else if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) else if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 16; limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 16;
...@@ -7756,6 +7762,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) ...@@ -7756,6 +7762,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
return err; return err;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) { GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
val = tr32(TG3PCI_DMA_RW_CTRL) & val = tr32(TG3PCI_DMA_RW_CTRL) &
~DMA_RWCTRL_DIS_CACHE_ALIGNMENT; ~DMA_RWCTRL_DIS_CACHE_ALIGNMENT;
...@@ -7884,7 +7891,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) ...@@ -7884,7 +7891,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
((u64) tpr->rx_std_mapping >> 32)); ((u64) tpr->rx_std_mapping >> 32));
tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW, tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW,
((u64) tpr->rx_std_mapping & 0xffffffff)); ((u64) tpr->rx_std_mapping & 0xffffffff));
if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717) if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719)
tw32(RCVDBDI_STD_BD + TG3_BDINFO_NIC_ADDR, tw32(RCVDBDI_STD_BD + TG3_BDINFO_NIC_ADDR,
NIC_SRAM_RX_BUFFER_DESC); NIC_SRAM_RX_BUFFER_DESC);
...@@ -7909,7 +7917,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) ...@@ -7909,7 +7917,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_MAXLEN_FLAGS, tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_MAXLEN_FLAGS,
(RX_JUMBO_MAX_SIZE << BDINFO_FLAGS_MAXLEN_SHIFT) | (RX_JUMBO_MAX_SIZE << BDINFO_FLAGS_MAXLEN_SHIFT) |
BDINFO_FLAGS_USE_EXT_RECV); BDINFO_FLAGS_USE_EXT_RECV);
if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717) if (!(tp->tg3_flags3 & TG3_FLG3_USE_JUMBO_BDFLAG) ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_NIC_ADDR, tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_NIC_ADDR,
NIC_SRAM_RX_JUMBO_BUFFER_DESC); NIC_SRAM_RX_JUMBO_BUFFER_DESC);
} else { } else {
...@@ -7918,6 +7927,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) ...@@ -7918,6 +7927,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
} }
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
val = (RX_STD_MAX_SIZE_5705 << BDINFO_FLAGS_MAXLEN_SHIFT) | val = (RX_STD_MAX_SIZE_5705 << BDINFO_FLAGS_MAXLEN_SHIFT) |
(TG3_RX_STD_DMA_SZ << 2); (TG3_RX_STD_DMA_SZ << 2);
...@@ -7936,6 +7946,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) ...@@ -7936,6 +7946,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG, tpr->rx_jmb_prod_idx); tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG, tpr->rx_jmb_prod_idx);
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) { GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
tw32(STD_REPLENISH_LWM, 32); tw32(STD_REPLENISH_LWM, 32);
tw32(JMB_REPLENISH_LWM, 16); tw32(JMB_REPLENISH_LWM, 16);
...@@ -7971,7 +7982,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) ...@@ -7971,7 +7982,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
RDMAC_MODE_FIFOURUN_ENAB | RDMAC_MODE_FIFOOREAD_ENAB | RDMAC_MODE_FIFOURUN_ENAB | RDMAC_MODE_FIFOOREAD_ENAB |
RDMAC_MODE_LNGREAD_ENAB); RDMAC_MODE_LNGREAD_ENAB);
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
rdmac_mode |= RDMAC_MODE_MULT_DMA_RD_DIS; rdmac_mode |= RDMAC_MODE_MULT_DMA_RD_DIS;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 || if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
...@@ -8626,6 +8638,7 @@ static int tg3_test_interrupt(struct tg3 *tp) ...@@ -8626,6 +8638,7 @@ static int tg3_test_interrupt(struct tg3 *tp)
* observable way to know whether the interrupt was delivered. * observable way to know whether the interrupt was delivered.
*/ */
if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) && GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) &&
(tp->tg3_flags2 & TG3_FLG2_USING_MSI)) { (tp->tg3_flags2 & TG3_FLG2_USING_MSI)) {
val = tr32(MSGINT_MODE) | MSGINT_MODE_ONE_SHOT_DISABLE; val = tr32(MSGINT_MODE) | MSGINT_MODE_ONE_SHOT_DISABLE;
...@@ -8670,6 +8683,7 @@ static int tg3_test_interrupt(struct tg3 *tp) ...@@ -8670,6 +8683,7 @@ static int tg3_test_interrupt(struct tg3 *tp)
if (intr_ok) { if (intr_ok) {
/* Reenable MSI one shot mode. */ /* Reenable MSI one shot mode. */
if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) && GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) &&
(tp->tg3_flags2 & TG3_FLG2_USING_MSI)) { (tp->tg3_flags2 & TG3_FLG2_USING_MSI)) {
val = tr32(MSGINT_MODE) & ~MSGINT_MODE_ONE_SHOT_DISABLE; val = tr32(MSGINT_MODE) & ~MSGINT_MODE_ONE_SHOT_DISABLE;
...@@ -8812,7 +8826,8 @@ static bool tg3_enable_msix(struct tg3 *tp) ...@@ -8812,7 +8826,8 @@ static bool tg3_enable_msix(struct tg3 *tp)
if (tp->irq_cnt > 1) { if (tp->irq_cnt > 1) {
tp->tg3_flags3 |= TG3_FLG3_ENABLE_RSS; tp->tg3_flags3 |= TG3_FLG3_ENABLE_RSS;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) { if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) {
tp->tg3_flags3 |= TG3_FLG3_ENABLE_TSS; tp->tg3_flags3 |= TG3_FLG3_ENABLE_TSS;
tp->dev->real_num_tx_queues = tp->irq_cnt - 1; tp->dev->real_num_tx_queues = tp->irq_cnt - 1;
} }
...@@ -8965,6 +8980,7 @@ static int tg3_open(struct net_device *dev) ...@@ -8965,6 +8980,7 @@ static int tg3_open(struct net_device *dev)
} }
if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 && if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765 && GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765 &&
(tp->tg3_flags2 & TG3_FLG2_USING_MSI) && (tp->tg3_flags2 & TG3_FLG2_USING_MSI) &&
(tp->tg3_flags2 & TG3_FLG2_1SHOT_MSI)) { (tp->tg3_flags2 & TG3_FLG2_1SHOT_MSI)) {
...@@ -10576,7 +10592,8 @@ static int tg3_test_memory(struct tg3 *tp) ...@@ -10576,7 +10592,8 @@ static int tg3_test_memory(struct tg3 *tp)
int err = 0; int err = 0;
int i; int i;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
mem_tbl = mem_tbl_5717; mem_tbl = mem_tbl_5717;
else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
mem_tbl = mem_tbl_57765; mem_tbl = mem_tbl_57765;
...@@ -11656,7 +11673,8 @@ static void __devinit tg3_nvram_init(struct tg3 *tp) ...@@ -11656,7 +11673,8 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 || else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
tg3_get_57780_nvram_info(tp); tg3_get_57780_nvram_info(tp);
else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
tg3_get_5717_nvram_info(tp); tg3_get_5717_nvram_info(tp);
else else
tg3_get_nvram_info(tp); tg3_get_nvram_info(tp);
...@@ -12092,11 +12110,10 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp) ...@@ -12092,11 +12110,10 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
tp->phy_id = eeprom_phy_id; tp->phy_id = eeprom_phy_id;
if (eeprom_phy_serdes) { if (eeprom_phy_serdes) {
if ((tp->tg3_flags2 & TG3_FLG2_5780_CLASS) || if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
tp->tg3_flags2 |= TG3_FLG2_MII_SERDES;
else
tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES; tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES;
else
tp->tg3_flags2 |= TG3_FLG2_MII_SERDES;
} }
if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)
...@@ -12826,7 +12843,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) ...@@ -12826,7 +12843,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717 || if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717 ||
tp->pdev->device == TG3PCI_DEVICE_TIGON3_5718 || tp->pdev->device == TG3PCI_DEVICE_TIGON3_5718 ||
tp->pdev->device == TG3PCI_DEVICE_TIGON3_5724) tp->pdev->device == TG3PCI_DEVICE_TIGON3_5724 ||
tp->pdev->device == TG3PCI_DEVICE_TIGON3_5719)
pci_read_config_dword(tp->pdev, pci_read_config_dword(tp->pdev,
TG3PCI_GEN2_PRODID_ASICREV, TG3PCI_GEN2_PRODID_ASICREV,
&prod_id_asic_rev); &prod_id_asic_rev);
...@@ -12992,6 +13010,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) ...@@ -12992,6 +13010,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 || GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 || GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
tp->tg3_flags3 |= TG3_FLG3_5755_PLUS; tp->tg3_flags3 |= TG3_FLG3_5755_PLUS;
...@@ -13021,6 +13040,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) ...@@ -13021,6 +13040,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
/* Determine TSO capabilities */ /* Determine TSO capabilities */
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
tp->tg3_flags2 |= TG3_FLG2_HW_TSO_3; tp->tg3_flags2 |= TG3_FLG2_HW_TSO_3;
else if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) || else if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) ||
...@@ -13058,6 +13078,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) ...@@ -13058,6 +13078,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
} }
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) { GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
tp->tg3_flags |= TG3_FLAG_SUPPORT_MSIX; tp->tg3_flags |= TG3_FLAG_SUPPORT_MSIX;
tp->irq_max = TG3_IRQ_MAX_VECS; tp->irq_max = TG3_IRQ_MAX_VECS;
...@@ -13065,6 +13086,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) ...@@ -13065,6 +13086,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
} }
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
tp->tg3_flags3 |= TG3_FLG3_SHORT_DMA_BUG; tp->tg3_flags3 |= TG3_FLG3_SHORT_DMA_BUG;
else if (!(tp->tg3_flags3 & TG3_FLG3_5755_PLUS)) { else if (!(tp->tg3_flags3 & TG3_FLG3_5755_PLUS)) {
...@@ -13073,6 +13095,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) ...@@ -13073,6 +13095,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
} }
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
tp->tg3_flags3 |= TG3_FLG3_USE_JUMBO_BDFLAG; tp->tg3_flags3 |= TG3_FLG3_USE_JUMBO_BDFLAG;
...@@ -13275,6 +13298,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) ...@@ -13275,6 +13298,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 || GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 || GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
tp->tg3_flags |= TG3_FLAG_CPMU_PRESENT; tp->tg3_flags |= TG3_FLAG_CPMU_PRESENT;
...@@ -13355,6 +13379,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) ...@@ -13355,6 +13379,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 && GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57780 && GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57780 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 && GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) { GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) {
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 || GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
...@@ -13603,9 +13628,12 @@ static int __devinit tg3_get_device_address(struct tg3 *tp) ...@@ -13603,9 +13628,12 @@ static int __devinit tg3_get_device_address(struct tg3 *tp)
tw32_f(NVRAM_CMD, NVRAM_CMD_RESET); tw32_f(NVRAM_CMD, NVRAM_CMD_RESET);
else else
tg3_nvram_unlock(tp); tg3_nvram_unlock(tp);
} else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) { } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
if (PCI_FUNC(tp->pdev->devfn)) GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) {
if (PCI_FUNC(tp->pdev->devfn) & 1)
mac_offset = 0xcc; mac_offset = 0xcc;
if (PCI_FUNC(tp->pdev->devfn) > 1)
mac_offset += 0x18c;
} else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
mac_offset = 0x10; mac_offset = 0x10;
...@@ -13691,6 +13719,7 @@ static u32 __devinit tg3_calc_dma_bndry(struct tg3 *tp, u32 val) ...@@ -13691,6 +13719,7 @@ static u32 __devinit tg3_calc_dma_bndry(struct tg3 *tp, u32 val)
#endif #endif
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) { GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
val = goal ? 0 : DMA_RWCTRL_DIS_CACHE_ALIGNMENT; val = goal ? 0 : DMA_RWCTRL_DIS_CACHE_ALIGNMENT;
goto out; goto out;
...@@ -13903,6 +13932,7 @@ static int __devinit tg3_test_dma(struct tg3 *tp) ...@@ -13903,6 +13932,7 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
tp->dma_rwctrl = tg3_calc_dma_bndry(tp, tp->dma_rwctrl); tp->dma_rwctrl = tg3_calc_dma_bndry(tp, tp->dma_rwctrl);
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
goto out; goto out;
...@@ -14102,6 +14132,7 @@ static void __devinit tg3_init_link_config(struct tg3 *tp) ...@@ -14102,6 +14132,7 @@ static void __devinit tg3_init_link_config(struct tg3 *tp)
static void __devinit tg3_init_bufmgr_config(struct tg3 *tp) static void __devinit tg3_init_bufmgr_config(struct tg3 *tp)
{ {
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) { GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
tp->bufmgr_config.mbuf_read_dma_low_water = tp->bufmgr_config.mbuf_read_dma_low_water =
DEFAULT_MB_RDMA_LOW_WATER_5705; DEFAULT_MB_RDMA_LOW_WATER_5705;
...@@ -14427,7 +14458,8 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, ...@@ -14427,7 +14458,8 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
} }
if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) && if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) &&
tp->pci_chip_rev_id != CHIPREV_ID_5717_A0) tp->pci_chip_rev_id != CHIPREV_ID_5717_A0 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719)
dev->netdev_ops = &tg3_netdev_ops; dev->netdev_ops = &tg3_netdev_ops;
else else
dev->netdev_ops = &tg3_netdev_ops_dma_bug; dev->netdev_ops = &tg3_netdev_ops_dma_bug;
......
drivers/net/tg3.h
浏览文件 @ a50d0796
...@@ -53,6 +53,7 @@ ...@@ -53,6 +53,7 @@
#define TG3PCI_DEVICE_TIGON3_57765 0x16b4 #define TG3PCI_DEVICE_TIGON3_57765 0x16b4
#define TG3PCI_DEVICE_TIGON3_57791 0x16b2 #define TG3PCI_DEVICE_TIGON3_57791 0x16b2
#define TG3PCI_DEVICE_TIGON3_57795 0x16b6 #define TG3PCI_DEVICE_TIGON3_57795 0x16b6
#define TG3PCI_DEVICE_TIGON3_5719 0x1657
/* 0x04 --> 0x2c unused */ /* 0x04 --> 0x2c unused */
#define TG3PCI_SUBVENDOR_ID_BROADCOM PCI_VENDOR_ID_BROADCOM #define TG3PCI_SUBVENDOR_ID_BROADCOM PCI_VENDOR_ID_BROADCOM
#define TG3PCI_SUBDEVICE_ID_BROADCOM_95700A6 0x1644 #define TG3PCI_SUBDEVICE_ID_BROADCOM_95700A6 0x1644
...@@ -160,6 +161,7 @@ ...@@ -160,6 +161,7 @@
#define ASIC_REV_57780 0x57780 #define ASIC_REV_57780 0x57780
#define ASIC_REV_5717 0x5717 #define ASIC_REV_5717 0x5717
#define ASIC_REV_57765 0x57785 #define ASIC_REV_57765 0x57785
#define ASIC_REV_5719 0x5719
#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8) #define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
#define CHIPREV_5700_AX 0x70 #define CHIPREV_5700_AX 0x70
#define CHIPREV_5700_BX 0x71 #define CHIPREV_5700_BX 0x71
......
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