“e64ca97fd80a129e538ca42d0b12c379746b83db”上不存在“arch/arm/include/asm/fcntl.h”
提交 95fb6144 编写于 作者: D Dan Carpenter 提交者: David Woodhouse

iommu/vt-d: shift wrapping bug in prq_event_thread()

The "req->addr" variable is a bit field declared as "u64 addr:52;".
The "address" variable is a u64.  We need to cast "req->addr" to a u64
before the shift or the result is truncated to 52 bits.

Fixes: a222a7f0 ('iommu/vt-d: Implement page request handling')
Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
上级 26322ab5
...@@ -490,7 +490,7 @@ static irqreturn_t prq_event_thread(int irq, void *d) ...@@ -490,7 +490,7 @@ static irqreturn_t prq_event_thread(int irq, void *d)
req = &iommu->prq[head / sizeof(*req)]; req = &iommu->prq[head / sizeof(*req)];
result = QI_RESP_FAILURE; result = QI_RESP_FAILURE;
address = req->addr << PAGE_SHIFT; address = (u64)req->addr << PAGE_SHIFT;
if (!req->pasid_present) { if (!req->pasid_present) {
pr_err("%s: Page request without PASID: %08llx %08llx\n", pr_err("%s: Page request without PASID: %08llx %08llx\n",
iommu->name, ((unsigned long long *)req)[0], iommu->name, ((unsigned long long *)req)[0],
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册