提交 868b8351 编写于 作者: H Harry Wentland 提交者: Alex Deucher

drm/amd/display: Add VG12 ASIC IDs

Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
上级 ada8ce15
...@@ -120,9 +120,14 @@ ...@@ -120,9 +120,14 @@
#define AI_GREENLAND_P_A0 1 #define AI_GREENLAND_P_A0 1
#define AI_GREENLAND_P_A1 2 #define AI_GREENLAND_P_A1 2
#define AI_UNKNOWN 0xFF
#define ASICREV_IS_GREENLAND_M(eChipRev) (eChipRev < AI_UNKNOWN) #define AI_VEGA12_P_A0 20
#define ASICREV_IS_GREENLAND_P(eChipRev) (eChipRev < AI_UNKNOWN) #define ASICREV_IS_GREENLAND_M(eChipRev) (eChipRev < AI_VEGA12_P_A0)
#define ASICREV_IS_GREENLAND_P(eChipRev) (eChipRev < AI_VEGA12_P_A0)
#define ASICREV_IS_VEGA12_P(eChipRev) ((eChipRev >= AI_VEGA12_P_A0) && (eChipRev < AI_UNKNOWN))
#define ASICREV_IS_VEGA12_p(eChipRev) ((eChipRev >= AI_VEGA12_P_A0) && (eChipRev < AI_UNKNOWN))
/* DCN1_0 */ /* DCN1_0 */
#define INTERNAL_REV_RAVEN_A0 0x00 /* First spin of Raven */ #define INTERNAL_REV_RAVEN_A0 0x00 /* First spin of Raven */
......
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