drm/amd/display: Pass adev to fill_plane_attr

Signed-off-by: NAndrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c

@@ -411,6 +411,7 @@ static bool get_fb_info(
 	return true;
 }
 static void fill_plane_attributes_from_fb(
+	struct amdgpu_device *adev,
 	struct dc_surface *surface,
 	const struct amdgpu_framebuffer *amdgpu_fb, bool addReq)
 {
@@ -455,6 +456,7 @@ static void fill_plane_attributes_from_fb(
 
 	memset(&surface->tiling_info, 0, sizeof(surface->tiling_info));
 
+	/* Fill GFX8 params */
 	if (AMDGPU_TILING_GET(tiling_flags, ARRAY_MODE) == DC_ARRAY_2D_TILED_THIN1)
 	{
 		unsigned bankw, bankh, mtaspect, tile_split, num_banks;
@@ -540,6 +542,7 @@ static void fill_gamma_from_crtc(
 }
 
 static void fill_plane_attributes(
+			struct amdgpu_device *adev,
 			struct dc_surface *surface,
 			struct drm_plane_state *state, bool addrReq)
 {
@@ -549,6 +552,7 @@ static void fill_plane_attributes(
 
 	fill_rects_from_plane_state(state, surface);
 	fill_plane_attributes_from_fb(
+		crtc->dev->dev_private,
 		surface,
 		amdgpu_fb,
 		addrReq);
@@ -662,7 +666,11 @@ static void dm_dc_surface_commit(
 	}
 
 	/* Surface programming */
-	fill_plane_attributes(dc_surface, crtc->primary->state, true);
+	fill_plane_attributes(
+			crtc->dev->dev_private,
+			dc_surface,
+			crtc->primary->state,
+			true);
 
 	dc_surfaces[0] = dc_surface;
 
@@ -3026,6 +3034,7 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
 
 				surface = dc_create_surface(dc);
 				fill_plane_attributes(
+					crtc->dev->dev_private,
 					surface,
 					plane_state,
 					false);