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提交 68f06766 编写于 作者: J Janusz Krzysztofik 提交者： Tony Lindgren
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MTD: NAND: ams-delta: use GPIO instead of custom I/O 

Don't use Amstrad Delta custom I/O functions for controlling the device,
use GPIO API instead.

While being at it, add missing gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB).
Signed-off-by: NJanusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Cc: David Woodhouse <dwmw2@infradead.org>
Reviewed-by: NArtem Bityutskiy <Artem.Bityutskiy@linux.intel.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
上级 f6fc8a6a
隐藏空白更改
内联 并排
Showing with 52 addition and 58 deletion
arch/arm/mach-omap1/board-ams-delta.c
浏览文件 @ 68f06766
...@@ -236,36 +236,6 @@ static struct gpio latch_gpios[] __initconst = { ...@@ -236,36 +236,6 @@ static struct gpio latch_gpios[] __initconst = {
.flags = GPIOF_OUT_INIT_LOW, .flags = GPIOF_OUT_INIT_LOW,
.label = "lcd_ndisp", .label = "lcd_ndisp",
}, },
{
.gpio = AMS_DELTA_GPIO_PIN_NAND_NCE,
.flags = GPIOF_OUT_INIT_LOW,
.label = "nand_nce",
},
{
.gpio = AMS_DELTA_GPIO_PIN_NAND_NRE,
.flags = GPIOF_OUT_INIT_LOW,
.label = "nand_nre",
},
{
.gpio = AMS_DELTA_GPIO_PIN_NAND_NWP,
.flags = GPIOF_OUT_INIT_LOW,
.label = "nand_nwp",
},
{
.gpio = AMS_DELTA_GPIO_PIN_NAND_NWE,
.flags = GPIOF_OUT_INIT_LOW,
.label = "nand_nwe",
},
{
.gpio = AMS_DELTA_GPIO_PIN_NAND_ALE,
.flags = GPIOF_OUT_INIT_LOW,
.label = "nand_ale",
},
{
.gpio = AMS_DELTA_GPIO_PIN_NAND_CLE,
.flags = GPIOF_OUT_INIT_LOW,
.label = "nand_cle",
},
{ {
.gpio = AMS_DELTA_GPIO_PIN_KEYBRD_PWR, .gpio = AMS_DELTA_GPIO_PIN_KEYBRD_PWR,
.flags = GPIOF_OUT_INIT_LOW, .flags = GPIOF_OUT_INIT_LOW,
......
arch/arm/plat-omap/include/plat/board-ams-delta.h
浏览文件 @ 68f06766
...@@ -30,12 +30,6 @@ ...@@ -30,12 +30,6 @@
#define AMS_DELTA_LATCH2_LCD_VBLEN 0x0001 #define AMS_DELTA_LATCH2_LCD_VBLEN 0x0001
#define AMS_DELTA_LATCH2_LCD_NDISP 0x0002 #define AMS_DELTA_LATCH2_LCD_NDISP 0x0002
#define AMS_DELTA_LATCH2_NAND_NCE 0x0004
#define AMS_DELTA_LATCH2_NAND_NRE 0x0008
#define AMS_DELTA_LATCH2_NAND_NWP 0x0010
#define AMS_DELTA_LATCH2_NAND_NWE 0x0020
#define AMS_DELTA_LATCH2_NAND_ALE 0x0040
#define AMS_DELTA_LATCH2_NAND_CLE 0x0080
#define AMD_DELTA_LATCH2_KEYBRD_PWR 0x0100 #define AMD_DELTA_LATCH2_KEYBRD_PWR 0x0100
#define AMD_DELTA_LATCH2_KEYBRD_DATA 0x0200 #define AMD_DELTA_LATCH2_KEYBRD_DATA 0x0200
#define AMD_DELTA_LATCH2_SCARD_RSTIN 0x0400 #define AMD_DELTA_LATCH2_SCARD_RSTIN 0x0400
......
drivers/mtd/nand/ams-delta.c
浏览文件 @ 68f06766
...@@ -26,7 +26,7 @@ ...@@ -26,7 +26,7 @@
#include <asm/io.h> #include <asm/io.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <asm/sizes.h> #include <asm/sizes.h>
#include <asm/gpio.h> #include <linux/gpio.h>
#include <plat/board-ams-delta.h> #include <plat/board-ams-delta.h>
/* /*
...@@ -34,8 +34,6 @@ ...@@ -34,8 +34,6 @@
*/ */
static struct mtd_info *ams_delta_mtd = NULL; static struct mtd_info *ams_delta_mtd = NULL;
#define NAND_MASK (AMS_DELTA_LATCH2_NAND_NRE | AMS_DELTA_LATCH2_NAND_NWE | AMS_DELTA_LATCH2_NAND_CLE | AMS_DELTA_LATCH2_NAND_ALE | AMS_DELTA_LATCH2_NAND_NCE | AMS_DELTA_LATCH2_NAND_NWP)
/* /*
* Define partitions for flash devices * Define partitions for flash devices
*/ */
...@@ -68,10 +66,9 @@ static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte) ...@@ -68,10 +66,9 @@ static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte)
writew(0, io_base + OMAP_MPUIO_IO_CNTL); writew(0, io_base + OMAP_MPUIO_IO_CNTL);
writew(byte, this->IO_ADDR_W); writew(byte, this->IO_ADDR_W);
ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, 0); gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 0);
ndelay(40); ndelay(40);
ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 1);
AMS_DELTA_LATCH2_NAND_NWE);
} }
static u_char ams_delta_read_byte(struct mtd_info *mtd) static u_char ams_delta_read_byte(struct mtd_info *mtd)
...@@ -80,12 +77,11 @@ static u_char ams_delta_read_byte(struct mtd_info *mtd) ...@@ -80,12 +77,11 @@ static u_char ams_delta_read_byte(struct mtd_info *mtd)
struct nand_chip *this = mtd->priv; struct nand_chip *this = mtd->priv;
void __iomem *io_base = this->priv; void __iomem *io_base = this->priv;
ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, 0); gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 0);
ndelay(40); ndelay(40);
writew(~0, io_base + OMAP_MPUIO_IO_CNTL); writew(~0, io_base + OMAP_MPUIO_IO_CNTL);
res = readw(this->IO_ADDR_R); res = readw(this->IO_ADDR_R);
ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 1);
AMS_DELTA_LATCH2_NAND_NRE);
return res; return res;
} }
...@@ -132,15 +128,12 @@ static void ams_delta_hwcontrol(struct mtd_info *mtd, int cmd, ...@@ -132,15 +128,12 @@ static void ams_delta_hwcontrol(struct mtd_info *mtd, int cmd,
{ {
if (ctrl & NAND_CTRL_CHANGE) { if (ctrl & NAND_CTRL_CHANGE) {
unsigned long bits; gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NCE,
(ctrl & NAND_NCE) == 0);
bits = (~ctrl & NAND_NCE) ? AMS_DELTA_LATCH2_NAND_NCE : 0; gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_CLE,
bits |= (ctrl & NAND_CLE) ? AMS_DELTA_LATCH2_NAND_CLE : 0; (ctrl & NAND_CLE) != 0);
bits |= (ctrl & NAND_ALE) ? AMS_DELTA_LATCH2_NAND_ALE : 0; gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_ALE,
(ctrl & NAND_ALE) != 0);
ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_CLE |
AMS_DELTA_LATCH2_NAND_ALE |
AMS_DELTA_LATCH2_NAND_NCE, bits);
} }
if (cmd != NAND_CMD_NONE) if (cmd != NAND_CMD_NONE)
...@@ -152,6 +145,39 @@ static int ams_delta_nand_ready(struct mtd_info *mtd) ...@@ -152,6 +145,39 @@ static int ams_delta_nand_ready(struct mtd_info *mtd)
return gpio_get_value(AMS_DELTA_GPIO_PIN_NAND_RB); return gpio_get_value(AMS_DELTA_GPIO_PIN_NAND_RB);
} }
static struct gpio _mandatory_gpio[] __initconst_or_module = {
{
.gpio = AMS_DELTA_GPIO_PIN_NAND_NCE,
.flags = GPIOF_OUT_INIT_HIGH,
.label = "nand_nce",
},
{
.gpio = AMS_DELTA_GPIO_PIN_NAND_NRE,
.flags = GPIOF_OUT_INIT_HIGH,
.label = "nand_nre",
},
{
.gpio = AMS_DELTA_GPIO_PIN_NAND_NWP,
.flags = GPIOF_OUT_INIT_HIGH,
.label = "nand_nwp",
},
{
.gpio = AMS_DELTA_GPIO_PIN_NAND_NWE,
.flags = GPIOF_OUT_INIT_HIGH,
.label = "nand_nwe",
},
{
.gpio = AMS_DELTA_GPIO_PIN_NAND_ALE,
.flags = GPIOF_OUT_INIT_LOW,
.label = "nand_ale",
},
{
.gpio = AMS_DELTA_GPIO_PIN_NAND_CLE,
.flags = GPIOF_OUT_INIT_LOW,
.label = "nand_cle",
},
};
/* /*
* Main initialization routine * Main initialization routine
*/ */
...@@ -223,10 +249,9 @@ static int __devinit ams_delta_init(struct platform_device *pdev) ...@@ -223,10 +249,9 @@ static int __devinit ams_delta_init(struct platform_device *pdev)
platform_set_drvdata(pdev, io_base); platform_set_drvdata(pdev, io_base);
/* Set chip enabled, but */ /* Set chip enabled, but */
ams_delta_latch2_write(NAND_MASK, AMS_DELTA_LATCH2_NAND_NRE | err = gpio_request_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
AMS_DELTA_LATCH2_NAND_NWE | if (err)
AMS_DELTA_LATCH2_NAND_NCE | goto out_gpio;
AMS_DELTA_LATCH2_NAND_NWP);
/* Scan to find existence of the device */ /* Scan to find existence of the device */
if (nand_scan(ams_delta_mtd, 1)) { if (nand_scan(ams_delta_mtd, 1)) {
...@@ -241,7 +266,10 @@ static int __devinit ams_delta_init(struct platform_device *pdev) ...@@ -241,7 +266,10 @@ static int __devinit ams_delta_init(struct platform_device *pdev)
goto out; goto out;
out_mtd: out_mtd:
gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
out_gpio:
platform_set_drvdata(pdev, NULL); platform_set_drvdata(pdev, NULL);
gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
iounmap(io_base); iounmap(io_base);
out_release_io: out_release_io:
release_mem_region(res->start, resource_size(res)); release_mem_region(res->start, resource_size(res));
...@@ -262,6 +290,8 @@ static int __devexit ams_delta_cleanup(struct platform_device *pdev) ...@@ -262,6 +290,8 @@ static int __devexit ams_delta_cleanup(struct platform_device *pdev)
/* Release resources, unregister device */ /* Release resources, unregister device */
nand_release(ams_delta_mtd); nand_release(ams_delta_mtd);
gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
iounmap(io_base); iounmap(io_base);
release_mem_region(res->start, resource_size(res)); release_mem_region(res->start, resource_size(res));
......
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