Staging: rtl819su: added r8192SU_led.c/.h

added the necessary infrastructure for the leds on the device
this is a port from Realteks driver.

leds are now working partially.
Signed-off-by: NFlorian Schilhabel <florian.c.schilhabel@googlemail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

drivers/staging/rtl8192su/Makefile

@@ -20,6 +20,7 @@ r8192s_usb-objs :=		\
 	r8192S_Efuse.o		\
 	r8192U_core.o		\
 	r8192U_pm.o		\
+	r8192SU_led.o		\
 	ieee80211/ieee80211_crypt.o		\
 	ieee80211/ieee80211_crypt_tkip.o	\
 	ieee80211/ieee80211_crypt_ccmp.o	\

drivers/staging/rtl8192su/ieee80211/ieee80211_r8192s.h

@@ -172,18 +172,20 @@ enum {
 	IG_Max
 };
 
-typedef enum _LED_CTL_MODE {
-	LED_CTL_POWER_ON	 = 1,
-	LED_CTL_LINK		 = 2,
-	LED_CTL_NO_LINK		 = 3,
-	LED_CTL_TX		 = 4,
-	LED_CTL_RX		 = 5,
-	LED_CTL_SITE_SURVEY	 = 6,
-	LED_CTL_POWER_OFF	 = 7,
-	LED_CTL_START_TO_LINK	 = 8,
-	LED_CTL_START_WPS	 = 9,
-	LED_CTL_STOP_WPS	 = 10,
+typedef enum _LED_CTL_MODE{
+	LED_CTL_POWER_ON = 1,
+	LED_CTL_LINK = 2,
+	LED_CTL_NO_LINK = 3,
+	LED_CTL_TX = 4,
+	LED_CTL_RX = 5,
+	LED_CTL_SITE_SURVEY = 6,
+	LED_CTL_POWER_OFF = 7,
+	LED_CTL_START_TO_LINK = 8,
+	LED_CTL_START_WPS = 9,
+	LED_CTL_STOP_WPS = 10,
 	LED_CTL_START_WPS_BOTTON = 11,
+	LED_CTL_STOP_WPS_FAIL = 12,
+	LED_CTL_STOP_WPS_FAIL_OVERLAP = 13,
 } LED_CTL_MODE;
 
 typedef union _frameqos {

drivers/staging/rtl8192su/r8192SU_led.h

+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifndef __INC_HAL8192USBLED_H
+#define __INC_HAL8192USBLED_H
+
+#include <linux/types.h>
+#include <linux/timer.h>
+
+typedef	enum _LED_STATE_819xUsb{
+	LED_UNKNOWN = 0,
+	LED_ON = 1,
+	LED_OFF = 2,
+	LED_BLINK_NORMAL = 3,
+	LED_BLINK_SLOWLY = 4,
+	LED_POWER_ON_BLINK = 5,
+	LED_SCAN_BLINK = 6, 
+	LED_NO_LINK_BLINK = 7, 
+	LED_BLINK_StartToBlink = 8,
+	LED_BLINK_WPS = 9,	
+	LED_TXRX_BLINK = 10,
+	LED_BLINK_WPS_STOP = 11,	
+	LED_BLINK_WPS_STOP_OVERLAP = 12,	
+	
+}LED_STATE_819xUsb;
+
+#define IS_LED_WPS_BLINKING(_LED_819xUsb)	(((PLED_819xUsb)_LED_819xUsb)->CurrLedState==LED_BLINK_WPS \
+												|| ((PLED_819xUsb)_LED_819xUsb)->CurrLedState==LED_BLINK_WPS_STOP \
+												|| ((PLED_819xUsb)_LED_819xUsb)->bLedWPSBlinkInProgress)
+
+#define IS_LED_BLINKING(_LED_819xUsb) 	(((PLED_819xUsb)_LED_819xUsb)->bLedWPSBlinkInProgress \
+											||((PLED_819xUsb)_LED_819xUsb)->bLedScanBlinkInProgress)
+
+typedef enum _LED_PIN_819xUsb{
+	LED_PIN_GPIO0,
+	LED_PIN_LED0,
+	LED_PIN_LED1
+}LED_PIN_819xUsb;
+
+typedef	enum _LED_STRATEGY_819xUsb{
+	SW_LED_MODE0, /* SW control 1 LED via GPIO0. It is default option. */
+	SW_LED_MODE1, /* SW control for PCI Express */
+	SW_LED_MODE2, /* SW control for Cameo. */
+	SW_LED_MODE3, /* SW contorl for RunTop. */
+	SW_LED_MODE4, /* SW control for Netcore */
+	SW_LED_MODE5,
+	HW_LED, /* HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes) */
+}LED_STRATEGY_819xUsb, *PLED_STRATEGY_819xUsb;
+
+typedef struct _LED_819xUsb{
+	struct net_device 		*dev;
+
+	LED_PIN_819xUsb		LedPin;	
+
+	LED_STATE_819xUsb	CurrLedState; 
+	bool					bLedOn; 
+
+	bool					bSWLedCtrl;
+
+	bool					bLedBlinkInProgress; 
+	bool					bLedNoLinkBlinkInProgress;
+	bool					bLedLinkBlinkInProgress;
+	bool					bLedStartToLinkBlinkInProgress;
+	bool					bLedScanBlinkInProgress;
+	bool					bLedWPSBlinkInProgress;
+	
+	u32					BlinkTimes; 
+	LED_STATE_819xUsb	BlinkingLedState; 
+
+	struct timer_list		BlinkTimer; 
+} LED_819xUsb, *PLED_819xUsb;
+
+void InitSwLeds(struct net_device *dev);
+void DeInitSwLeds(struct net_device *dev);
+void LedControl8192SUsb(struct net_device *dev,LED_CTL_MODE LedAction);
+
+#endif
+

drivers/staging/rtl8192su/r8192U.h

@@ -43,6 +43,7 @@
 #include "ieee80211/ieee80211.h"
 
 #include "r8192S_firmware.h"
+#include "r8192SU_led.h"
 
 /* EEPROM defs for use with linux/eeprom_93cx6.h */
 #define RTL819X_EEPROM_CMD_READ		(1 << 0)
@@ -1067,19 +1068,6 @@ typedef enum _RT_CUSTOMER_ID
 	RT_CID_PRONET = 13,
 }RT_CUSTOMER_ID, *PRT_CUSTOMER_ID;
 
-//================================================================================
-// LED customization.
-//================================================================================
-
-typedef	enum _LED_STRATEGY_8190{
-	SW_LED_MODE0, // SW control 1 LED via GPIO0. It is default option.
-	SW_LED_MODE1, // SW control for PCI Express
-	SW_LED_MODE2, // SW control for Cameo.
-	SW_LED_MODE3, // SW contorl for RunTop.
-	SW_LED_MODE4, // SW control for Netcore
-	HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes)
-}LED_STRATEGY_8190, *PLED_STRATEGY_8190;
-
 typedef enum _RESET_TYPE {
 	RESET_TYPE_NORESET = 0x00,
 	RESET_TYPE_NORMAL = 0x01,
@@ -1131,7 +1119,7 @@ typedef struct r8192_priv
 	u8  eeprom_SubCustomerID;
 	u8  eeprom_ChannelPlan;
 	RT_CUSTOMER_ID CustomerID;
-	LED_STRATEGY_8190	LedStrategy;
+	LED_STRATEGY_819xUsb	LedStrategy;
 	u8  txqueue_to_outpipemap[9];
 	u8  RtOutPipes[16];
 	u8  RtInPipes[16];
@@ -1501,8 +1489,17 @@ typedef struct r8192_priv
 	u8 MinSpaceCfg;
 
 	u16 rf_pathmap;
-//#endif
 
+	/* added for led control */
+	PLED_819xUsb			pLed;
+	LED_819xUsb			SwLed0;
+	LED_819xUsb			SwLed1;
+        u8                              bRegUseLed;
+	struct work_struct		BlinkWorkItem; 
+	/* added for led control */
+	u16				FwCmdIOMap;
+	u32				FwCmdIOParam;
+	u8				DMFlag;