提交 4fd7a412 编写于 作者: T Tero Kristo 提交者: Kevin Hilman

ARM: OMAP4: USB: power down MUSB PHY during boot

Commit c9e4412a removed all of the USB
PHY functions for OMAP4, but this causes a problem with core retention
as the MUSB module remains enabled if omap-usb2 phy driver is not used.
This keeps the USB DPLL enabled and prevents l3_init pwrdm from idling.

Fixed by adding a minimal function back that disables the USB PHY during
boot.
Signed-off-by: NTero Kristo <t-kristo@ti.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Acked-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>
上级 0c7018e2
...@@ -33,6 +33,38 @@ ...@@ -33,6 +33,38 @@
#include "soc.h" #include "soc.h"
#include "control.h" #include "control.h"
#define CONTROL_DEV_CONF 0x300
#define PHY_PD 0x1
/**
* omap4430_phy_power_down: disable MUSB PHY during early init
*
* OMAP4 MUSB PHY module is enabled by default on reset, but this will
* prevent core retention if not disabled by SW. USB driver will
* later on enable this, once and if the driver needs it.
*/
static int __init omap4430_phy_power_down(void)
{
void __iomem *ctrl_base;
if (!cpu_is_omap44xx())
return 0;
ctrl_base = ioremap(OMAP443X_SCM_BASE, SZ_1K);
if (!ctrl_base) {
pr_err("control module ioremap failed\n");
return -ENOMEM;
}
/* Power down the phy */
__raw_writel(PHY_PD, ctrl_base + CONTROL_DEV_CONF);
iounmap(ctrl_base);
return 0;
}
early_initcall(omap4430_phy_power_down);
void am35x_musb_reset(void) void am35x_musb_reset(void)
{ {
u32 regval; u32 regval;
......
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