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kernel_linux
提交 467c88fe 编写于 作者: I Ingo Molnar
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Merge branches 'x86/apic', 'x86/asm', 'x86/fixmap', 'x86/memtest', 'x86/mm',... 

Merge branches 'x86/apic', 'x86/asm', 'x86/fixmap', 'x86/memtest', 'x86/mm', 'x86/urgent', 'linus' and 'core/percpu' into x86/core
上级 1f442d70 7ab15247 8827247f d1a8e779 0feca851 d0fc63f7 7a203f3b 3a450de1
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Showing with 2069 addition and 2156 deletion
Documentation/filesystems/squashfs.txt
浏览文件 @ 467c88fe
...@@ -22,7 +22,7 @@ Squashfs filesystem features versus Cramfs: ...@@ -22,7 +22,7 @@ Squashfs filesystem features versus Cramfs:
Squashfs Cramfs Squashfs Cramfs
Max filesystem size: 2^64 16 MiB Max filesystem size: 2^64 256 MiB
Max file size: ~ 2 TiB 16 MiB Max file size: ~ 2 TiB 16 MiB
Max files: unlimited unlimited Max files: unlimited unlimited
Max directories: unlimited unlimited Max directories: unlimited unlimited
......
arch/arm/mach-at91/at91sam9263_devices.c
浏览文件 @ 467c88fe
...@@ -347,6 +347,111 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) ...@@ -347,6 +347,111 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
#endif #endif
/* --------------------------------------------------------------------
* Compact Flash (PCMCIA or IDE)
* -------------------------------------------------------------------- */
#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) || \
defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
static struct at91_cf_data cf0_data;
static struct resource cf0_resources[] = {
[0] = {
.start = AT91_CHIPSELECT_4,
.end = AT91_CHIPSELECT_4 + SZ_256M - 1,
.flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
}
};
static struct platform_device cf0_device = {
.id = 0,
.dev = {
.platform_data = &cf0_data,
},
.resource = cf0_resources,
.num_resources = ARRAY_SIZE(cf0_resources),
};
static struct at91_cf_data cf1_data;
static struct resource cf1_resources[] = {
[0] = {
.start = AT91_CHIPSELECT_5,
.end = AT91_CHIPSELECT_5 + SZ_256M - 1,
.flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
}
};
static struct platform_device cf1_device = {
.id = 1,
.dev = {
.platform_data = &cf1_data,
},
.resource = cf1_resources,
.num_resources = ARRAY_SIZE(cf1_resources),
};
void __init at91_add_device_cf(struct at91_cf_data *data)
{
unsigned long ebi0_csa;
struct platform_device *pdev;
if (!data)
return;
/*
* assign CS4 or CS5 to SMC with Compact Flash logic support,
* we assume SMC timings are configured by board code,
* except True IDE where timings are controlled by driver
*/
ebi0_csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
switch (data->chipselect) {
case 4:
at91_set_A_periph(AT91_PIN_PD6, 0); /* EBI0_NCS4/CFCS0 */
ebi0_csa |= AT91_MATRIX_EBI0_CS4A_SMC_CF1;
cf0_data = *data;
pdev = &cf0_device;
break;
case 5:
at91_set_A_periph(AT91_PIN_PD7, 0); /* EBI0_NCS5/CFCS1 */
ebi0_csa |= AT91_MATRIX_EBI0_CS5A_SMC_CF2;
cf1_data = *data;
pdev = &cf1_device;
break;
default:
printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
data->chipselect);
return;
}
at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
if (data->det_pin) {
at91_set_gpio_input(data->det_pin, 1);
at91_set_deglitch(data->det_pin, 1);
}
if (data->irq_pin) {
at91_set_gpio_input(data->irq_pin, 1);
at91_set_deglitch(data->irq_pin, 1);
}
if (data->vcc_pin)
/* initially off */
at91_set_gpio_output(data->vcc_pin, 0);
/* enable EBI controlled pins */
at91_set_A_periph(AT91_PIN_PD5, 1); /* NWAIT */
at91_set_A_periph(AT91_PIN_PD8, 0); /* CFCE1 */
at91_set_A_periph(AT91_PIN_PD9, 0); /* CFCE2 */
at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */
pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "at91_ide" : "at91_cf";
platform_device_register(pdev);
}
#else
void __init at91_add_device_cf(struct at91_cf_data *data) {}
#endif
/* -------------------------------------------------------------------- /* --------------------------------------------------------------------
* NAND / SmartMedia * NAND / SmartMedia
......
arch/arm/mach-at91/include/mach/board.h
浏览文件 @ 467c88fe
...@@ -56,6 +56,9 @@ struct at91_cf_data { ...@@ -56,6 +56,9 @@ struct at91_cf_data {
u8 vcc_pin; /* power switching */ u8 vcc_pin; /* power switching */
u8 rst_pin; /* card reset */ u8 rst_pin; /* card reset */
u8 chipselect; /* EBI Chip Select number */ u8 chipselect; /* EBI Chip Select number */
u8 flags;
#define AT91_CF_TRUE_IDE 0x01
#define AT91_IDE_SWAP_A0_A2 0x02
}; };
extern void __init at91_add_device_cf(struct at91_cf_data *data); extern void __init at91_add_device_cf(struct at91_cf_data *data);
......
arch/blackfin/Kconfig
浏览文件 @ 467c88fe
...@@ -1129,6 +1129,7 @@ endchoice ...@@ -1129,6 +1129,7 @@ endchoice
config PM_WAKEUP_BY_GPIO config PM_WAKEUP_BY_GPIO
bool "Allow Wakeup from Standby by GPIO" bool "Allow Wakeup from Standby by GPIO"
depends on PM && !BF54x
config PM_WAKEUP_GPIO_NUMBER config PM_WAKEUP_GPIO_NUMBER
int "GPIO number" int "GPIO number"
...@@ -1168,6 +1169,12 @@ config PM_BFIN_WAKE_GP ...@@ -1168,6 +1169,12 @@ config PM_BFIN_WAKE_GP
default n default n
help help
Enable General-Purpose Wake-Up (Voltage Regulator Power-Up) Enable General-Purpose Wake-Up (Voltage Regulator Power-Up)
(all processors, except ADSP-BF549). This option sets
the general-purpose wake-up enable (GPWE) control bit to enable
wake-up upon detection of an active low signal on the /GPW (PH7) pin.
On ADSP-BF549 this option enables the the same functionality on the
/MRXON pin also PH7.
endmenu endmenu
menu "CPU Frequency scaling" menu "CPU Frequency scaling"
......
arch/blackfin/Kconfig.debug
浏览文件 @ 467c88fe
...@@ -21,12 +21,6 @@ config DEBUG_STACK_USAGE ...@@ -21,12 +21,6 @@ config DEBUG_STACK_USAGE
config HAVE_ARCH_KGDB config HAVE_ARCH_KGDB
def_bool y def_bool y
config KGDB_TESTCASE
tristate "KGDB: for test case in expect"
default n
help
This is a kgdb test case for automated testing.
config DEBUG_VERBOSE config DEBUG_VERBOSE
bool "Verbose fault messages" bool "Verbose fault messages"
default y default y
......
arch/blackfin/configs/BF518F-EZBRD_defconfig
浏览文件 @ 467c88fe
# #
# Automatically generated make config: don't edit # Automatically generated make config: don't edit
# Linux kernel version: 2.6.28-rc2 # Linux kernel version: 2.6.28
# Fri Jan 9 17:58:41 2009 # Fri Feb 20 10:01:44 2009
# #
# CONFIG_MMU is not set # CONFIG_MMU is not set
# CONFIG_FPU is not set # CONFIG_FPU is not set
...@@ -133,10 +133,15 @@ CONFIG_BF518=y ...@@ -133,10 +133,15 @@ CONFIG_BF518=y
# CONFIG_BF538 is not set # CONFIG_BF538 is not set
# CONFIG_BF539 is not set # CONFIG_BF539 is not set
# CONFIG_BF542 is not set # CONFIG_BF542 is not set
# CONFIG_BF542M is not set
# CONFIG_BF544 is not set # CONFIG_BF544 is not set
# CONFIG_BF544M is not set
# CONFIG_BF547 is not set # CONFIG_BF547 is not set
# CONFIG_BF547M is not set
# CONFIG_BF548 is not set # CONFIG_BF548 is not set
# CONFIG_BF548M is not set
# CONFIG_BF549 is not set # CONFIG_BF549 is not set
# CONFIG_BF549M is not set
# CONFIG_BF561 is not set # CONFIG_BF561 is not set
CONFIG_BF_REV_MIN=0 CONFIG_BF_REV_MIN=0
CONFIG_BF_REV_MAX=2 CONFIG_BF_REV_MAX=2
...@@ -426,7 +431,17 @@ CONFIG_DEFAULT_TCP_CONG="cubic" ...@@ -426,7 +431,17 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TIPC is not set # CONFIG_TIPC is not set
# CONFIG_ATM is not set # CONFIG_ATM is not set
# CONFIG_BRIDGE is not set # CONFIG_BRIDGE is not set
# CONFIG_NET_DSA is not set CONFIG_NET_DSA=y
# CONFIG_NET_DSA_TAG_DSA is not set
# CONFIG_NET_DSA_TAG_EDSA is not set
# CONFIG_NET_DSA_TAG_TRAILER is not set
CONFIG_NET_DSA_TAG_STPID=y
# CONFIG_NET_DSA_MV88E6XXX is not set
# CONFIG_NET_DSA_MV88E6060 is not set
# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
# CONFIG_NET_DSA_MV88E6131 is not set
# CONFIG_NET_DSA_MV88E6123_61_65 is not set
CONFIG_NET_DSA_KSZ8893M=y
# CONFIG_VLAN_8021Q is not set # CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set # CONFIG_DECNET is not set
# CONFIG_LLC2 is not set # CONFIG_LLC2 is not set
...@@ -529,6 +544,8 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y ...@@ -529,6 +544,8 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
# #
# Self-contained MTD device drivers # Self-contained MTD device drivers
# #
# CONFIG_MTD_DATAFLASH is not set
# CONFIG_MTD_M25P80 is not set
# CONFIG_MTD_SLRAM is not set # CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set # CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set # CONFIG_MTD_MTDRAM is not set
...@@ -561,7 +578,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 ...@@ -561,7 +578,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_HD is not set # CONFIG_BLK_DEV_HD is not set
CONFIG_MISC_DEVICES=y CONFIG_MISC_DEVICES=y
# CONFIG_EEPROM_93CX6 is not set # CONFIG_EEPROM_93CX6 is not set
# CONFIG_ICS932S401 is not set
# CONFIG_ENCLOSURE_SERVICES is not set # CONFIG_ENCLOSURE_SERVICES is not set
# CONFIG_C2PORT is not set
CONFIG_HAVE_IDE=y CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set # CONFIG_IDE is not set
...@@ -607,6 +626,7 @@ CONFIG_BFIN_RX_DESC_NUM=20 ...@@ -607,6 +626,7 @@ CONFIG_BFIN_RX_DESC_NUM=20
# CONFIG_SMC91X is not set # CONFIG_SMC91X is not set
# CONFIG_SMSC911X is not set # CONFIG_SMSC911X is not set
# CONFIG_DM9000 is not set # CONFIG_DM9000 is not set
# CONFIG_ENC28J60 is not set
# CONFIG_IBM_NEW_EMAC_ZMII is not set # CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set # CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set # CONFIG_IBM_NEW_EMAC_TAH is not set
...@@ -764,7 +784,23 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100 ...@@ -764,7 +784,23 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
# CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set # CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set # CONFIG_I2C_DEBUG_CHIP is not set
# CONFIG_SPI is not set CONFIG_SPI=y
# CONFIG_SPI_DEBUG is not set
CONFIG_SPI_MASTER=y
#
# SPI Master Controller Drivers
#
CONFIG_SPI_BFIN=y
# CONFIG_SPI_BFIN_LOCK is not set
# CONFIG_SPI_BITBANG is not set
#
# SPI Protocol Masters
#
# CONFIG_SPI_AT25 is not set
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_TLE62X0 is not set
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
# CONFIG_GPIOLIB is not set # CONFIG_GPIOLIB is not set
# CONFIG_W1 is not set # CONFIG_W1 is not set
...@@ -788,8 +824,10 @@ CONFIG_BFIN_WDT=y ...@@ -788,8 +824,10 @@ CONFIG_BFIN_WDT=y
# CONFIG_MFD_SM501 is not set # CONFIG_MFD_SM501 is not set
# CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_PASIC3 is not set
# CONFIG_MFD_TMIO is not set # CONFIG_MFD_TMIO is not set
# CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_WM8400 is not set # CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM8350_I2C is not set # CONFIG_MFD_WM8350_I2C is not set
# CONFIG_REGULATOR is not set
# #
# Multimedia devices # Multimedia devices
...@@ -861,10 +899,18 @@ CONFIG_RTC_INTF_DEV=y ...@@ -861,10 +899,18 @@ CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_DRV_M41T80 is not set # CONFIG_RTC_DRV_M41T80 is not set
# CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_S35390A is not set
# CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_FM3130 is not set
# CONFIG_RTC_DRV_RX8581 is not set
# #
# SPI RTC drivers # SPI RTC drivers
# #
# CONFIG_RTC_DRV_M41T94 is not set
# CONFIG_RTC_DRV_DS1305 is not set
# CONFIG_RTC_DRV_DS1390 is not set
# CONFIG_RTC_DRV_MAX6902 is not set
# CONFIG_RTC_DRV_R9701 is not set
# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_DS3234 is not set
# #
# Platform RTC drivers # Platform RTC drivers
...@@ -1062,12 +1108,20 @@ CONFIG_DEBUG_INFO=y ...@@ -1062,12 +1108,20 @@ CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_FAULT_INJECTION is not set # CONFIG_FAULT_INJECTION is not set
CONFIG_SYSCTL_SYSCALL_CHECK=y CONFIG_SYSCTL_SYSCALL_CHECK=y
#
# Tracers
#
# CONFIG_SCHED_TRACER is not set
# CONFIG_CONTEXT_SWITCH_TRACER is not set
# CONFIG_BOOT_TRACER is not set
# CONFIG_DYNAMIC_PRINTK_DEBUG is not set # CONFIG_DYNAMIC_PRINTK_DEBUG is not set
# CONFIG_SAMPLES is not set # CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set # CONFIG_KGDB is not set
# CONFIG_DEBUG_STACKOVERFLOW is not set # CONFIG_DEBUG_STACKOVERFLOW is not set
# CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_KGDB_TESTCASE is not set
CONFIG_DEBUG_VERBOSE=y CONFIG_DEBUG_VERBOSE=y
CONFIG_DEBUG_MMRS=y CONFIG_DEBUG_MMRS=y
# CONFIG_DEBUG_HWERR is not set # CONFIG_DEBUG_HWERR is not set
...@@ -1100,6 +1154,7 @@ CONFIG_CRYPTO=y ...@@ -1100,6 +1154,7 @@ CONFIG_CRYPTO=y
# #
# CONFIG_CRYPTO_FIPS is not set # CONFIG_CRYPTO_FIPS is not set
# CONFIG_CRYPTO_MANAGER is not set # CONFIG_CRYPTO_MANAGER is not set
# CONFIG_CRYPTO_MANAGER2 is not set
# CONFIG_CRYPTO_GF128MUL is not set # CONFIG_CRYPTO_GF128MUL is not set
# CONFIG_CRYPTO_NULL is not set # CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_CRYPTD is not set # CONFIG_CRYPTO_CRYPTD is not set
......
arch/blackfin/configs/BF527-EZKIT_defconfig
浏览文件 @ 467c88fe
...@@ -327,8 +327,8 @@ CONFIG_BFIN_ICACHE=y ...@@ -327,8 +327,8 @@ CONFIG_BFIN_ICACHE=y
CONFIG_BFIN_DCACHE=y CONFIG_BFIN_DCACHE=y
# CONFIG_BFIN_DCACHE_BANKA is not set # CONFIG_BFIN_DCACHE_BANKA is not set
# CONFIG_BFIN_ICACHE_LOCK is not set # CONFIG_BFIN_ICACHE_LOCK is not set
# CONFIG_BFIN_WB is not set CONFIG_BFIN_WB=y
CONFIG_BFIN_WT=y # CONFIG_BFIN_WT is not set
# CONFIG_MPU is not set # CONFIG_MPU is not set
# #
......
arch/blackfin/configs/BF533-EZKIT_defconfig
浏览文件 @ 467c88fe
...@@ -290,8 +290,8 @@ CONFIG_BFIN_ICACHE=y ...@@ -290,8 +290,8 @@ CONFIG_BFIN_ICACHE=y
CONFIG_BFIN_DCACHE=y CONFIG_BFIN_DCACHE=y
# CONFIG_BFIN_DCACHE_BANKA is not set # CONFIG_BFIN_DCACHE_BANKA is not set
# CONFIG_BFIN_ICACHE_LOCK is not set # CONFIG_BFIN_ICACHE_LOCK is not set
# CONFIG_BFIN_WB is not set CONFIG_BFIN_WB=y
CONFIG_BFIN_WT=y # CONFIG_BFIN_WT is not set
# CONFIG_MPU is not set # CONFIG_MPU is not set
# #
......
arch/blackfin/configs/BF533-STAMP_defconfig
浏览文件 @ 467c88fe
...@@ -290,8 +290,8 @@ CONFIG_BFIN_ICACHE=y ...@@ -290,8 +290,8 @@ CONFIG_BFIN_ICACHE=y
CONFIG_BFIN_DCACHE=y CONFIG_BFIN_DCACHE=y
# CONFIG_BFIN_DCACHE_BANKA is not set # CONFIG_BFIN_DCACHE_BANKA is not set
# CONFIG_BFIN_ICACHE_LOCK is not set # CONFIG_BFIN_ICACHE_LOCK is not set
# CONFIG_BFIN_WB is not set CONFIG_BFIN_WB=y
CONFIG_BFIN_WT=y # CONFIG_BFIN_WT is not set
# CONFIG_MPU is not set # CONFIG_MPU is not set
# #
......
arch/blackfin/configs/BF537-STAMP_defconfig
浏览文件 @ 467c88fe
...@@ -298,8 +298,8 @@ CONFIG_BFIN_ICACHE=y ...@@ -298,8 +298,8 @@ CONFIG_BFIN_ICACHE=y
CONFIG_BFIN_DCACHE=y CONFIG_BFIN_DCACHE=y
# CONFIG_BFIN_DCACHE_BANKA is not set # CONFIG_BFIN_DCACHE_BANKA is not set
# CONFIG_BFIN_ICACHE_LOCK is not set # CONFIG_BFIN_ICACHE_LOCK is not set
# CONFIG_BFIN_WB is not set CONFIG_BFIN_WB=y
CONFIG_BFIN_WT=y # CONFIG_BFIN_WT is not set
# CONFIG_MPU is not set # CONFIG_MPU is not set
# #
...@@ -568,15 +568,7 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 ...@@ -568,15 +568,7 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
# CONFIG_MTD_DOC2000 is not set # CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set # CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set # CONFIG_MTD_DOC2001PLUS is not set
CONFIG_MTD_NAND=m # CONFIG_MTD_NAND is not set
# CONFIG_MTD_NAND_VERIFY_WRITE is not set
# CONFIG_MTD_NAND_ECC_SMC is not set
# CONFIG_MTD_NAND_MUSEUM_IDS is not set
# CONFIG_MTD_NAND_BFIN is not set
CONFIG_MTD_NAND_IDS=m
# CONFIG_MTD_NAND_DISKONCHIP is not set
# CONFIG_MTD_NAND_NANDSIM is not set
CONFIG_MTD_NAND_PLATFORM=m
# CONFIG_MTD_ONENAND is not set # CONFIG_MTD_ONENAND is not set
# #
......
arch/blackfin/configs/BF538-EZKIT_defconfig
浏览文件 @ 467c88fe
...@@ -306,8 +306,8 @@ CONFIG_BFIN_ICACHE=y ...@@ -306,8 +306,8 @@ CONFIG_BFIN_ICACHE=y
CONFIG_BFIN_DCACHE=y CONFIG_BFIN_DCACHE=y
# CONFIG_BFIN_DCACHE_BANKA is not set # CONFIG_BFIN_DCACHE_BANKA is not set
# CONFIG_BFIN_ICACHE_LOCK is not set # CONFIG_BFIN_ICACHE_LOCK is not set
# CONFIG_BFIN_WB is not set CONFIG_BFIN_WB=y
CONFIG_BFIN_WT=y # CONFIG_BFIN_WT is not set
# CONFIG_MPU is not set # CONFIG_MPU is not set
# #
......
arch/blackfin/configs/BF548-EZKIT_defconfig
浏览文件 @ 467c88fe
...@@ -361,8 +361,8 @@ CONFIG_BFIN_ICACHE=y ...@@ -361,8 +361,8 @@ CONFIG_BFIN_ICACHE=y
CONFIG_BFIN_DCACHE=y CONFIG_BFIN_DCACHE=y
# CONFIG_BFIN_DCACHE_BANKA is not set # CONFIG_BFIN_DCACHE_BANKA is not set
# CONFIG_BFIN_ICACHE_LOCK is not set # CONFIG_BFIN_ICACHE_LOCK is not set
# CONFIG_BFIN_WB is not set CONFIG_BFIN_WB=y
CONFIG_BFIN_WT=y # CONFIG_BFIN_WT is not set
# CONFIG_BFIN_L2_CACHEABLE is not set # CONFIG_BFIN_L2_CACHEABLE is not set
# CONFIG_MPU is not set # CONFIG_MPU is not set
...@@ -680,7 +680,7 @@ CONFIG_SCSI=y ...@@ -680,7 +680,7 @@ CONFIG_SCSI=y
CONFIG_SCSI_DMA=y CONFIG_SCSI_DMA=y
# CONFIG_SCSI_TGT is not set # CONFIG_SCSI_TGT is not set
# CONFIG_SCSI_NETLINK is not set # CONFIG_SCSI_NETLINK is not set
CONFIG_SCSI_PROC_FS=y # CONFIG_SCSI_PROC_FS is not set
# #
# SCSI support type (disk, tape, CD-ROM) # SCSI support type (disk, tape, CD-ROM)
......
arch/blackfin/configs/BF561-EZKIT_defconfig
浏览文件 @ 467c88fe
...@@ -329,8 +329,8 @@ CONFIG_BFIN_ICACHE=y ...@@ -329,8 +329,8 @@ CONFIG_BFIN_ICACHE=y
CONFIG_BFIN_DCACHE=y CONFIG_BFIN_DCACHE=y
# CONFIG_BFIN_DCACHE_BANKA is not set # CONFIG_BFIN_DCACHE_BANKA is not set
# CONFIG_BFIN_ICACHE_LOCK is not set # CONFIG_BFIN_ICACHE_LOCK is not set
# CONFIG_BFIN_WB is not set CONFIG_BFIN_WB=y
CONFIG_BFIN_WT=y # CONFIG_BFIN_WT is not set
# CONFIG_BFIN_L2_CACHEABLE is not set # CONFIG_BFIN_L2_CACHEABLE is not set
# CONFIG_MPU is not set # CONFIG_MPU is not set
......
arch/blackfin/configs/BlackStamp_defconfig
浏览文件 @ 467c88fe
...@@ -288,8 +288,8 @@ CONFIG_BFIN_ICACHE=y ...@@ -288,8 +288,8 @@ CONFIG_BFIN_ICACHE=y
CONFIG_BFIN_DCACHE=y CONFIG_BFIN_DCACHE=y
# CONFIG_BFIN_DCACHE_BANKA is not set # CONFIG_BFIN_DCACHE_BANKA is not set
# CONFIG_BFIN_ICACHE_LOCK is not set # CONFIG_BFIN_ICACHE_LOCK is not set
# CONFIG_BFIN_WB is not set CONFIG_BFIN_WB=y
CONFIG_BFIN_WT=y # CONFIG_BFIN_WT is not set
# CONFIG_MPU is not set # CONFIG_MPU is not set
# #
......
arch/blackfin/configs/CM-BF527_defconfig
浏览文件 @ 467c88fe
...@@ -332,8 +332,8 @@ CONFIG_BFIN_ICACHE=y ...@@ -332,8 +332,8 @@ CONFIG_BFIN_ICACHE=y
CONFIG_BFIN_DCACHE=y CONFIG_BFIN_DCACHE=y
# CONFIG_BFIN_DCACHE_BANKA is not set # CONFIG_BFIN_DCACHE_BANKA is not set
# CONFIG_BFIN_ICACHE_LOCK is not set # CONFIG_BFIN_ICACHE_LOCK is not set
# CONFIG_BFIN_WB is not set CONFIG_BFIN_WB=y
CONFIG_BFIN_WT=y # CONFIG_BFIN_WT is not set
# CONFIG_MPU is not set # CONFIG_MPU is not set
# #
......
arch/blackfin/configs/CM-BF548_defconfig
浏览文件 @ 467c88fe
...@@ -336,8 +336,8 @@ CONFIG_BFIN_ICACHE=y ...@@ -336,8 +336,8 @@ CONFIG_BFIN_ICACHE=y
CONFIG_BFIN_DCACHE=y CONFIG_BFIN_DCACHE=y
# CONFIG_BFIN_DCACHE_BANKA is not set # CONFIG_BFIN_DCACHE_BANKA is not set
# CONFIG_BFIN_ICACHE_LOCK is not set # CONFIG_BFIN_ICACHE_LOCK is not set
# CONFIG_BFIN_WB is not set CONFIG_BFIN_WB=y
CONFIG_BFIN_WT=y # CONFIG_BFIN_WT is not set
CONFIG_L1_MAX_PIECE=16 CONFIG_L1_MAX_PIECE=16
# CONFIG_MPU is not set # CONFIG_MPU is not set
...@@ -595,7 +595,7 @@ CONFIG_SCSI=y ...@@ -595,7 +595,7 @@ CONFIG_SCSI=y
CONFIG_SCSI_DMA=y CONFIG_SCSI_DMA=y
# CONFIG_SCSI_TGT is not set # CONFIG_SCSI_TGT is not set
# CONFIG_SCSI_NETLINK is not set # CONFIG_SCSI_NETLINK is not set
CONFIG_SCSI_PROC_FS=y # CONFIG_SCSI_PROC_FS is not set
# #
# SCSI support type (disk, tape, CD-ROM) # SCSI support type (disk, tape, CD-ROM)
......
arch/blackfin/configs/IP0X_defconfig
浏览文件 @ 467c88fe
...@@ -612,7 +612,7 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 ...@@ -612,7 +612,7 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
CONFIG_SCSI=y CONFIG_SCSI=y
# CONFIG_SCSI_TGT is not set # CONFIG_SCSI_TGT is not set
# CONFIG_SCSI_NETLINK is not set # CONFIG_SCSI_NETLINK is not set
CONFIG_SCSI_PROC_FS=y # CONFIG_SCSI_PROC_FS is not set
# #
# SCSI support type (disk, tape, CD-ROM) # SCSI support type (disk, tape, CD-ROM)
......
arch/blackfin/configs/SRV1_defconfig
浏览文件 @ 467c88fe
...@@ -282,8 +282,8 @@ CONFIG_BFIN_ICACHE=y ...@@ -282,8 +282,8 @@ CONFIG_BFIN_ICACHE=y
CONFIG_BFIN_DCACHE=y CONFIG_BFIN_DCACHE=y
# CONFIG_BFIN_DCACHE_BANKA is not set # CONFIG_BFIN_DCACHE_BANKA is not set
# CONFIG_BFIN_ICACHE_LOCK is not set # CONFIG_BFIN_ICACHE_LOCK is not set
# CONFIG_BFIN_WB is not set CONFIG_BFIN_WB=y
CONFIG_BFIN_WT=y # CONFIG_BFIN_WT is not set
CONFIG_L1_MAX_PIECE=16 CONFIG_L1_MAX_PIECE=16
# #
......
arch/blackfin/include/asm/Kbuild
浏览文件 @ 467c88fe
include include/asm-generic/Kbuild.asm include include/asm-generic/Kbuild.asm
unifdef-y += bfin_sport.h
unifdef-y += fixed_code.h unifdef-y += fixed_code.h
arch/blackfin/include/asm/bfin_sport.h
浏览文件 @ 467c88fe
/* /*
* File: include/asm-blackfin/bfin_sport.h * bfin_sport.h - userspace header for bfin sport driver
* Based on:
* Author: Roy Huang (roy.huang@analog.com)
* *
* Created: Thu Aug. 24 2006 * Copyright 2004-2008 Analog Devices Inc.
* Description:
* *
* Modified: * Licensed under the GPL-2 or later.
* Copyright 2004-2006 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#ifndef __BFIN_SPORT_H__ #ifndef __BFIN_SPORT_H__
...@@ -42,11 +21,10 @@ ...@@ -42,11 +21,10 @@
#define NORM_FORMAT 0x0 #define NORM_FORMAT 0x0
#define ALAW_FORMAT 0x2 #define ALAW_FORMAT 0x2
#define ULAW_FORMAT 0x3 #define ULAW_FORMAT 0x3
struct sport_register;
/* Function driver which use sport must initialize the structure */ /* Function driver which use sport must initialize the structure */
struct sport_config { struct sport_config {
/*TDM (multichannels), I2S or other mode */ /* TDM (multichannels), I2S or other mode */
unsigned int mode:3; unsigned int mode:3;
/* if TDM mode is selected, channels must be set */ /* if TDM mode is selected, channels must be set */
...@@ -72,12 +50,18 @@ struct sport_config { ...@@ -72,12 +50,18 @@ struct sport_config {
int serial_clk; int serial_clk;
int fsync_clk; int fsync_clk;
unsigned int data_format:2; /*Normal, u-law or a-law */ unsigned int data_format:2; /* Normal, u-law or a-law */
int word_len; /* How length of the word in bits, 3-32 bits */ int word_len; /* How length of the word in bits, 3-32 bits */
int dma_enabled; int dma_enabled;
}; };
/* Userspace interface */
#define SPORT_IOC_MAGIC 'P'
#define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config)
#ifdef __KERNEL__
struct sport_register { struct sport_register {
unsigned short tcr1; unsigned short tcr1;
unsigned short reserved0; unsigned short reserved0;
...@@ -117,9 +101,6 @@ struct sport_register { ...@@ -117,9 +101,6 @@ struct sport_register {
unsigned long mrcs3; unsigned long mrcs3;
}; };
#define SPORT_IOC_MAGIC 'P'
#define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config)
struct sport_dev { struct sport_dev {
struct cdev cdev; /* Char device structure */ struct cdev cdev; /* Char device structure */
...@@ -149,6 +130,8 @@ struct sport_dev { ...@@ -149,6 +130,8 @@ struct sport_dev {
struct sport_config config; struct sport_config config;
}; };
#endif
#define SPORT_TCR1 0 #define SPORT_TCR1 0
#define SPORT_TCR2 1 #define SPORT_TCR2 1
#define SPORT_TCLKDIV 2 #define SPORT_TCLKDIV 2
...@@ -169,4 +152,4 @@ struct sport_dev { ...@@ -169,4 +152,4 @@ struct sport_dev {
#define SPORT_MRCS2 22 #define SPORT_MRCS2 22
#define SPORT_MRCS3 23 #define SPORT_MRCS3 23
#endif /*__BFIN_SPORT_H__*/ #endif
arch/blackfin/include/asm/ipipe.h
浏览文件 @ 467c88fe
...@@ -35,9 +35,9 @@ ...@@ -35,9 +35,9 @@
#include <asm/atomic.h> #include <asm/atomic.h>
#include <asm/traps.h> #include <asm/traps.h>
#define IPIPE_ARCH_STRING "1.8-00" #define IPIPE_ARCH_STRING "1.9-00"
#define IPIPE_MAJOR_NUMBER 1 #define IPIPE_MAJOR_NUMBER 1
#define IPIPE_MINOR_NUMBER 8 #define IPIPE_MINOR_NUMBER 9
#define IPIPE_PATCH_NUMBER 0 #define IPIPE_PATCH_NUMBER 0
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
...@@ -83,9 +83,9 @@ struct ipipe_sysinfo { ...@@ -83,9 +83,9 @@ struct ipipe_sysinfo {
"%2 = CYCLES2\n" \ "%2 = CYCLES2\n" \
"CC = %2 == %0\n" \ "CC = %2 == %0\n" \
"if ! CC jump 1b\n" \ "if ! CC jump 1b\n" \
: "=r" (((unsigned long *)&t)[1]), \ : "=d,a" (((unsigned long *)&t)[1]), \
"=r" (((unsigned long *)&t)[0]), \ "=d,a" (((unsigned long *)&t)[0]), \
"=r" (__cy2) \ "=d,a" (__cy2) \
: /*no input*/ : "CC"); \ : /*no input*/ : "CC"); \
t; \ t; \
}) })
...@@ -118,35 +118,40 @@ void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, ...@@ -118,35 +118,40 @@ void __ipipe_disable_irqdesc(struct ipipe_domain *ipd,
#define __ipipe_disable_irq(irq) (irq_desc[irq].chip->mask(irq)) #define __ipipe_disable_irq(irq) (irq_desc[irq].chip->mask(irq))
#define __ipipe_lock_root() \ static inline int __ipipe_check_tickdev(const char *devname)
set_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags) {
return 1;
}
#define __ipipe_unlock_root() \ static inline void __ipipe_lock_root(void)
clear_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags) {
set_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status));
}
static inline void __ipipe_unlock_root(void)
{
clear_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status));
}
void __ipipe_enable_pipeline(void); void __ipipe_enable_pipeline(void);
#define __ipipe_hook_critical_ipi(ipd) do { } while (0) #define __ipipe_hook_critical_ipi(ipd) do { } while (0)
#define __ipipe_sync_pipeline(syncmask) \ #define __ipipe_sync_pipeline ___ipipe_sync_pipeline
do { \ void ___ipipe_sync_pipeline(unsigned long syncmask);
struct ipipe_domain *ipd = ipipe_current_domain; \
if (likely(ipd != ipipe_root_domain || !test_bit(IPIPE_ROOTLOCK_FLAG, &ipd->flags))) \
__ipipe_sync_stage(syncmask); \
} while (0)
void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs); void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs);
int __ipipe_get_irq_priority(unsigned irq); int __ipipe_get_irq_priority(unsigned irq);
int __ipipe_get_irqthread_priority(unsigned irq);
void __ipipe_stall_root_raw(void); void __ipipe_stall_root_raw(void);
void __ipipe_unstall_root_raw(void); void __ipipe_unstall_root_raw(void);
void __ipipe_serial_debug(const char *fmt, ...); void __ipipe_serial_debug(const char *fmt, ...);
asmlinkage void __ipipe_call_irqtail(unsigned long addr);
DECLARE_PER_CPU(struct pt_regs, __ipipe_tick_regs); DECLARE_PER_CPU(struct pt_regs, __ipipe_tick_regs);
extern unsigned long __ipipe_core_clock; extern unsigned long __ipipe_core_clock;
...@@ -162,42 +167,25 @@ static inline unsigned long __ipipe_ffnz(unsigned long ul) ...@@ -162,42 +167,25 @@ static inline unsigned long __ipipe_ffnz(unsigned long ul)
#define __ipipe_run_irqtail() /* Must be a macro */ \ #define __ipipe_run_irqtail() /* Must be a macro */ \
do { \ do { \
asmlinkage void __ipipe_call_irqtail(void); \
unsigned long __pending; \ unsigned long __pending; \
CSYNC(); \ CSYNC(); \
__pending = bfin_read_IPEND(); \ __pending = bfin_read_IPEND(); \
if (__pending & 0x8000) { \ if (__pending & 0x8000) { \
__pending &= ~0x8010; \ __pending &= ~0x8010; \
if (__pending && (__pending & (__pending - 1)) == 0) \ if (__pending && (__pending & (__pending - 1)) == 0) \
__ipipe_call_irqtail(); \ __ipipe_call_irqtail(__ipipe_irq_tail_hook); \
} \ } \
} while (0) } while (0)
#define __ipipe_run_isr(ipd, irq) \ #define __ipipe_run_isr(ipd, irq) \
do { \ do { \
if (ipd == ipipe_root_domain) { \ if (ipd == ipipe_root_domain) { \
/* \ local_irq_enable_hw(); \
* Note: the I-pipe implements a threaded interrupt model on \ if (ipipe_virtual_irq_p(irq)) \
* this arch for Linux external IRQs. The interrupt handler we \
* call here only wakes up the associated IRQ thread. \
*/ \
if (ipipe_virtual_irq_p(irq)) { \
/* No irqtail here; virtual interrupts have no effect \
on IPEND so there is no need for processing \
deferral. */ \
local_irq_enable_nohead(ipd); \
ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \ ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \
local_irq_disable_nohead(ipd); \ else \
} else \
/* \
* No need to run the irqtail here either; \
* we can't be preempted by hw IRQs, so \
* non-Linux IRQs cannot stack over the short \
* thread wakeup code. Which in turn means \
* that no irqtail condition could be pending \
* for domains above Linux in the pipeline. \
*/ \
ipd->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); \ ipd->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); \
local_irq_disable_hw(); \
} else { \ } else { \
__clear_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \ __clear_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \
local_irq_enable_nohead(ipd); \ local_irq_enable_nohead(ipd); \
...@@ -217,42 +205,24 @@ void ipipe_init_irq_threads(void); ...@@ -217,42 +205,24 @@ void ipipe_init_irq_threads(void);
int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc); int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc);
#define IS_SYSIRQ(irq) ((irq) > IRQ_CORETMR && (irq) <= SYS_IRQS) #ifdef CONFIG_GENERIC_CLOCKEVENTS
#define IS_GPIOIRQ(irq) ((irq) >= GPIO_IRQ_BASE && (irq) < NR_IRQS) #define IRQ_SYSTMR IRQ_CORETMR
#define IRQ_PRIOTMR IRQ_CORETMR
#else
#define IRQ_SYSTMR IRQ_TIMER0 #define IRQ_SYSTMR IRQ_TIMER0
#define IRQ_PRIOTMR CONFIG_IRQ_TIMER0 #define IRQ_PRIOTMR CONFIG_IRQ_TIMER0
#endif
#if defined(CONFIG_BF531) || defined(CONFIG_BF532) || defined(CONFIG_BF533) #ifdef CONFIG_BF561
#define PRIO_GPIODEMUX(irq) CONFIG_PFA
#elif defined(CONFIG_BF534) || defined(CONFIG_BF536) || defined(CONFIG_BF537)
#define PRIO_GPIODEMUX(irq) CONFIG_IRQ_PROG_INTA
#elif defined(CONFIG_BF52x)
#define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PORTF_INTA ? CONFIG_IRQ_PORTF_INTA : \
(irq) == IRQ_PORTG_INTA ? CONFIG_IRQ_PORTG_INTA : \
(irq) == IRQ_PORTH_INTA ? CONFIG_IRQ_PORTH_INTA : \
-1)
#elif defined(CONFIG_BF561)
#define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PROG0_INTA ? CONFIG_IRQ_PROG0_INTA : \
(irq) == IRQ_PROG1_INTA ? CONFIG_IRQ_PROG1_INTA : \
(irq) == IRQ_PROG2_INTA ? CONFIG_IRQ_PROG2_INTA : \
-1)
#define bfin_write_TIMER_DISABLE(val) bfin_write_TMRS8_DISABLE(val) #define bfin_write_TIMER_DISABLE(val) bfin_write_TMRS8_DISABLE(val)
#define bfin_write_TIMER_ENABLE(val) bfin_write_TMRS8_ENABLE(val) #define bfin_write_TIMER_ENABLE(val) bfin_write_TMRS8_ENABLE(val)
#define bfin_write_TIMER_STATUS(val) bfin_write_TMRS8_STATUS(val) #define bfin_write_TIMER_STATUS(val) bfin_write_TMRS8_STATUS(val)
#define bfin_read_TIMER_STATUS() bfin_read_TMRS8_STATUS() #define bfin_read_TIMER_STATUS() bfin_read_TMRS8_STATUS()
#elif defined(CONFIG_BF54x) #elif defined(CONFIG_BF54x)
#define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PINT0 ? CONFIG_IRQ_PINT0 : \
(irq) == IRQ_PINT1 ? CONFIG_IRQ_PINT1 : \
(irq) == IRQ_PINT2 ? CONFIG_IRQ_PINT2 : \
(irq) == IRQ_PINT3 ? CONFIG_IRQ_PINT3 : \
-1)
#define bfin_write_TIMER_DISABLE(val) bfin_write_TIMER_DISABLE0(val) #define bfin_write_TIMER_DISABLE(val) bfin_write_TIMER_DISABLE0(val)
#define bfin_write_TIMER_ENABLE(val) bfin_write_TIMER_ENABLE0(val) #define bfin_write_TIMER_ENABLE(val) bfin_write_TIMER_ENABLE0(val)
#define bfin_write_TIMER_STATUS(val) bfin_write_TIMER_STATUS0(val) #define bfin_write_TIMER_STATUS(val) bfin_write_TIMER_STATUS0(val)
#define bfin_read_TIMER_STATUS(val) bfin_read_TIMER_STATUS0(val) #define bfin_read_TIMER_STATUS(val) bfin_read_TIMER_STATUS0(val)
#else
# error "no PRIO_GPIODEMUX() for this part"
#endif #endif
#define __ipipe_root_tick_p(regs) ((regs->ipend & 0x10) != 0) #define __ipipe_root_tick_p(regs) ((regs->ipend & 0x10) != 0)
...@@ -275,4 +245,6 @@ int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc); ...@@ -275,4 +245,6 @@ int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc);
#endif /* !CONFIG_IPIPE */ #endif /* !CONFIG_IPIPE */
#define ipipe_update_tick_evtdev(evtdev) do { } while (0)
#endif /* !__ASM_BLACKFIN_IPIPE_H */ #endif /* !__ASM_BLACKFIN_IPIPE_H */
arch/blackfin/include/asm/ipipe_base.h
浏览文件 @ 467c88fe
/* -*- linux-c -*- /* -*- linux-c -*-
* include/asm-blackfin/_baseipipe.h * include/asm-blackfin/ipipe_base.h
* *
* Copyright (C) 2007 Philippe Gerum. * Copyright (C) 2007 Philippe Gerum.
* *
...@@ -27,8 +27,9 @@ ...@@ -27,8 +27,9 @@
#define IPIPE_NR_XIRQS NR_IRQS #define IPIPE_NR_XIRQS NR_IRQS
#define IPIPE_IRQ_ISHIFT 5 /* 2^5 for 32bits arch. */ #define IPIPE_IRQ_ISHIFT 5 /* 2^5 for 32bits arch. */
/* Blackfin-specific, global domain flags */ /* Blackfin-specific, per-cpu pipeline status */
#define IPIPE_ROOTLOCK_FLAG 1 /* Lock pipeline for root */ #define IPIPE_SYNCDEFER_FLAG 15
#define IPIPE_SYNCDEFER_MASK (1L << IPIPE_SYNCDEFER_MASK)
/* Blackfin traps -- i.e. exception vector numbers */ /* Blackfin traps -- i.e. exception vector numbers */
#define IPIPE_NR_FAULTS 52 /* We leave a gap after VEC_ILL_RES. */ #define IPIPE_NR_FAULTS 52 /* We leave a gap after VEC_ILL_RES. */
...@@ -48,11 +49,6 @@ ...@@ -48,11 +49,6 @@
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
#include <linux/bitops.h>
extern int test_bit(int nr, const void *addr);
extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */ extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */
static inline void __ipipe_stall_root(void) static inline void __ipipe_stall_root(void)
......
arch/blackfin/include/asm/irq.h
浏览文件 @ 467c88fe
...@@ -61,20 +61,38 @@ void __ipipe_restore_root(unsigned long flags); ...@@ -61,20 +61,38 @@ void __ipipe_restore_root(unsigned long flags);
#define raw_irqs_disabled_flags(flags) (!irqs_enabled_from_flags_hw(flags)) #define raw_irqs_disabled_flags(flags) (!irqs_enabled_from_flags_hw(flags))
#define local_test_iflag_hw(x) irqs_enabled_from_flags_hw(x) #define local_test_iflag_hw(x) irqs_enabled_from_flags_hw(x)
#define local_save_flags(x) \ #define local_save_flags(x) \
do { \ do { \
(x) = __ipipe_test_root() ? \ (x) = __ipipe_test_root() ? \
__all_masked_irq_flags : bfin_irq_flags; \ __all_masked_irq_flags : bfin_irq_flags; \
barrier(); \
} while (0) } while (0)
#define local_irq_save(x) \ #define local_irq_save(x) \
do { \ do { \
(x) = __ipipe_test_and_stall_root(); \ (x) = __ipipe_test_and_stall_root() ? \
__all_masked_irq_flags : bfin_irq_flags; \
barrier(); \
} while (0)
static inline void local_irq_restore(unsigned long x)
{
barrier();
__ipipe_restore_root(x == __all_masked_irq_flags);
}
#define local_irq_disable() \
do { \
__ipipe_stall_root(); \
barrier(); \
} while (0) } while (0)
#define local_irq_restore(x) __ipipe_restore_root(x) static inline void local_irq_enable(void)
#define local_irq_disable() __ipipe_stall_root() {
#define local_irq_enable() __ipipe_unstall_root() barrier();
__ipipe_unstall_root();
}
#define irqs_disabled() __ipipe_test_root() #define irqs_disabled() __ipipe_test_root()
#define local_save_flags_hw(x) \ #define local_save_flags_hw(x) \
......
arch/blackfin/include/asm/percpu.h
浏览文件 @ 467c88fe
...@@ -3,14 +3,4 @@ ...@@ -3,14 +3,4 @@
#include <asm-generic/percpu.h> #include <asm-generic/percpu.h>
#ifdef CONFIG_MODULES
#define PERCPU_MODULE_RESERVE 8192
#else
#define PERCPU_MODULE_RESERVE 0
#endif
#define PERCPU_ENOUGH_ROOM \
(ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES) + \
PERCPU_MODULE_RESERVE)
#endif /* __ARCH_BLACKFIN_PERCPU__ */ #endif /* __ARCH_BLACKFIN_PERCPU__ */
arch/blackfin/include/asm/thread_info.h
浏览文件 @ 467c88fe
...@@ -122,6 +122,7 @@ static inline struct thread_info *current_thread_info(void) ...@@ -122,6 +122,7 @@ static inline struct thread_info *current_thread_info(void)
#define TIF_MEMDIE 4 #define TIF_MEMDIE 4
#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */ #define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */
#define TIF_FREEZE 6 /* is freezing for suspend */ #define TIF_FREEZE 6 /* is freezing for suspend */
#define TIF_IRQ_SYNC 7 /* sync pipeline stage */
/* as above, but as bit values */ /* as above, but as bit values */
#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
...@@ -130,6 +131,7 @@ static inline struct thread_info *current_thread_info(void) ...@@ -130,6 +131,7 @@ static inline struct thread_info *current_thread_info(void)
#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) #define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
#define _TIF_FREEZE (1<<TIF_FREEZE) #define _TIF_FREEZE (1<<TIF_FREEZE)
#define _TIF_IRQ_SYNC (1<<TIF_IRQ_SYNC)
#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */ #define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
......
arch/blackfin/kernel/Makefile
浏览文件 @ 467c88fe
...@@ -15,13 +15,15 @@ else ...@@ -15,13 +15,15 @@ else
obj-y += time.o obj-y += time.o
endif endif
CFLAGS_kgdb_test.o := -mlong-calls -O0
obj-$(CONFIG_IPIPE) += ipipe.o obj-$(CONFIG_IPIPE) += ipipe.o
obj-$(CONFIG_IPIPE_TRACE_MCOUNT) += mcount.o obj-$(CONFIG_IPIPE_TRACE_MCOUNT) += mcount.o
obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o
obj-$(CONFIG_CPLB_INFO) += cplbinfo.o obj-$(CONFIG_CPLB_INFO) += cplbinfo.o
obj-$(CONFIG_MODULES) += module.o obj-$(CONFIG_MODULES) += module.o
obj-$(CONFIG_KGDB) += kgdb.o obj-$(CONFIG_KGDB) += kgdb.o
obj-$(CONFIG_KGDB_TESTCASE) += kgdb_test.o obj-$(CONFIG_KGDB_TESTS) += kgdb_test.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
# the kgdb test puts code into L2 and without linker
# relaxation, we need to force long calls to/from it
CFLAGS_kgdb_test.o := -mlong-calls -O0
arch/blackfin/kernel/cplb-nompu/cplbinit.c
浏览文件 @ 467c88fe
...@@ -53,9 +53,13 @@ void __init generate_cplb_tables_cpu(unsigned int cpu) ...@@ -53,9 +53,13 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
i_d = i_i = 0; i_d = i_i = 0;
#ifdef CONFIG_DEBUG_HUNT_FOR_ZERO
/* Set up the zero page. */ /* Set up the zero page. */
d_tbl[i_d].addr = 0; d_tbl[i_d].addr = 0;
d_tbl[i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; d_tbl[i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB;
i_tbl[i_i].addr = 0;
i_tbl[i_i++].data = SDRAM_OOPS | PAGE_SIZE_1KB;
#endif
/* Cover kernel memory with 4M pages. */ /* Cover kernel memory with 4M pages. */
addr = 0; addr = 0;
......
arch/blackfin/kernel/ipipe.c
浏览文件 @ 467c88fe
...@@ -35,14 +35,8 @@ ...@@ -35,14 +35,8 @@
#include <asm/atomic.h> #include <asm/atomic.h>
#include <asm/io.h> #include <asm/io.h>
static int create_irq_threads;
DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs); DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs);
static DEFINE_PER_CPU(unsigned long, pending_irqthread_mask);
static DEFINE_PER_CPU(int [IVG13 + 1], pending_irq_count);
asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs); asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs);
static void __ipipe_no_irqtail(void); static void __ipipe_no_irqtail(void);
...@@ -93,6 +87,7 @@ void __ipipe_enable_pipeline(void) ...@@ -93,6 +87,7 @@ void __ipipe_enable_pipeline(void)
*/ */
void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
{ {
struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr();
struct ipipe_domain *this_domain, *next_domain; struct ipipe_domain *this_domain, *next_domain;
struct list_head *head, *pos; struct list_head *head, *pos;
int m_ack, s = -1; int m_ack, s = -1;
...@@ -104,7 +99,6 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) ...@@ -104,7 +99,6 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
* interrupt. * interrupt.
*/ */
m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR); m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR);
this_domain = ipipe_current_domain; this_domain = ipipe_current_domain;
if (unlikely(test_bit(IPIPE_STICKY_FLAG, &this_domain->irqs[irq].control))) if (unlikely(test_bit(IPIPE_STICKY_FLAG, &this_domain->irqs[irq].control)))
...@@ -114,49 +108,28 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) ...@@ -114,49 +108,28 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
next_domain = list_entry(head, struct ipipe_domain, p_link); next_domain = list_entry(head, struct ipipe_domain, p_link);
if (likely(test_bit(IPIPE_WIRED_FLAG, &next_domain->irqs[irq].control))) { if (likely(test_bit(IPIPE_WIRED_FLAG, &next_domain->irqs[irq].control))) {
if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) if (!m_ack && next_domain->irqs[irq].acknowledge != NULL)
next_domain->irqs[irq].acknowledge(irq, irq_desc + irq); next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq));
if (test_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags)) if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status))
s = __test_and_set_bit(IPIPE_STALL_FLAG, s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status);
&ipipe_root_cpudom_var(status));
__ipipe_dispatch_wired(next_domain, irq); __ipipe_dispatch_wired(next_domain, irq);
goto finalize; goto out;
return;
} }
} }
/* Ack the interrupt. */ /* Ack the interrupt. */
pos = head; pos = head;
while (pos != &__ipipe_pipeline) { while (pos != &__ipipe_pipeline) {
next_domain = list_entry(pos, struct ipipe_domain, p_link); next_domain = list_entry(pos, struct ipipe_domain, p_link);
/*
* For each domain handling the incoming IRQ, mark it
* as pending in its log.
*/
if (test_bit(IPIPE_HANDLE_FLAG, &next_domain->irqs[irq].control)) { if (test_bit(IPIPE_HANDLE_FLAG, &next_domain->irqs[irq].control)) {
/*
* Domains that handle this IRQ are polled for
* acknowledging it by decreasing priority
* order. The interrupt must be made pending
* _first_ in the domain's status flags before
* the PIC is unlocked.
*/
__ipipe_set_irq_pending(next_domain, irq); __ipipe_set_irq_pending(next_domain, irq);
if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) { if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) {
next_domain->irqs[irq].acknowledge(irq, irq_desc + irq); next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq));
m_ack = 1; m_ack = 1;
} }
} }
/*
* If the domain does not want the IRQ to be passed
* down the interrupt pipe, exit the loop now.
*/
if (!test_bit(IPIPE_PASS_FLAG, &next_domain->irqs[irq].control)) if (!test_bit(IPIPE_PASS_FLAG, &next_domain->irqs[irq].control))
break; break;
pos = next_domain->p_link.next; pos = next_domain->p_link.next;
} }
...@@ -166,18 +139,24 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) ...@@ -166,18 +139,24 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
* immediately to the current domain if the interrupt has been * immediately to the current domain if the interrupt has been
* marked as 'sticky'. This search does not go beyond the * marked as 'sticky'. This search does not go beyond the
* current domain in the pipeline. We also enforce the * current domain in the pipeline. We also enforce the
* additional root stage lock (blackfin-specific). */ * additional root stage lock (blackfin-specific).
*/
if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status))
s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status);
if (test_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags)) /*
s = __test_and_set_bit(IPIPE_STALL_FLAG, * If the interrupt preempted the head domain, then do not
&ipipe_root_cpudom_var(status)); * even try to walk the pipeline, unless an interrupt is
finalize: * pending for it.
*/
if (test_bit(IPIPE_AHEAD_FLAG, &this_domain->flags) &&
ipipe_head_cpudom_var(irqpend_himask) == 0)
goto out;
__ipipe_walk_pipeline(head); __ipipe_walk_pipeline(head);
out:
if (!s) if (!s)
__clear_bit(IPIPE_STALL_FLAG, __clear_bit(IPIPE_STALL_FLAG, &p->status);
&ipipe_root_cpudom_var(status));
} }
int __ipipe_check_root(void) int __ipipe_check_root(void)
...@@ -187,7 +166,7 @@ int __ipipe_check_root(void) ...@@ -187,7 +166,7 @@ int __ipipe_check_root(void)
void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq) void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
{ {
struct irq_desc *desc = irq_desc + irq; struct irq_desc *desc = irq_to_desc(irq);
int prio = desc->ic_prio; int prio = desc->ic_prio;
desc->depth = 0; desc->depth = 0;
...@@ -199,7 +178,7 @@ EXPORT_SYMBOL(__ipipe_enable_irqdesc); ...@@ -199,7 +178,7 @@ EXPORT_SYMBOL(__ipipe_enable_irqdesc);
void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq) void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
{ {
struct irq_desc *desc = irq_desc + irq; struct irq_desc *desc = irq_to_desc(irq);
int prio = desc->ic_prio; int prio = desc->ic_prio;
if (ipd != &ipipe_root && if (ipd != &ipipe_root &&
...@@ -236,15 +215,18 @@ int __ipipe_syscall_root(struct pt_regs *regs) ...@@ -236,15 +215,18 @@ int __ipipe_syscall_root(struct pt_regs *regs)
{ {
unsigned long flags; unsigned long flags;
/* We need to run the IRQ tail hook whenever we don't /*
* We need to run the IRQ tail hook whenever we don't
* propagate a syscall to higher domains, because we know that * propagate a syscall to higher domains, because we know that
* important operations might be pending there (e.g. Xenomai * important operations might be pending there (e.g. Xenomai
* deferred rescheduling). */ * deferred rescheduling).
*/
if (!__ipipe_syscall_watched_p(current, regs->orig_p0)) { if (regs->orig_p0 < NR_syscalls) {
void (*hook)(void) = (void (*)(void))__ipipe_irq_tail_hook; void (*hook)(void) = (void (*)(void))__ipipe_irq_tail_hook;
hook(); hook();
return 0; if ((current->flags & PF_EVNOTIFY) == 0)
return 0;
} }
/* /*
...@@ -312,112 +294,46 @@ int ipipe_trigger_irq(unsigned irq) ...@@ -312,112 +294,46 @@ int ipipe_trigger_irq(unsigned irq)
{ {
unsigned long flags; unsigned long flags;
#ifdef CONFIG_IPIPE_DEBUG
if (irq >= IPIPE_NR_IRQS || if (irq >= IPIPE_NR_IRQS ||
(ipipe_virtual_irq_p(irq) (ipipe_virtual_irq_p(irq)
&& !test_bit(irq - IPIPE_VIRQ_BASE, &__ipipe_virtual_irq_map))) && !test_bit(irq - IPIPE_VIRQ_BASE, &__ipipe_virtual_irq_map)))
return -EINVAL; return -EINVAL;
#endif
local_irq_save_hw(flags); local_irq_save_hw(flags);
__ipipe_handle_irq(irq, NULL); __ipipe_handle_irq(irq, NULL);
local_irq_restore_hw(flags); local_irq_restore_hw(flags);
return 1; return 1;
} }
/* Move Linux IRQ to threads. */ asmlinkage void __ipipe_sync_root(void)
static int do_irqd(void *__desc)
{ {
struct irq_desc *desc = __desc; unsigned long flags;
unsigned irq = desc - irq_desc;
int thrprio = desc->thr_prio;
int thrmask = 1 << thrprio;
int cpu = smp_processor_id();
cpumask_t cpumask;
sigfillset(&current->blocked);
current->flags |= PF_NOFREEZE;
cpumask = cpumask_of_cpu(cpu);
set_cpus_allowed(current, cpumask);
ipipe_setscheduler_root(current, SCHED_FIFO, 50 + thrprio);
while (!kthread_should_stop()) {
local_irq_disable();
if (!(desc->status & IRQ_SCHEDULED)) {
set_current_state(TASK_INTERRUPTIBLE);
resched:
local_irq_enable();
schedule();
local_irq_disable();
}
__set_current_state(TASK_RUNNING);
/*
* If higher priority interrupt servers are ready to
* run, reschedule immediately. We need this for the
* GPIO demux IRQ handler to unmask the interrupt line
* _last_, after all GPIO IRQs have run.
*/
if (per_cpu(pending_irqthread_mask, cpu) & ~(thrmask|(thrmask-1)))
goto resched;
if (--per_cpu(pending_irq_count[thrprio], cpu) == 0)
per_cpu(pending_irqthread_mask, cpu) &= ~thrmask;
desc->status &= ~IRQ_SCHEDULED;
desc->thr_handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs));
local_irq_enable();
}
__set_current_state(TASK_RUNNING);
return 0;
}
static void kick_irqd(unsigned irq, void *cookie) BUG_ON(irqs_disabled());
{
struct irq_desc *desc = irq_desc + irq;
int thrprio = desc->thr_prio;
int thrmask = 1 << thrprio;
int cpu = smp_processor_id();
if (!(desc->status & IRQ_SCHEDULED)) {
desc->status |= IRQ_SCHEDULED;
per_cpu(pending_irqthread_mask, cpu) |= thrmask;
++per_cpu(pending_irq_count[thrprio], cpu);
wake_up_process(desc->thread);
}
}
int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc) local_irq_save_hw(flags);
{
if (desc->thread || !create_irq_threads)
return 0;
desc->thread = kthread_create(do_irqd, desc, "IRQ %d", irq);
if (desc->thread == NULL) {
printk(KERN_ERR "irqd: could not create IRQ thread %d!\n", irq);
return -ENOMEM;
}
wake_up_process(desc->thread); clear_thread_flag(TIF_IRQ_SYNC);
desc->thr_handler = ipipe_root_domain->irqs[irq].handler; if (ipipe_root_cpudom_var(irqpend_himask) != 0)
ipipe_root_domain->irqs[irq].handler = &kick_irqd; __ipipe_sync_pipeline(IPIPE_IRQMASK_ANY);
return 0; local_irq_restore_hw(flags);
} }
void __init ipipe_init_irq_threads(void) void ___ipipe_sync_pipeline(unsigned long syncmask)
{ {
unsigned irq; struct ipipe_domain *ipd = ipipe_current_domain;
struct irq_desc *desc;
create_irq_threads = 1;
for (irq = 0; irq < NR_IRQS; irq++) { if (ipd == ipipe_root_domain) {
desc = irq_desc + irq; if (test_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)))
if (desc->action != NULL || return;
(desc->status & IRQ_NOREQUEST) != 0)
ipipe_start_irq_thread(irq, desc);
} }
__ipipe_sync_stage(syncmask);
} }
EXPORT_SYMBOL(show_stack); EXPORT_SYMBOL(show_stack);
......
arch/blackfin/kernel/irqchip.c
浏览文件 @ 467c88fe
...@@ -149,11 +149,15 @@ asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs) ...@@ -149,11 +149,15 @@ asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
#endif #endif
generic_handle_irq(irq); generic_handle_irq(irq);
#ifndef CONFIG_IPIPE /* Useless and bugous over the I-pipe: IRQs are threaded. */ #ifndef CONFIG_IPIPE
/* If we're the only interrupt running (ignoring IRQ15 which is for /*
syscalls), lower our priority to IRQ14 so that softirqs run at * If we're the only interrupt running (ignoring IRQ15 which
that level. If there's another, lower-level interrupt, irq_exit * is for syscalls), lower our priority to IRQ14 so that
will defer softirqs to that. */ * softirqs run at that level. If there's another,
* lower-level interrupt, irq_exit will defer softirqs to
* that. If the interrupt pipeline is enabled, we are already
* running at IRQ14 priority, so we don't need this code.
*/
CSYNC(); CSYNC();
pending = bfin_read_IPEND() & ~0x8000; pending = bfin_read_IPEND() & ~0x8000;
other_ints = pending & (pending - 1); other_ints = pending & (pending - 1);
......
arch/blackfin/kernel/kgdb_test.c
浏览文件 @ 467c88fe
...@@ -20,6 +20,7 @@ ...@@ -20,6 +20,7 @@
static char cmdline[256]; static char cmdline[256];
static unsigned long len; static unsigned long len;
#ifndef CONFIG_SMP
static int num1 __attribute__((l1_data)); static int num1 __attribute__((l1_data));
void kgdb_l1_test(void) __attribute__((l1_text)); void kgdb_l1_test(void) __attribute__((l1_text));
...@@ -32,6 +33,8 @@ void kgdb_l1_test(void) ...@@ -32,6 +33,8 @@ void kgdb_l1_test(void)
printk(KERN_ALERT "L1(after change) : data variable addr = 0x%p, data value is %d\n", &num1, num1); printk(KERN_ALERT "L1(after change) : data variable addr = 0x%p, data value is %d\n", &num1, num1);
return ; return ;
} }
#endif
#if L2_LENGTH #if L2_LENGTH
static int num2 __attribute__((l2)); static int num2 __attribute__((l2));
...@@ -59,10 +62,12 @@ int kgdb_test(char *name, int len, int count, int z) ...@@ -59,10 +62,12 @@ int kgdb_test(char *name, int len, int count, int z)
static int test_proc_output(char *buf) static int test_proc_output(char *buf)
{ {
kgdb_test("hello world!", 12, 0x55, 0x10); kgdb_test("hello world!", 12, 0x55, 0x10);
#ifndef CONFIG_SMP
kgdb_l1_test(); kgdb_l1_test();
#if L2_LENGTH #endif
#if L2_LENGTH
kgdb_l2_test(); kgdb_l2_test();
#endif #endif
return 0; return 0;
} }
......
arch/blackfin/kernel/ptrace.c
浏览文件 @ 467c88fe
...@@ -45,6 +45,7 @@ ...@@ -45,6 +45,7 @@
#include <asm/asm-offsets.h> #include <asm/asm-offsets.h>
#include <asm/dma.h> #include <asm/dma.h>
#include <asm/fixed_code.h> #include <asm/fixed_code.h>
#include <asm/cacheflush.h>
#include <asm/mem_map.h> #include <asm/mem_map.h>
#define TEXT_OFFSET 0 #define TEXT_OFFSET 0
...@@ -240,7 +241,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) ...@@ -240,7 +241,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
} else if (addr >= FIXED_CODE_START } else if (addr >= FIXED_CODE_START
&& addr + sizeof(tmp) <= FIXED_CODE_END) { && addr + sizeof(tmp) <= FIXED_CODE_END) {
memcpy(&tmp, (const void *)(addr), sizeof(tmp)); copy_from_user_page(0, 0, 0, &tmp, (const void *)(addr), sizeof(tmp));
copied = sizeof(tmp); copied = sizeof(tmp);
} else } else
...@@ -320,7 +321,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) ...@@ -320,7 +321,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
} else if (addr >= FIXED_CODE_START } else if (addr >= FIXED_CODE_START
&& addr + sizeof(data) <= FIXED_CODE_END) { && addr + sizeof(data) <= FIXED_CODE_END) {
memcpy((void *)(addr), &data, sizeof(data)); copy_to_user_page(0, 0, 0, (void *)(addr), &data, sizeof(data));
copied = sizeof(data); copied = sizeof(data);
} else } else
......
arch/blackfin/kernel/setup.c
浏览文件 @ 467c88fe
...@@ -889,6 +889,10 @@ void __init setup_arch(char **cmdline_p) ...@@ -889,6 +889,10 @@ void __init setup_arch(char **cmdline_p)
CPU, bfin_revid()); CPU, bfin_revid());
} }
/* We can't run on BF548-0.1 due to ANOMALY 05000448 */
if (bfin_cpuid() == 0x27de && bfin_revid() == 1)
panic("You can't run on this processor due to 05000448\n");
printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n"); printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n", printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
...@@ -1141,12 +1145,12 @@ static int show_cpuinfo(struct seq_file *m, void *v) ...@@ -1141,12 +1145,12 @@ static int show_cpuinfo(struct seq_file *m, void *v)
icache_size = 0; icache_size = 0;
seq_printf(m, "cache size\t: %d KB(L1 icache) " seq_printf(m, "cache size\t: %d KB(L1 icache) "
"%d KB(L1 dcache-%s) %d KB(L2 cache)\n", "%d KB(L1 dcache%s) %d KB(L2 cache)\n",
icache_size, dcache_size, icache_size, dcache_size,
#if defined CONFIG_BFIN_WB #if defined CONFIG_BFIN_WB
"wb" "-wb"
#elif defined CONFIG_BFIN_WT #elif defined CONFIG_BFIN_WT
"wt" "-wt"
#endif #endif
"", 0); "", 0);
......
arch/blackfin/kernel/time.c
浏览文件 @ 467c88fe
...@@ -134,7 +134,10 @@ irqreturn_t timer_interrupt(int irq, void *dummy) ...@@ -134,7 +134,10 @@ irqreturn_t timer_interrupt(int irq, void *dummy)
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
#if defined(CONFIG_TICK_SOURCE_SYSTMR0) && !defined(CONFIG_IPIPE) #if defined(CONFIG_TICK_SOURCE_SYSTMR0) && !defined(CONFIG_IPIPE)
/* FIXME: Here TIMIL0 is not set when IPIPE enabled, why? */ /*
* TIMIL0 is latched in __ipipe_grab_irq() when the I-Pipe is
* enabled.
*/
if (get_gptimer_status(0) & TIMER_STATUS_TIMIL0) { if (get_gptimer_status(0) & TIMER_STATUS_TIMIL0) {
#endif #endif
do_timer(1); do_timer(1);
......
arch/blackfin/mach-bf518/boards/ezbrd.c
浏览文件 @ 467c88fe
...@@ -113,7 +113,6 @@ static struct platform_device bfin_mac_device = { ...@@ -113,7 +113,6 @@ static struct platform_device bfin_mac_device = {
.name = "bfin_mac", .name = "bfin_mac",
.dev.platform_data = &bfin_mii_bus, .dev.platform_data = &bfin_mii_bus,
}; };
#endif
#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
static struct dsa_platform_data ksz8893m_switch_data = { static struct dsa_platform_data ksz8893m_switch_data = {
...@@ -132,6 +131,7 @@ static struct platform_device ksz8893m_switch_device = { ...@@ -132,6 +131,7 @@ static struct platform_device ksz8893m_switch_device = {
.dev.platform_data = &ksz8893m_switch_data, .dev.platform_data = &ksz8893m_switch_data,
}; };
#endif #endif
#endif
#if defined(CONFIG_MTD_M25P80) \ #if defined(CONFIG_MTD_M25P80) \
|| defined(CONFIG_MTD_M25P80_MODULE) || defined(CONFIG_MTD_M25P80_MODULE)
...@@ -171,6 +171,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = { ...@@ -171,6 +171,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
}; };
#endif #endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
#if defined(CONFIG_NET_DSA_KSZ8893M) \ #if defined(CONFIG_NET_DSA_KSZ8893M) \
|| defined(CONFIG_NET_DSA_KSZ8893M_MODULE) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
/* SPI SWITCH CHIP */ /* SPI SWITCH CHIP */
...@@ -179,10 +180,11 @@ static struct bfin5xx_spi_chip spi_switch_info = { ...@@ -179,10 +180,11 @@ static struct bfin5xx_spi_chip spi_switch_info = {
.bits_per_word = 8, .bits_per_word = 8,
}; };
#endif #endif
#endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = { static struct bfin5xx_spi_chip mmc_spi_chip_info = {
.enable_dma = 1, .enable_dma = 0,
.bits_per_word = 8, .bits_per_word = 8,
}; };
#endif #endif
...@@ -259,6 +261,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { ...@@ -259,6 +261,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
}, },
#endif #endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
#if defined(CONFIG_NET_DSA_KSZ8893M) \ #if defined(CONFIG_NET_DSA_KSZ8893M) \
|| defined(CONFIG_NET_DSA_KSZ8893M_MODULE) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
{ {
...@@ -271,24 +274,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { ...@@ -271,24 +274,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
.mode = SPI_MODE_3, .mode = SPI_MODE_3,
}, },
#endif #endif
#endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
{ {
.modalias = "spi_mmc_dummy", .modalias = "mmc_spi",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0, .bus_num = 0,
.chip_select = 0, .chip_select = 5,
.platform_data = NULL, .controller_data = &mmc_spi_chip_info,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3,
},
{
.modalias = "spi_mmc",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = CONFIG_SPI_MMC_CS_CHAN,
.platform_data = NULL,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3, .mode = SPI_MODE_3,
}, },
#endif #endif
...@@ -630,11 +624,10 @@ static struct platform_device *stamp_devices[] __initdata = { ...@@ -630,11 +624,10 @@ static struct platform_device *stamp_devices[] __initdata = {
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
&bfin_mii_bus, &bfin_mii_bus,
&bfin_mac_device, &bfin_mac_device,
#endif
#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
&ksz8893m_switch_device, &ksz8893m_switch_device,
#endif #endif
#endif
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
&bfin_spi0_device, &bfin_spi0_device,
......
arch/blackfin/mach-bf518/include/mach/anomaly.h
浏览文件 @ 467c88fe
...@@ -2,12 +2,12 @@ ...@@ -2,12 +2,12 @@
* File: include/asm-blackfin/mach-bf518/anomaly.h * File: include/asm-blackfin/mach-bf518/anomaly.h
* Bugs: Enter bugs at http://blackfin.uclinux.org/ * Bugs: Enter bugs at http://blackfin.uclinux.org/
* *
* Copyright (C) 2004-2008 Analog Devices Inc. * Copyright (C) 2004-2009 Analog Devices Inc.
* Licensed under the GPL-2 or later. * Licensed under the GPL-2 or later.
*/ */
/* This file shoule be up to date with: /* This file shoule be up to date with:
* - ???? * - Revision B, 02/03/2009; ADSP-BF512/BF514/BF516/BF518 Blackfin Processor Anomaly List
*/ */
#ifndef _MACH_ANOMALY_H_ #ifndef _MACH_ANOMALY_H_
...@@ -19,6 +19,8 @@ ...@@ -19,6 +19,8 @@
#define ANOMALY_05000122 (1) #define ANOMALY_05000122 (1)
/* False Hardware Error from an Access in the Shadow of a Conditional Branch */ /* False Hardware Error from an Access in the Shadow of a Conditional Branch */
#define ANOMALY_05000245 (1) #define ANOMALY_05000245 (1)
/* Incorrect Timer Pulse Width in Single-Shot PWM_OUT Mode with External Clock */
#define ANOMALY_05000254 (1)
/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
#define ANOMALY_05000265 (1) #define ANOMALY_05000265 (1)
/* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */
...@@ -53,6 +55,12 @@ ...@@ -53,6 +55,12 @@
#define ANOMALY_05000443 (1) #define ANOMALY_05000443 (1)
/* Incorrect L1 Instruction Bank B Memory Map Location */ /* Incorrect L1 Instruction Bank B Memory Map Location */
#define ANOMALY_05000444 (1) #define ANOMALY_05000444 (1)
/* Incorrect Default Hysteresis Setting for RESET, NMI, and BMODE Signals */
#define ANOMALY_05000452 (1)
/* PWM_TRIPB Signal Not Available on PG10 */
#define ANOMALY_05000453 (1)
/* PPI_FS3 is Driven One Half Cycle Later Than PPI Data */
#define ANOMALY_05000455 (1)
/* Anomalies that don't exist on this proc */ /* Anomalies that don't exist on this proc */
#define ANOMALY_05000125 (0) #define ANOMALY_05000125 (0)
...@@ -65,15 +73,20 @@ ...@@ -65,15 +73,20 @@
#define ANOMALY_05000263 (0) #define ANOMALY_05000263 (0)
#define ANOMALY_05000266 (0) #define ANOMALY_05000266 (0)
#define ANOMALY_05000273 (0) #define ANOMALY_05000273 (0)
#define ANOMALY_05000278 (0)
#define ANOMALY_05000285 (0) #define ANOMALY_05000285 (0)
#define ANOMALY_05000305 (0)
#define ANOMALY_05000307 (0) #define ANOMALY_05000307 (0)
#define ANOMALY_05000311 (0) #define ANOMALY_05000311 (0)
#define ANOMALY_05000312 (0) #define ANOMALY_05000312 (0)
#define ANOMALY_05000323 (0) #define ANOMALY_05000323 (0)
#define ANOMALY_05000353 (0) #define ANOMALY_05000353 (0)
#define ANOMALY_05000363 (0) #define ANOMALY_05000363 (0)
#define ANOMALY_05000380 (0)
#define ANOMALY_05000386 (0) #define ANOMALY_05000386 (0)
#define ANOMALY_05000412 (0) #define ANOMALY_05000412 (0)
#define ANOMALY_05000432 (0) #define ANOMALY_05000432 (0)
#define ANOMALY_05000447 (0)
#define ANOMALY_05000448 (0)
#endif #endif
arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h
浏览文件 @ 467c88fe
...@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = { ...@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
CH_UART0_TX, CH_UART0_TX,
CH_UART0_RX, CH_UART0_RX,
#endif #endif
#ifdef CONFIG_BFIN_UART0_CTSRTS #ifdef CONFIG_SERIAL_BFIN_CTSRTS
CONFIG_UART0_CTS_PIN, CONFIG_UART0_CTS_PIN,
CONFIG_UART0_RTS_PIN, CONFIG_UART0_RTS_PIN,
#endif #endif
...@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = { ...@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
CH_UART1_TX, CH_UART1_TX,
CH_UART1_RX, CH_UART1_RX,
#endif #endif
#ifdef CONFIG_BFIN_UART1_CTSRTS #ifdef CONFIG_SERIAL_BFIN_CTSRTS
CONFIG_UART1_CTS_PIN, CONFIG_UART1_CTS_PIN,
CONFIG_UART1_RTS_PIN, CONFIG_UART1_RTS_PIN,
#endif #endif
......
arch/blackfin/mach-bf527/boards/cm_bf527.c
浏览文件 @ 467c88fe
...@@ -487,9 +487,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = { ...@@ -487,9 +487,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
}; };
#endif #endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = { static struct bfin5xx_spi_chip mmc_spi_chip_info = {
.enable_dma = 1, .enable_dma = 0,
.bits_per_word = 8, .bits_per_word = 8,
}; };
#endif #endif
...@@ -585,23 +585,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { ...@@ -585,23 +585,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
.controller_data = &ad9960_spi_chip_info, .controller_data = &ad9960_spi_chip_info,
}, },
#endif #endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
{ {
.modalias = "spi_mmc_dummy", .modalias = "mmc_spi",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = 0,
.platform_data = NULL,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3,
},
{
.modalias = "spi_mmc",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0, .bus_num = 0,
.chip_select = CONFIG_SPI_MMC_CS_CHAN, .chip_select = 5,
.platform_data = NULL, .controller_data = &mmc_spi_chip_info,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3, .mode = SPI_MODE_3,
}, },
#endif #endif
......
arch/blackfin/mach-bf527/boards/ezbrd.c
浏览文件 @ 467c88fe
...@@ -256,9 +256,9 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = { ...@@ -256,9 +256,9 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
}; };
#endif #endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = { static struct bfin5xx_spi_chip mmc_spi_chip_info = {
.enable_dma = 1, .enable_dma = 0,
.bits_per_word = 8, .bits_per_word = 8,
}; };
#endif #endif
...@@ -366,23 +366,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { ...@@ -366,23 +366,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
}, },
#endif #endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
{ {
.modalias = "spi_mmc_dummy", .modalias = "mmc_spi",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0, .bus_num = 0,
.chip_select = 0, .chip_select = 5,
.platform_data = NULL, .controller_data = &mmc_spi_chip_info,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3,
},
{
.modalias = "spi_mmc",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = CONFIG_SPI_MMC_CS_CHAN,
.platform_data = NULL,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3, .mode = SPI_MODE_3,
}, },
#endif #endif
......
arch/blackfin/mach-bf527/include/mach/anomaly.h
浏览文件 @ 467c88fe
...@@ -2,7 +2,7 @@ ...@@ -2,7 +2,7 @@
* File: include/asm-blackfin/mach-bf527/anomaly.h * File: include/asm-blackfin/mach-bf527/anomaly.h
* Bugs: Enter bugs at http://blackfin.uclinux.org/ * Bugs: Enter bugs at http://blackfin.uclinux.org/
* *
* Copyright (C) 2004-2008 Analog Devices Inc. * Copyright (C) 2004-2009 Analog Devices Inc.
* Licensed under the GPL-2 or later. * Licensed under the GPL-2 or later.
*/ */
...@@ -167,12 +167,16 @@ ...@@ -167,12 +167,16 @@
#define ANOMALY_05000263 (0) #define ANOMALY_05000263 (0)
#define ANOMALY_05000266 (0) #define ANOMALY_05000266 (0)
#define ANOMALY_05000273 (0) #define ANOMALY_05000273 (0)
#define ANOMALY_05000278 (0)
#define ANOMALY_05000285 (0) #define ANOMALY_05000285 (0)
#define ANOMALY_05000305 (0)
#define ANOMALY_05000307 (0) #define ANOMALY_05000307 (0)
#define ANOMALY_05000311 (0) #define ANOMALY_05000311 (0)
#define ANOMALY_05000312 (0) #define ANOMALY_05000312 (0)
#define ANOMALY_05000323 (0) #define ANOMALY_05000323 (0)
#define ANOMALY_05000363 (0) #define ANOMALY_05000363 (0)
#define ANOMALY_05000412 (0) #define ANOMALY_05000412 (0)
#define ANOMALY_05000447 (0)
#define ANOMALY_05000448 (0)
#endif #endif
arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
浏览文件 @ 467c88fe
...@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = { ...@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
CH_UART0_TX, CH_UART0_TX,
CH_UART0_RX, CH_UART0_RX,
#endif #endif
#ifdef CONFIG_BFIN_UART0_CTSRTS #ifdef CONFIG_SERIAL_BFIN_CTSRTS
CONFIG_UART0_CTS_PIN, CONFIG_UART0_CTS_PIN,
CONFIG_UART0_RTS_PIN, CONFIG_UART0_RTS_PIN,
#endif #endif
...@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = { ...@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
CH_UART1_TX, CH_UART1_TX,
CH_UART1_RX, CH_UART1_RX,
#endif #endif
#ifdef CONFIG_BFIN_UART1_CTSRTS #ifdef CONFIG_SERIAL_BFIN_CTSRTS
CONFIG_UART1_CTS_PIN, CONFIG_UART1_CTS_PIN,
CONFIG_UART1_RTS_PIN, CONFIG_UART1_RTS_PIN,
#endif #endif
......
arch/blackfin/mach-bf533/boards/Kconfig
浏览文件 @ 467c88fe
...@@ -38,9 +38,4 @@ config BFIN532_IP0X ...@@ -38,9 +38,4 @@ config BFIN532_IP0X
help help
Core support for IP04/IP04 open hardware IP-PBX. Core support for IP04/IP04 open hardware IP-PBX.
config GENERIC_BF533_BOARD
bool "Generic"
help
Generic or Custom board support.
endchoice endchoice
arch/blackfin/mach-bf533/boards/Makefile
浏览文件 @ 467c88fe
...@@ -2,7 +2,6 @@ ...@@ -2,7 +2,6 @@
# arch/blackfin/mach-bf533/boards/Makefile # arch/blackfin/mach-bf533/boards/Makefile
# #
obj-$(CONFIG_GENERIC_BF533_BOARD) += generic_board.o
obj-$(CONFIG_BFIN533_STAMP) += stamp.o obj-$(CONFIG_BFIN533_STAMP) += stamp.o
obj-$(CONFIG_BFIN532_IP0X) += ip0x.o obj-$(CONFIG_BFIN532_IP0X) += ip0x.o
obj-$(CONFIG_BFIN533_EZKIT) += ezkit.o obj-$(CONFIG_BFIN533_EZKIT) += ezkit.o
......
arch/blackfin/mach-bf533/boards/blackstamp.c
浏览文件 @ 467c88fe
...@@ -101,9 +101,9 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { ...@@ -101,9 +101,9 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
}; };
#endif #endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = { static struct bfin5xx_spi_chip mmc_spi_chip_info = {
.enable_dma = 1, .enable_dma = 0,
.bits_per_word = 8, .bits_per_word = 8,
}; };
#endif #endif
...@@ -129,23 +129,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { ...@@ -129,23 +129,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
}, },
#endif #endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
{
.modalias = "spi_mmc_dummy",
.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = 0,
.platform_data = NULL,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3,
},
{ {
.modalias = "spi_mmc", .modalias = "mmc_spi",
.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0, .bus_num = 0,
.chip_select = CONFIG_SPI_MMC_CS_CHAN, .chip_select = 5,
.platform_data = NULL, .controller_data = &mmc_spi_chip_info,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3, .mode = SPI_MODE_3,
}, },
#endif #endif
......
arch/blackfin/mach-bf533/boards/cm_bf533.c
浏览文件 @ 467c88fe
...@@ -96,9 +96,9 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = { ...@@ -96,9 +96,9 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
}; };
#endif #endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = { static struct bfin5xx_spi_chip mmc_spi_chip_info = {
.enable_dma = 1, .enable_dma = 0,
.bits_per_word = 8, .bits_per_word = 8,
}; };
#endif #endif
...@@ -138,23 +138,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { ...@@ -138,23 +138,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
}, },
#endif #endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
{
.modalias = "spi_mmc_dummy",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = 0,
.platform_data = NULL,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3,
},
{ {
.modalias = "spi_mmc", .modalias = "mmc_spi",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0, .bus_num = 0,
.chip_select = CONFIG_SPI_MMC_CS_CHAN, .chip_select = 5,
.platform_data = NULL, .controller_data = &mmc_spi_chip_info,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3, .mode = SPI_MODE_3,
}, },
#endif #endif
......
arch/blackfin/mach-bf533/boards/generic_board.c 已删除 100644 → 0
浏览文件 @ 1f442d70
/*
* File: arch/blackfin/mach-bf533/generic_board.c
* Based on: arch/blackfin/mach-bf533/ezkit.c
* Author: Aidan Williams <aidan@nicta.com.au>
*
* Created: 2005
* Description:
*
* Modified:
* Copyright 2005 National ICT Australia (NICTA)
* Copyright 2004-2006 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/irq.h>
/*
* Name the Board for the /proc/cpuinfo
*/
const char bfin_board_name[] = "UNKNOWN BOARD";
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
.name = "rtc-bfin",
.id = -1,
};
#endif
/*
* Driver needs to know address, irq and flag pin.
*/
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
static struct resource smc91x_resources[] = {
{
.start = 0x20300300,
.end = 0x20300300 + 16,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_PROG_INTB,
.end = IRQ_PROG_INTB,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
}, {
.start = IRQ_PF7,
.end = IRQ_PF7,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
},
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = 0,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
};
#endif
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
static struct resource bfin_sir0_resources[] = {
{
.start = 0xFFC00400,
.end = 0xFFC004FF,
.flags = IORESOURCE_MEM,
},
{
.start = IRQ_UART0_RX,
.end = IRQ_UART0_RX+1,
.flags = IORESOURCE_IRQ,
},
{
.start = CH_UART0_RX,
.end = CH_UART0_RX+1,
.flags = IORESOURCE_DMA,
},
};
static struct platform_device bfin_sir0_device = {
.name = "bfin_sir",
.id = 0,
.num_resources = ARRAY_SIZE(bfin_sir0_resources),
.resource = bfin_sir0_resources,
};
#endif
#endif
static struct platform_device *generic_board_devices[] __initdata = {
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
&rtc_device,
#endif
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
&smc91x_device,
#endif
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
&bfin_sir0_device,
#endif
#endif
};
static int __init generic_board_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
return platform_add_devices(generic_board_devices, ARRAY_SIZE(generic_board_devices));
}
arch_initcall(generic_board_init);
arch/blackfin/mach-bf533/boards/ip0x.c
浏览文件 @ 467c88fe
...@@ -127,8 +127,8 @@ static struct platform_device dm9000_device2 = { ...@@ -127,8 +127,8 @@ static struct platform_device dm9000_device2 = {
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */ /* all SPI peripherals info goes here */
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = { static struct bfin5xx_spi_chip mmc_spi_chip_info = {
/* /*
* CPOL (Clock Polarity) * CPOL (Clock Polarity)
* 0 - Active high SCK * 0 - Active high SCK
...@@ -152,14 +152,13 @@ static struct bfin5xx_spi_chip spi_mmc_chip_info = { ...@@ -152,14 +152,13 @@ static struct bfin5xx_spi_chip spi_mmc_chip_info = {
/* Notice: for blackfin, the speed_hz is the value of register /* Notice: for blackfin, the speed_hz is the value of register
* SPI_BAUD, not the real baudrate */ * SPI_BAUD, not the real baudrate */
static struct spi_board_info bfin_spi_board_info[] __initdata = { static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
{ {
.modalias = "spi_mmc", .modalias = "mmc_spi",
.max_speed_hz = 2, .max_speed_hz = 2,
.bus_num = 1, .bus_num = 1,
.chip_select = CONFIG_SPI_MMC_CS_CHAN, .chip_select = 5,
.platform_data = NULL, .controller_data = &mmc_spi_chip_info,
.controller_data = &spi_mmc_chip_info,
}, },
#endif #endif
}; };
......
arch/blackfin/mach-bf533/include/mach/anomaly.h
浏览文件 @ 467c88fe
...@@ -2,7 +2,7 @@ ...@@ -2,7 +2,7 @@
* File: include/asm-blackfin/mach-bf533/anomaly.h * File: include/asm-blackfin/mach-bf533/anomaly.h
* Bugs: Enter bugs at http://blackfin.uclinux.org/ * Bugs: Enter bugs at http://blackfin.uclinux.org/
* *
* Copyright (C) 2004-2008 Analog Devices Inc. * Copyright (C) 2004-2009 Analog Devices Inc.
* Licensed under the GPL-2 or later. * Licensed under the GPL-2 or later.
*/ */
...@@ -160,7 +160,7 @@ ...@@ -160,7 +160,7 @@
#define ANOMALY_05000301 (__SILICON_REVISION__ < 6) #define ANOMALY_05000301 (__SILICON_REVISION__ < 6)
/* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */ /* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */
#define ANOMALY_05000302 (__SILICON_REVISION__ < 5) #define ANOMALY_05000302 (__SILICON_REVISION__ < 5)
/* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */ /* SPORT_HYS Bit in PLL_CTL Register Is Not Functional */
#define ANOMALY_05000305 (__SILICON_REVISION__ < 5) #define ANOMALY_05000305 (__SILICON_REVISION__ < 5)
/* New Feature: Additional PPI Frame Sync Sampling Options (Not Available On Older Silicon) */ /* New Feature: Additional PPI Frame Sync Sampling Options (Not Available On Older Silicon) */
#define ANOMALY_05000306 (__SILICON_REVISION__ < 5) #define ANOMALY_05000306 (__SILICON_REVISION__ < 5)
...@@ -278,9 +278,12 @@ ...@@ -278,9 +278,12 @@
#define ANOMALY_05000266 (0) #define ANOMALY_05000266 (0)
#define ANOMALY_05000323 (0) #define ANOMALY_05000323 (0)
#define ANOMALY_05000353 (1) #define ANOMALY_05000353 (1)
#define ANOMALY_05000380 (0)
#define ANOMALY_05000386 (1) #define ANOMALY_05000386 (1)
#define ANOMALY_05000412 (0) #define ANOMALY_05000412 (0)
#define ANOMALY_05000432 (0) #define ANOMALY_05000432 (0)
#define ANOMALY_05000435 (0) #define ANOMALY_05000435 (0)
#define ANOMALY_05000447 (0)
#define ANOMALY_05000448 (0)
#endif #endif
arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
浏览文件 @ 467c88fe
...@@ -134,7 +134,7 @@ struct bfin_serial_res bfin_serial_resource[] = { ...@@ -134,7 +134,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
CH_UART_TX, CH_UART_TX,
CH_UART_RX, CH_UART_RX,
#endif #endif
#ifdef CONFIG_BFIN_UART0_CTSRTS #ifdef CONFIG_SERIAL_BFIN_CTSRTS
CONFIG_UART0_CTS_PIN, CONFIG_UART0_CTS_PIN,
CONFIG_UART0_RTS_PIN, CONFIG_UART0_RTS_PIN,
#endif #endif
......
arch/blackfin/mach-bf537/boards/Kconfig
浏览文件 @ 467c88fe
...@@ -33,9 +33,4 @@ config CAMSIG_MINOTAUR ...@@ -33,9 +33,4 @@ config CAMSIG_MINOTAUR
help help
Board supply package for CSP Minotaur Board supply package for CSP Minotaur
config GENERIC_BF537_BOARD
bool "Generic"
help
Generic or Custom board support.
endchoice endchoice
arch/blackfin/mach-bf537/boards/Makefile
浏览文件 @ 467c88fe
...@@ -2,7 +2,6 @@ ...@@ -2,7 +2,6 @@
# arch/blackfin/mach-bf537/boards/Makefile # arch/blackfin/mach-bf537/boards/Makefile
# #
obj-$(CONFIG_GENERIC_BF537_BOARD) += generic_board.o
obj-$(CONFIG_BFIN537_STAMP) += stamp.o obj-$(CONFIG_BFIN537_STAMP) += stamp.o
obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o
obj-$(CONFIG_BFIN537_BLUETECHNIX_TCM) += tcm_bf537.o obj-$(CONFIG_BFIN537_BLUETECHNIX_TCM) += tcm_bf537.o
......
arch/blackfin/mach-bf537/boards/cm_bf537.c
浏览文件 @ 467c88fe
...@@ -108,9 +108,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = { ...@@ -108,9 +108,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
}; };
#endif #endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = { static struct bfin5xx_spi_chip mmc_spi_chip_info = {
.enable_dma = 1, .enable_dma = 0,
.bits_per_word = 8, .bits_per_word = 8,
}; };
#endif #endif
...@@ -160,23 +160,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { ...@@ -160,23 +160,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
}, },
#endif #endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
{
.modalias = "spi_mmc_dummy",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = 7,
.platform_data = NULL,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3,
},
{ {
.modalias = "spi_mmc", .modalias = "mmc_spi",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0, .bus_num = 0,
.chip_select = CONFIG_SPI_MMC_CS_CHAN, .chip_select = 1,
.platform_data = NULL, .controller_data = &mmc_spi_chip_info,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3, .mode = SPI_MODE_3,
}, },
#endif #endif
......
arch/blackfin/mach-bf537/boards/generic_board.c 已删除 100644 → 0
浏览文件 @ 1f442d70
/*
* File: arch/blackfin/mach-bf537/boards/generic_board.c
* Based on: arch/blackfin/mach-bf533/boards/ezkit.c
* Author: Aidan Williams <aidan@nicta.com.au>
*
* Created:
* Description:
*
* Modified:
* Copyright 2005 National ICT Australia (NICTA)
* Copyright 2004-2008 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/device.h>
#include <linux/etherdevice.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
#endif
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/usb/sl811.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/reboot.h>
#include <asm/portmux.h>
#include <linux/spi/ad7877.h>
/*
* Name the Board for the /proc/cpuinfo
*/
const char bfin_board_name[] = "UNKNOWN BOARD";
/*
* Driver needs to know address, irq and flag pin.
*/
#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
#include <linux/usb/isp1760.h>
static struct resource bfin_isp1760_resources[] = {
[0] = {
.start = 0x203C0000,
.end = 0x203C0000 + 0x000fffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_PF7,
.end = IRQ_PF7,
.flags = IORESOURCE_IRQ,
},
};
static struct isp1760_platform_data isp1760_priv = {
.is_isp1761 = 0,
.port1_disable = 0,
.bus_width_16 = 1,
.port1_otg = 0,
.analog_oc = 0,
.dack_polarity_high = 0,
.dreq_polarity_high = 0,
};
static struct platform_device bfin_isp1760_device = {
.name = "isp1760-hcd",
.id = 0,
.dev = {
.platform_data = &isp1760_priv,
},
.num_resources = ARRAY_SIZE(bfin_isp1760_resources),
.resource = bfin_isp1760_resources,
};
#endif
#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
static struct resource bfin_pcmcia_cf_resources[] = {
{
.start = 0x20310000, /* IO PORT */
.end = 0x20312000,
.flags = IORESOURCE_MEM,
}, {
.start = 0x20311000, /* Attribute Memory */
.end = 0x20311FFF,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_PF4,
.end = IRQ_PF4,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
}, {
.start = 6, /* Card Detect PF6 */
.end = 6,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device bfin_pcmcia_cf_device = {
.name = "bfin_cf_pcmcia",
.id = -1,
.num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
.resource = bfin_pcmcia_cf_resources,
};
#endif
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
.name = "rtc-bfin",
.id = -1,
};
#endif
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
static struct resource smc91x_resources[] = {
{
.name = "smc91x-regs",
.start = 0x20300300,
.end = 0x20300300 + 16,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_PF7,
.end = IRQ_PF7,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
},
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = 0,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
};
#endif
#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
static struct resource dm9000_resources[] = {
[0] = {
.start = 0x203FB800,
.end = 0x203FB800 + 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 0x203FB800 + 4,
.end = 0x203FB800 + 5,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = IRQ_PF9,
.end = IRQ_PF9,
.flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
},
};
static struct platform_device dm9000_device = {
.name = "dm9000",
.id = -1,
.num_resources = ARRAY_SIZE(dm9000_resources),
.resource = dm9000_resources,
};
#endif
#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
static struct resource sl811_hcd_resources[] = {
{
.start = 0x20340000,
.end = 0x20340000,
.flags = IORESOURCE_MEM,
}, {
.start = 0x20340004,
.end = 0x20340004,
.flags = IORESOURCE_MEM,
}, {
.start = CONFIG_USB_SL811_BFIN_IRQ,
.end = CONFIG_USB_SL811_BFIN_IRQ,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
},
};
#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
void sl811_port_power(struct device *dev, int is_on)
{
gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
}
#endif
static struct sl811_platform_data sl811_priv = {
.potpg = 10,
.power = 250, /* == 500mA */
#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
.port_power = &sl811_port_power,
#endif
};
static struct platform_device sl811_hcd_device = {
.name = "sl811-hcd",
.id = 0,
.dev = {
.platform_data = &sl811_priv,
},
.num_resources = ARRAY_SIZE(sl811_hcd_resources),
.resource = sl811_hcd_resources,
};
#endif
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
static struct resource isp1362_hcd_resources[] = {
{
.start = 0x20360000,
.end = 0x20360000,
.flags = IORESOURCE_MEM,
}, {
.start = 0x20360004,
.end = 0x20360004,
.flags = IORESOURCE_MEM,
}, {
.start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
.end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
},
};
static struct isp1362_platform_data isp1362_priv = {
.sel15Kres = 1,
.clknotstop = 0,
.oc_enable = 0,
.int_act_high = 0,
.int_edge_triggered = 0,
.remote_wakeup_connected = 0,
.no_power_switching = 1,
.power_switching_mode = 0,
};
static struct platform_device isp1362_hcd_device = {
.name = "isp1362-hcd",
.id = 0,
.dev = {
.platform_data = &isp1362_priv,
},
.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
.resource = isp1362_hcd_resources,
};
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
static struct platform_device bfin_mii_bus = {
.name = "bfin_mii_bus",
};
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
.dev.platform_data = &bfin_mii_bus,
};
#endif
#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
static struct resource net2272_bfin_resources[] = {
{
.start = 0x20300000,
.end = 0x20300000 + 0x100,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_PF7,
.end = IRQ_PF7,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
},
};
static struct platform_device net2272_bfin_device = {
.name = "net2272",
.id = -1,
.num_resources = ARRAY_SIZE(net2272_bfin_resources),
.resource = net2272_bfin_resources,
};
#endif
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */
#if defined(CONFIG_MTD_M25P80) \
|| defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
{
.name = "bootloader(spi)",
.size = 0x00020000,
.offset = 0,
.mask_flags = MTD_CAP_ROM
}, {
.name = "linux kernel(spi)",
.size = 0xe0000,
.offset = 0x20000
}, {
.name = "file system(spi)",
.size = 0x700000,
.offset = 0x00100000,
}
};
static struct flash_platform_data bfin_spi_flash_data = {
.name = "m25p80",
.parts = bfin_spi_flash_partitions,
.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
.type = "m25p64",
};
/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
.enable_dma = 0, /* use dma transfer with this chip*/
.bits_per_word = 8,
};
#endif
#if defined(CONFIG_SPI_ADC_BF533) \
|| defined(CONFIG_SPI_ADC_BF533_MODULE)
/* SPI ADC chip */
static struct bfin5xx_spi_chip spi_adc_chip_info = {
.enable_dma = 1, /* use dma transfer with this chip*/
.bits_per_word = 16,
};
#endif
#if defined(CONFIG_SND_BLACKFIN_AD1836) \
|| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
.enable_dma = 0,
.bits_per_word = 16,
};
#endif
#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
.enable_dma = 0,
.bits_per_word = 16,
};
#endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = {
.enable_dma = 1,
.bits_per_word = 8,
};
#endif
#if defined(CONFIG_PBX)
static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
.ctl_reg = 0x4, /* send zero */
.enable_dma = 0,
.bits_per_word = 8,
.cs_change_per_word = 1,
};
#endif
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
.enable_dma = 0,
.bits_per_word = 16,
};
static const struct ad7877_platform_data bfin_ad7877_ts_info = {
.model = 7877,
.vref_delay_usecs = 50, /* internal, no capacitor */
.x_plate_ohms = 419,
.y_plate_ohms = 486,
.pressure_max = 1000,
.pressure_min = 0,
.stopacq_polarity = 1,
.first_conversion_delay = 3,
.acquisition_time = 1,
.averaging = 1,
.pen_down_acc_interval = 1,
};
#endif
static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) \
|| defined(CONFIG_MTD_M25P80_MODULE)
{
/* the modalias must be the same as spi device driver name */
.modalias = "m25p80", /* Name of spi_driver for this device */
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0, /* Framework bus number */
.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
.platform_data = &bfin_spi_flash_data,
.controller_data = &spi_flash_chip_info,
.mode = SPI_MODE_3,
},
#endif
#if defined(CONFIG_SPI_ADC_BF533) \
|| defined(CONFIG_SPI_ADC_BF533_MODULE)
{
.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0, /* Framework bus number */
.chip_select = 1, /* Framework chip select. */
.platform_data = NULL, /* No spi_driver specific config */
.controller_data = &spi_adc_chip_info,
},
#endif
#if defined(CONFIG_SND_BLACKFIN_AD1836) \
|| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
{
.modalias = "ad1836-spi",
.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
.controller_data = &ad1836_spi_chip_info,
},
#endif
#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
{
.modalias = "ad9960-spi",
.max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = 1,
.controller_data = &ad9960_spi_chip_info,
},
#endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
{
.modalias = "spi_mmc_dummy",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = 0,
.platform_data = NULL,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3,
},
{
.modalias = "spi_mmc",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = CONFIG_SPI_MMC_CS_CHAN,
.platform_data = NULL,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3,
},
#endif
#if defined(CONFIG_PBX)
{
.modalias = "fxs-spi",
.max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = 8 - CONFIG_J11_JUMPER,
.controller_data = &spi_si3xxx_chip_info,
.mode = SPI_MODE_3,
},
{
.modalias = "fxo-spi",
.max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = 8 - CONFIG_J19_JUMPER,
.controller_data = &spi_si3xxx_chip_info,
.mode = SPI_MODE_3,
},
#endif
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
{
.modalias = "ad7877",
.platform_data = &bfin_ad7877_ts_info,
.irq = IRQ_PF6,
.max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = 1,
.controller_data = &spi_ad7877_chip_info,
},
#endif
};
/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
.num_chipselect = 8,
.enable_dma = 1, /* master has the ability to do dma transfer */
.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};
/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
[0] = {
.start = SPI0_REGBASE,
.end = SPI0_REGBASE + 0xFF,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = CH_SPI,
.end = CH_SPI,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device bfin_spi0_device = {
.name = "bfin-spi",
.id = 0, /* Bus number */
.num_resources = ARRAY_SIZE(bfin_spi0_resource),
.resource = bfin_spi0_resource,
.dev = {
.platform_data = &bfin_spi0_info, /* Passed to driver */
},
};
#endif /* spi master and devices */
#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
static struct platform_device bfin_fb_device = {
.name = "bf537-lq035",
};
#endif
#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
static struct platform_device bfin_fb_adv7393_device = {
.name = "bfin-adv7393",
};
#endif
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
static struct resource bfin_uart_resources[] = {
{
.start = 0xFFC00400,
.end = 0xFFC004FF,
.flags = IORESOURCE_MEM,
}, {
.start = 0xFFC02000,
.end = 0xFFC020FF,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device bfin_uart_device = {
.name = "bfin-uart",
.id = 1,
.num_resources = ARRAY_SIZE(bfin_uart_resources),
.resource = bfin_uart_resources,
};
#endif
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
static struct resource bfin_sir0_resources[] = {
{
.start = 0xFFC00400,
.end = 0xFFC004FF,
.flags = IORESOURCE_MEM,
},
{
.start = IRQ_UART0_RX,
.end = IRQ_UART0_RX+1,
.flags = IORESOURCE_IRQ,
},
{
.start = CH_UART0_RX,
.end = CH_UART0_RX+1,
.flags = IORESOURCE_DMA,
},
};
static struct platform_device bfin_sir0_device = {
.name = "bfin_sir",
.id = 0,
.num_resources = ARRAY_SIZE(bfin_sir0_resources),
.resource = bfin_sir0_resources,
};
#endif
#ifdef CONFIG_BFIN_SIR1
static struct resource bfin_sir1_resources[] = {
{
.start = 0xFFC02000,
.end = 0xFFC020FF,
.flags = IORESOURCE_MEM,
},
{
.start = IRQ_UART1_RX,
.end = IRQ_UART1_RX+1,
.flags = IORESOURCE_IRQ,
},
{
.start = CH_UART1_RX,
.end = CH_UART1_RX+1,
.flags = IORESOURCE_DMA,
},
};
static struct platform_device bfin_sir1_device = {
.name = "bfin_sir",
.id = 1,
.num_resources = ARRAY_SIZE(bfin_sir1_resources),
.resource = bfin_sir1_resources,
};
#endif
#endif
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
static struct resource bfin_twi0_resource[] = {
[0] = {
.start = TWI0_REGBASE,
.end = TWI0_REGBASE + 0xFF,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_TWI,
.end = IRQ_TWI,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device i2c_bfin_twi_device = {
.name = "i2c-bfin-twi",
.id = 0,
.num_resources = ARRAY_SIZE(bfin_twi0_resource),
.resource = bfin_twi0_resource,
};
#endif
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
.name = "bfin-sport-uart",
.id = 0,
};
static struct platform_device bfin_sport1_uart_device = {
.name = "bfin-sport-uart",
.id = 1,
};
#endif
static struct platform_device *stamp_devices[] __initdata = {
#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
&bfin_pcmcia_cf_device,
#endif
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
&rtc_device,
#endif
#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
&sl811_hcd_device,
#endif
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
&isp1362_hcd_device,
#endif
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
&smc91x_device,
#endif
#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
&dm9000_device,
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
&bfin_mii_bus,
&bfin_mac_device,
#endif
#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
&net2272_bfin_device,
#endif
#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
&bfin_isp1760_device,
#endif
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
&bfin_spi0_device,
#endif
#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
&bfin_fb_device,
#endif
#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
&bfin_fb_adv7393_device,
#endif
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
&bfin_uart_device,
#endif
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
&bfin_sir0_device,
#endif
#ifdef CONFIG_BFIN_SIR1
&bfin_sir1_device,
#endif
#endif
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
&i2c_bfin_twi_device,
#endif
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
&bfin_sport0_uart_device,
&bfin_sport1_uart_device,
#endif
};
static int __init generic_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
spi_register_board_info(bfin_spi_board_info,
ARRAY_SIZE(bfin_spi_board_info));
#endif
return 0;
}
arch_initcall(generic_init);
void native_machine_restart(char *cmd)
{
/* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3)
bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
}
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
void bfin_get_ether_addr(char *addr)
{
random_ether_addr(addr);
printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
}
EXPORT_SYMBOL(bfin_get_ether_addr);
#endif
arch/blackfin/mach-bf537/boards/minotaur.c
浏览文件 @ 467c88fe
...@@ -134,9 +134,9 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { ...@@ -134,9 +134,9 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
}; };
#endif #endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = { static struct bfin5xx_spi_chip mmc_spi_chip_info = {
.enable_dma = 1, .enable_dma = 0,
.bits_per_word = 8, .bits_per_word = 8,
}; };
#endif #endif
...@@ -156,23 +156,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { ...@@ -156,23 +156,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
}, },
#endif #endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
{ {
.modalias = "spi_mmc_dummy", .modalias = "mmc_spi",
.max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0, .bus_num = 0,
.chip_select = 0, .chip_select = 5,
.platform_data = NULL, .controller_data = &mmc_spi_chip_info,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3,
},
{
.modalias = "spi_mmc",
.max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = CONFIG_SPI_MMC_CS_CHAN,
.platform_data = NULL,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3, .mode = SPI_MODE_3,
}, },
#endif #endif
......
arch/blackfin/mach-bf537/boards/pnav10.c
浏览文件 @ 467c88fe
...@@ -289,9 +289,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = { ...@@ -289,9 +289,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
}; };
#endif #endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = { static struct bfin5xx_spi_chip mmc_spi_chip_info = {
.enable_dma = 1, .enable_dma = 0,
.bits_per_word = 8, .bits_per_word = 8,
}; };
#endif #endif
...@@ -364,23 +364,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { ...@@ -364,23 +364,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
.controller_data = &ad9960_spi_chip_info, .controller_data = &ad9960_spi_chip_info,
}, },
#endif #endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
{
.modalias = "spi_mmc_dummy",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = 7,
.platform_data = NULL,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3,
},
{ {
.modalias = "spi_mmc", .modalias = "mmc_spi",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0, .bus_num = 0,
.chip_select = CONFIG_SPI_MMC_CS_CHAN, .chip_select = 5,
.platform_data = NULL, .controller_data = &mmc_spi_chip_info,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3, .mode = SPI_MODE_3,
}, },
#endif #endif
......
arch/blackfin/mach-bf537/boards/tcm_bf537.c
浏览文件 @ 467c88fe
...@@ -108,9 +108,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = { ...@@ -108,9 +108,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
}; };
#endif #endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = { static struct bfin5xx_spi_chip mmc_spi_chip_info = {
.enable_dma = 1, .enable_dma = 0,
.bits_per_word = 8, .bits_per_word = 8,
}; };
#endif #endif
...@@ -160,23 +160,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { ...@@ -160,23 +160,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
}, },
#endif #endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
{
.modalias = "spi_mmc_dummy",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = 7,
.platform_data = NULL,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3,
},
{ {
.modalias = "spi_mmc", .modalias = "mmc_spi",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0, .bus_num = 0,
.chip_select = CONFIG_SPI_MMC_CS_CHAN, .chip_select = 5,
.platform_data = NULL, .controller_data = &mmc_spi_chip_info,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3, .mode = SPI_MODE_3,
}, },
#endif #endif
......
arch/blackfin/mach-bf537/include/mach/anomaly.h
浏览文件 @ 467c88fe
...@@ -2,7 +2,7 @@ ...@@ -2,7 +2,7 @@
* File: include/asm-blackfin/mach-bf537/anomaly.h * File: include/asm-blackfin/mach-bf537/anomaly.h
* Bugs: Enter bugs at http://blackfin.uclinux.org/ * Bugs: Enter bugs at http://blackfin.uclinux.org/
* *
* Copyright (C) 2004-2008 Analog Devices Inc. * Copyright (C) 2004-2009 Analog Devices Inc.
* Licensed under the GPL-2 or later. * Licensed under the GPL-2 or later.
*/ */
...@@ -110,7 +110,7 @@ ...@@ -110,7 +110,7 @@
#define ANOMALY_05000301 (1) #define ANOMALY_05000301 (1)
/* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */ /* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */
#define ANOMALY_05000304 (__SILICON_REVISION__ < 3) #define ANOMALY_05000304 (__SILICON_REVISION__ < 3)
/* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */ /* SPORT_HYS Bit in PLL_CTL Register Is Not Functional */
#define ANOMALY_05000305 (__SILICON_REVISION__ < 3) #define ANOMALY_05000305 (__SILICON_REVISION__ < 3)
/* SCKELOW Bit Does Not Maintain State Through Hibernate */ /* SCKELOW Bit Does Not Maintain State Through Hibernate */
#define ANOMALY_05000307 (__SILICON_REVISION__ < 3) #define ANOMALY_05000307 (__SILICON_REVISION__ < 3)
...@@ -168,9 +168,12 @@ ...@@ -168,9 +168,12 @@
#define ANOMALY_05000323 (0) #define ANOMALY_05000323 (0)
#define ANOMALY_05000353 (1) #define ANOMALY_05000353 (1)
#define ANOMALY_05000363 (0) #define ANOMALY_05000363 (0)
#define ANOMALY_05000380 (0)
#define ANOMALY_05000386 (1) #define ANOMALY_05000386 (1)
#define ANOMALY_05000412 (0) #define ANOMALY_05000412 (0)
#define ANOMALY_05000432 (0) #define ANOMALY_05000432 (0)
#define ANOMALY_05000435 (0) #define ANOMALY_05000435 (0)
#define ANOMALY_05000447 (0)
#define ANOMALY_05000448 (0)
#endif #endif
arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h
浏览文件 @ 467c88fe
...@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = { ...@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
CH_UART0_TX, CH_UART0_TX,
CH_UART0_RX, CH_UART0_RX,
#endif #endif
#ifdef CONFIG_BFIN_UART0_CTSRTS #ifdef CONFIG_SERIAL_BFIN_CTSRTS
CONFIG_UART0_CTS_PIN, CONFIG_UART0_CTS_PIN,
CONFIG_UART0_RTS_PIN, CONFIG_UART0_RTS_PIN,
#endif #endif
...@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = { ...@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
CH_UART1_TX, CH_UART1_TX,
CH_UART1_RX, CH_UART1_RX,
#endif #endif
#ifdef CONFIG_BFIN_UART1_CTSRTS #ifdef CONFIG_SERIAL_BFIN_CTSRTS
CONFIG_UART1_CTS_PIN, CONFIG_UART1_CTS_PIN,
CONFIG_UART1_RTS_PIN, CONFIG_UART1_RTS_PIN,
#endif #endif
......
arch/blackfin/mach-bf538/include/mach/anomaly.h
浏览文件 @ 467c88fe
...@@ -2,7 +2,7 @@ ...@@ -2,7 +2,7 @@
* File: include/asm-blackfin/mach-bf538/anomaly.h * File: include/asm-blackfin/mach-bf538/anomaly.h
* Bugs: Enter bugs at http://blackfin.uclinux.org/ * Bugs: Enter bugs at http://blackfin.uclinux.org/
* *
* Copyright (C) 2004-2008 Analog Devices Inc. * Copyright (C) 2004-2009 Analog Devices Inc.
* Licensed under the GPL-2 or later. * Licensed under the GPL-2 or later.
*/ */
...@@ -120,13 +120,17 @@ ...@@ -120,13 +120,17 @@
#define ANOMALY_05000198 (0) #define ANOMALY_05000198 (0)
#define ANOMALY_05000230 (0) #define ANOMALY_05000230 (0)
#define ANOMALY_05000263 (0) #define ANOMALY_05000263 (0)
#define ANOMALY_05000305 (0)
#define ANOMALY_05000311 (0) #define ANOMALY_05000311 (0)
#define ANOMALY_05000323 (0) #define ANOMALY_05000323 (0)
#define ANOMALY_05000353 (1) #define ANOMALY_05000353 (1)
#define ANOMALY_05000363 (0) #define ANOMALY_05000363 (0)
#define ANOMALY_05000380 (0)
#define ANOMALY_05000386 (1) #define ANOMALY_05000386 (1)
#define ANOMALY_05000412 (0) #define ANOMALY_05000412 (0)
#define ANOMALY_05000432 (0) #define ANOMALY_05000432 (0)
#define ANOMALY_05000435 (0) #define ANOMALY_05000435 (0)
#define ANOMALY_05000447 (0)
#define ANOMALY_05000448 (0)
#endif #endif
arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h
浏览文件 @ 467c88fe
...@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = { ...@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
CH_UART0_TX, CH_UART0_TX,
CH_UART0_RX, CH_UART0_RX,
#endif #endif
#ifdef CONFIG_BFIN_UART0_CTSRTS #ifdef CONFIG_SERIAL_BFIN_CTSRTS
CONFIG_UART0_CTS_PIN, CONFIG_UART0_CTS_PIN,
CONFIG_UART0_RTS_PIN, CONFIG_UART0_RTS_PIN,
#endif #endif
...@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = { ...@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
CH_UART1_TX, CH_UART1_TX,
CH_UART1_RX, CH_UART1_RX,
#endif #endif
#ifdef CONFIG_BFIN_UART1_CTSRTS #ifdef CONFIG_SERIAL_BFIN_CTSRTS
CONFIG_UART1_CTS_PIN, CONFIG_UART1_CTS_PIN,
CONFIG_UART1_RTS_PIN, CONFIG_UART1_RTS_PIN,
#endif #endif
......
arch/blackfin/mach-bf548/include/mach/anomaly.h
浏览文件 @ 467c88fe
...@@ -2,12 +2,12 @@ ...@@ -2,12 +2,12 @@
* File: include/asm-blackfin/mach-bf548/anomaly.h * File: include/asm-blackfin/mach-bf548/anomaly.h
* Bugs: Enter bugs at http://blackfin.uclinux.org/ * Bugs: Enter bugs at http://blackfin.uclinux.org/
* *
* Copyright (C) 2004-2008 Analog Devices Inc. * Copyright (C) 2004-2009 Analog Devices Inc.
* Licensed under the GPL-2 or later. * Licensed under the GPL-2 or later.
*/ */
/* This file shoule be up to date with: /* This file shoule be up to date with:
* - Revision G, 08/07/2008; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List * - Revision H, 01/16/2009; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List
*/ */
#ifndef _MACH_ANOMALY_H_ #ifndef _MACH_ANOMALY_H_
...@@ -91,8 +91,6 @@ ...@@ -91,8 +91,6 @@
#define ANOMALY_05000371 (__SILICON_REVISION__ < 2) #define ANOMALY_05000371 (__SILICON_REVISION__ < 2)
/* USB DP/DM Data Pins May Lose State When Entering Hibernate */ /* USB DP/DM Data Pins May Lose State When Entering Hibernate */
#define ANOMALY_05000372 (__SILICON_REVISION__ < 1) #define ANOMALY_05000372 (__SILICON_REVISION__ < 1)
/* Mobile DDR Operation Not Functional */
#define ANOMALY_05000377 (1)
/* Security/Authentication Speedpath Causes Authentication To Fail To Initiate */ /* Security/Authentication Speedpath Causes Authentication To Fail To Initiate */
#define ANOMALY_05000378 (__SILICON_REVISION__ < 2) #define ANOMALY_05000378 (__SILICON_REVISION__ < 2)
/* 16-Bit NAND FLASH Boot Mode Is Not Functional */ /* 16-Bit NAND FLASH Boot Mode Is Not Functional */
...@@ -157,8 +155,22 @@ ...@@ -157,8 +155,22 @@
#define ANOMALY_05000429 (__SILICON_REVISION__ < 2) #define ANOMALY_05000429 (__SILICON_REVISION__ < 2)
/* Software System Reset Corrupts PLL_LOCKCNT Register */ /* Software System Reset Corrupts PLL_LOCKCNT Register */
#define ANOMALY_05000430 (__SILICON_REVISION__ >= 2) #define ANOMALY_05000430 (__SILICON_REVISION__ >= 2)
/* Incorrect Use of Stack in Lockbox Firmware During Authentication */
#define ANOMALY_05000431 (__SILICON_REVISION__ < 3)
/* OTP Write Accesses Not Supported */
#define ANOMALY_05000442 (__SILICON_REVISION__ < 1)
/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
#define ANOMALY_05000443 (1) #define ANOMALY_05000443 (1)
/* CDMAPRIO and L2DMAPRIO Bits in the SYSCR Register Are Not Functional */
#define ANOMALY_05000446 (1)
/* UART IrDA Receiver Fails on Extended Bit Pulses */
#define ANOMALY_05000447 (1)
/* DDR Clock Duty Cycle Spec Violation (tCH, tCL) */
#define ANOMALY_05000448 (__SILICON_REVISION__ == 1)
/* Reduced Timing Margins on DDR Output Setup and Hold (tDS and tDH) */
#define ANOMALY_05000449 (__SILICON_REVISION__ == 1)
/* USB DMA Mode 1 Short Packet Data Corruption */
#define ANOMALY_05000450 (1
/* Anomalies that don't exist on this proc */ /* Anomalies that don't exist on this proc */
#define ANOMALY_05000125 (0) #define ANOMALY_05000125 (0)
...@@ -171,6 +183,8 @@ ...@@ -171,6 +183,8 @@
#define ANOMALY_05000263 (0) #define ANOMALY_05000263 (0)
#define ANOMALY_05000266 (0) #define ANOMALY_05000266 (0)
#define ANOMALY_05000273 (0) #define ANOMALY_05000273 (0)
#define ANOMALY_05000278 (0)
#define ANOMALY_05000305 (0)
#define ANOMALY_05000307 (0) #define ANOMALY_05000307 (0)
#define ANOMALY_05000311 (0) #define ANOMALY_05000311 (0)
#define ANOMALY_05000323 (0) #define ANOMALY_05000323 (0)
......
arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h
浏览文件 @ 467c88fe
...@@ -63,7 +63,7 @@ ...@@ -63,7 +63,7 @@
#define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v) #define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v)
#define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF) #define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF)
#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART2_CTSRTS)
# define CONFIG_SERIAL_BFIN_CTSRTS # define CONFIG_SERIAL_BFIN_CTSRTS
# ifndef CONFIG_UART0_CTS_PIN # ifndef CONFIG_UART0_CTS_PIN
...@@ -74,12 +74,12 @@ ...@@ -74,12 +74,12 @@
# define CONFIG_UART0_RTS_PIN -1 # define CONFIG_UART0_RTS_PIN -1
# endif # endif
# ifndef CONFIG_UART1_CTS_PIN # ifndef CONFIG_UART2_CTS_PIN
# define CONFIG_UART1_CTS_PIN -1 # define CONFIG_UART2_CTS_PIN -1
# endif # endif
# ifndef CONFIG_UART1_RTS_PIN # ifndef CONFIG_UART2_RTS_PIN
# define CONFIG_UART1_RTS_PIN -1 # define CONFIG_UART2_RTS_PIN -1
# endif # endif
#endif #endif
...@@ -130,7 +130,7 @@ struct bfin_serial_res bfin_serial_resource[] = { ...@@ -130,7 +130,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
CH_UART0_TX, CH_UART0_TX,
CH_UART0_RX, CH_UART0_RX,
#endif #endif
#ifdef CONFIG_BFIN_UART0_CTSRTS #ifdef CONFIG_SERIAL_BFIN_CTSRTS
CONFIG_UART0_CTS_PIN, CONFIG_UART0_CTS_PIN,
CONFIG_UART0_RTS_PIN, CONFIG_UART0_RTS_PIN,
#endif #endif
...@@ -143,6 +143,10 @@ struct bfin_serial_res bfin_serial_resource[] = { ...@@ -143,6 +143,10 @@ struct bfin_serial_res bfin_serial_resource[] = {
#ifdef CONFIG_SERIAL_BFIN_DMA #ifdef CONFIG_SERIAL_BFIN_DMA
CH_UART1_TX, CH_UART1_TX,
CH_UART1_RX, CH_UART1_RX,
#endif
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
0,
0,
#endif #endif
}, },
#endif #endif
...@@ -154,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = { ...@@ -154,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
CH_UART2_TX, CH_UART2_TX,
CH_UART2_RX, CH_UART2_RX,
#endif #endif
#ifdef CONFIG_BFIN_UART2_CTSRTS #ifdef CONFIG_SERIAL_BFIN_CTSRTS
CONFIG_UART2_CTS_PIN, CONFIG_UART2_CTS_PIN,
CONFIG_UART2_RTS_PIN, CONFIG_UART2_RTS_PIN,
#endif #endif
...@@ -167,6 +171,10 @@ struct bfin_serial_res bfin_serial_resource[] = { ...@@ -167,6 +171,10 @@ struct bfin_serial_res bfin_serial_resource[] = {
#ifdef CONFIG_SERIAL_BFIN_DMA #ifdef CONFIG_SERIAL_BFIN_DMA
CH_UART3_TX, CH_UART3_TX,
CH_UART3_RX, CH_UART3_RX,
#endif
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
0,
0,
#endif #endif
}, },
#endif #endif
......
arch/blackfin/mach-bf548/include/mach/irq.h
浏览文件 @ 467c88fe
...@@ -123,8 +123,8 @@ Events (highest priority) EMU 0 ...@@ -123,8 +123,8 @@ Events (highest priority) EMU 0
#define IRQ_MXVR_ERROR BFIN_IRQ(51) /* MXVR Status (Error) Interrupt */ #define IRQ_MXVR_ERROR BFIN_IRQ(51) /* MXVR Status (Error) Interrupt */
#define IRQ_MXVR_MSG BFIN_IRQ(52) /* MXVR Message Interrupt */ #define IRQ_MXVR_MSG BFIN_IRQ(52) /* MXVR Message Interrupt */
#define IRQ_MXVR_PKT BFIN_IRQ(53) /* MXVR Packet Interrupt */ #define IRQ_MXVR_PKT BFIN_IRQ(53) /* MXVR Packet Interrupt */
#define IRQ_EPP1_ERROR BFIN_IRQ(54) /* EPPI1 Error Interrupt */ #define IRQ_EPPI1_ERROR BFIN_IRQ(54) /* EPPI1 Error Interrupt */
#define IRQ_EPP2_ERROR BFIN_IRQ(55) /* EPPI2 Error Interrupt */ #define IRQ_EPPI2_ERROR BFIN_IRQ(55) /* EPPI2 Error Interrupt */
#define IRQ_UART3_ERROR BFIN_IRQ(56) /* UART3 Status (Error) Interrupt */ #define IRQ_UART3_ERROR BFIN_IRQ(56) /* UART3 Status (Error) Interrupt */
#define IRQ_HOST_ERROR BFIN_IRQ(57) /* HOST Status (Error) Interrupt */ #define IRQ_HOST_ERROR BFIN_IRQ(57) /* HOST Status (Error) Interrupt */
#define IRQ_PIXC_ERROR BFIN_IRQ(59) /* PIXC Status (Error) Interrupt */ #define IRQ_PIXC_ERROR BFIN_IRQ(59) /* PIXC Status (Error) Interrupt */
...@@ -361,8 +361,8 @@ Events (highest priority) EMU 0 ...@@ -361,8 +361,8 @@ Events (highest priority) EMU 0
#define IRQ_UART2_ERR IRQ_UART2_ERROR #define IRQ_UART2_ERR IRQ_UART2_ERROR
#define IRQ_CAN0_ERR IRQ_CAN0_ERROR #define IRQ_CAN0_ERR IRQ_CAN0_ERROR
#define IRQ_MXVR_ERR IRQ_MXVR_ERROR #define IRQ_MXVR_ERR IRQ_MXVR_ERROR
#define IRQ_EPP1_ERR IRQ_EPP1_ERROR #define IRQ_EPPI1_ERR IRQ_EPPI1_ERROR
#define IRQ_EPP2_ERR IRQ_EPP2_ERROR #define IRQ_EPPI2_ERR IRQ_EPPI2_ERROR
#define IRQ_UART3_ERR IRQ_UART3_ERROR #define IRQ_UART3_ERR IRQ_UART3_ERROR
#define IRQ_HOST_ERR IRQ_HOST_ERROR #define IRQ_HOST_ERR IRQ_HOST_ERROR
#define IRQ_PIXC_ERR IRQ_PIXC_ERROR #define IRQ_PIXC_ERR IRQ_PIXC_ERROR
......
arch/blackfin/mach-bf561/boards/Kconfig
浏览文件 @ 467c88fe
...@@ -19,9 +19,4 @@ config BFIN561_BLUETECHNIX_CM ...@@ -19,9 +19,4 @@ config BFIN561_BLUETECHNIX_CM
help help
CM-BF561 support for EVAL- and DEV-Board. CM-BF561 support for EVAL- and DEV-Board.
config GENERIC_BF561_BOARD
bool "Generic"
help
Generic or Custom board support.
endchoice endchoice
arch/blackfin/mach-bf561/boards/Makefile
浏览文件 @ 467c88fe
...@@ -2,7 +2,6 @@ ...@@ -2,7 +2,6 @@
# arch/blackfin/mach-bf561/boards/Makefile # arch/blackfin/mach-bf561/boards/Makefile
# #
obj-$(CONFIG_GENERIC_BF561_BOARD) += generic_board.o
obj-$(CONFIG_BFIN561_BLUETECHNIX_CM) += cm_bf561.o obj-$(CONFIG_BFIN561_BLUETECHNIX_CM) += cm_bf561.o
obj-$(CONFIG_BFIN561_EZKIT) += ezkit.o obj-$(CONFIG_BFIN561_EZKIT) += ezkit.o
obj-$(CONFIG_BFIN561_TEPLA) += tepla.o obj-$(CONFIG_BFIN561_TEPLA) += tepla.o
arch/blackfin/mach-bf561/boards/cm_bf561.c
浏览文件 @ 467c88fe
...@@ -105,9 +105,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = { ...@@ -105,9 +105,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
}; };
#endif #endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = { static struct bfin5xx_spi_chip mmc_spi_chip_info = {
.enable_dma = 1, .enable_dma = 0,
.bits_per_word = 8, .bits_per_word = 8,
}; };
#endif #endif
...@@ -155,14 +155,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { ...@@ -155,14 +155,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
.controller_data = &ad9960_spi_chip_info, .controller_data = &ad9960_spi_chip_info,
}, },
#endif #endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
{ {
.modalias = "spi_mmc", .modalias = "mmc_spi",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0, .bus_num = 0,
.chip_select = CONFIG_SPI_MMC_CS_CHAN, .chip_select = 5,
.platform_data = NULL, .controller_data = &mmc_spi_chip_info,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3, .mode = SPI_MODE_3,
}, },
#endif #endif
......
arch/blackfin/mach-bf561/boards/generic_board.c 已删除 100644 → 0
浏览文件 @ 1f442d70
/*
* File: arch/blackfin/mach-bf561/generic_board.c
* Based on: arch/blackfin/mach-bf533/ezkit.c
* Author: Aidan Williams <aidan@nicta.com.au>
*
* Created:
* Description:
*
* Modified:
* Copyright 2005 National ICT Australia (NICTA)
* Copyright 2004-2006 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/irq.h>
const char bfin_board_name[] = "UNKNOWN BOARD";
/*
* Driver needs to know address, irq and flag pin.
*/
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
static struct resource smc91x_resources[] = {
{
.start = 0x2C010300,
.end = 0x2C010300 + 16,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_PROG_INTB,
.end = IRQ_PROG_INTB,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
}, {
.start = IRQ_PF9,
.end = IRQ_PF9,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
},
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = 0,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
};
#endif
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
static struct resource bfin_sir0_resources[] = {
{
.start = 0xFFC00400,
.end = 0xFFC004FF,
.flags = IORESOURCE_MEM,
},
{
.start = IRQ_UART0_RX,
.end = IRQ_UART0_RX+1,
.flags = IORESOURCE_IRQ,
},
{
.start = CH_UART0_RX,
.end = CH_UART0_RX+1,
.flags = IORESOURCE_DMA,
},
};
static struct platform_device bfin_sir0_device = {
.name = "bfin_sir",
.id = 0,
.num_resources = ARRAY_SIZE(bfin_sir0_resources),
.resource = bfin_sir0_resources,
};
#endif
#endif
static struct platform_device *generic_board_devices[] __initdata = {
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
&smc91x_device,
#endif
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
&bfin_sir0_device,
#endif
#endif
};
static int __init generic_board_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
return platform_add_devices(generic_board_devices,
ARRAY_SIZE(generic_board_devices));
}
arch_initcall(generic_board_init);
arch/blackfin/mach-bf561/include/mach/anomaly.h
浏览文件 @ 467c88fe
...@@ -2,7 +2,7 @@ ...@@ -2,7 +2,7 @@
* File: include/asm-blackfin/mach-bf561/anomaly.h * File: include/asm-blackfin/mach-bf561/anomaly.h
* Bugs: Enter bugs at http://blackfin.uclinux.org/ * Bugs: Enter bugs at http://blackfin.uclinux.org/
* *
* Copyright (C) 2004-2008 Analog Devices Inc. * Copyright (C) 2004-2009 Analog Devices Inc.
* Licensed under the GPL-2 or later. * Licensed under the GPL-2 or later.
*/ */
...@@ -224,7 +224,7 @@ ...@@ -224,7 +224,7 @@
#define ANOMALY_05000301 (1) #define ANOMALY_05000301 (1)
/* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */ /* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */
#define ANOMALY_05000302 (1) #define ANOMALY_05000302 (1)
/* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */ /* SPORT_HYS Bit in PLL_CTL Register Is Not Functional */
#define ANOMALY_05000305 (__SILICON_REVISION__ < 5) #define ANOMALY_05000305 (__SILICON_REVISION__ < 5)
/* SCKELOW Bit Does Not Maintain State Through Hibernate */ /* SCKELOW Bit Does Not Maintain State Through Hibernate */
#define ANOMALY_05000307 (__SILICON_REVISION__ < 5) #define ANOMALY_05000307 (__SILICON_REVISION__ < 5)
...@@ -283,8 +283,11 @@ ...@@ -283,8 +283,11 @@
#define ANOMALY_05000273 (0) #define ANOMALY_05000273 (0)
#define ANOMALY_05000311 (0) #define ANOMALY_05000311 (0)
#define ANOMALY_05000353 (1) #define ANOMALY_05000353 (1)
#define ANOMALY_05000380 (0)
#define ANOMALY_05000386 (1) #define ANOMALY_05000386 (1)
#define ANOMALY_05000432 (0) #define ANOMALY_05000432 (0)
#define ANOMALY_05000435 (0) #define ANOMALY_05000435 (0)
#define ANOMALY_05000447 (0)
#define ANOMALY_05000448 (0)
#endif #endif
arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
浏览文件 @ 467c88fe
...@@ -134,7 +134,7 @@ struct bfin_serial_res bfin_serial_resource[] = { ...@@ -134,7 +134,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
CH_UART_TX, CH_UART_TX,
CH_UART_RX, CH_UART_RX,
#endif #endif
#ifdef CONFIG_BFIN_UART0_CTSRTS #ifdef CONFIG_SERIAL_BFIN_CTSRTS
CONFIG_UART0_CTS_PIN, CONFIG_UART0_CTS_PIN,
CONFIG_UART0_RTS_PIN, CONFIG_UART0_RTS_PIN,
#endif #endif
......
arch/blackfin/mach-common/arch_checks.c
浏览文件 @ 467c88fe
...@@ -62,3 +62,12 @@ ...@@ -62,3 +62,12 @@
#if (CONFIG_BOOT_LOAD & 0x3) #if (CONFIG_BOOT_LOAD & 0x3)
# error "The kernel load address must be 4 byte aligned" # error "The kernel load address must be 4 byte aligned"
#endif #endif
/* The entire kernel must be able to make a 24bit pcrel call to start of L1 */
#if ((0xffffffff - L1_CODE_START + 1) + CONFIG_BOOT_LOAD) > 0x1000000
# error "The kernel load address is too high; keep it below 10meg for safety"
#endif
#if ANOMALY_05000448
# error You are using a part with anomaly 05000448, this issue causes random memory read/write failures - that means random crashes.
#endif
arch/blackfin/mach-common/cache.S
浏览文件 @ 467c88fe
...@@ -66,11 +66,33 @@ ...@@ -66,11 +66,33 @@
/* Invalidate all instruction cache lines assocoiated with this memory area */ /* Invalidate all instruction cache lines assocoiated with this memory area */
ENTRY(_blackfin_icache_flush_range) ENTRY(_blackfin_icache_flush_range)
/*
* Walkaround to avoid loading wrong instruction after invalidating icache
* and following sequence is met.
*
* 1) One instruction address is cached in the instruction cache.
* 2) This instruction in SDRAM is changed.
* 3) IFLASH[P0] is executed only once in blackfin_icache_flush_range().
* 4) This instruction is executed again, but the old one is loaded.
*/
P0 = R0;
IFLUSH[P0];
do_flush IFLUSH, , nop do_flush IFLUSH, , nop
ENDPROC(_blackfin_icache_flush_range) ENDPROC(_blackfin_icache_flush_range)
/* Flush all cache lines assocoiated with this area of memory. */ /* Flush all cache lines assocoiated with this area of memory. */
ENTRY(_blackfin_icache_dcache_flush_range) ENTRY(_blackfin_icache_dcache_flush_range)
/*
* Walkaround to avoid loading wrong instruction after invalidating icache
* and following sequence is met.
*
* 1) One instruction address is cached in the instruction cache.
* 2) This instruction in SDRAM is changed.
* 3) IFLASH[P0] is executed only once in blackfin_icache_flush_range().
* 4) This instruction is executed again, but the old one is loaded.
*/
P0 = R0;
IFLUSH[P0];
do_flush FLUSH, IFLUSH do_flush FLUSH, IFLUSH
ENDPROC(_blackfin_icache_dcache_flush_range) ENDPROC(_blackfin_icache_dcache_flush_range)
......
arch/blackfin/mach-common/clocks-init.c
浏览文件 @ 467c88fe
...@@ -17,7 +17,7 @@ ...@@ -17,7 +17,7 @@
#define SDGCTL_WIDTH (1 << 31) /* SDRAM external data path width */ #define SDGCTL_WIDTH (1 << 31) /* SDRAM external data path width */
#define PLL_CTL_VAL \ #define PLL_CTL_VAL \
(((CONFIG_VCO_MULT & 63) << 9) | CLKIN_HALF | \ (((CONFIG_VCO_MULT & 63) << 9) | CLKIN_HALF | \
(PLL_BYPASS << 8) | (ANOMALY_05000265 ? 0x8000 : 0)) (PLL_BYPASS << 8) | (ANOMALY_05000305 ? 0 : 0x8000))
__attribute__((l1_text)) __attribute__((l1_text))
static void do_sync(void) static void do_sync(void)
......
arch/blackfin/mach-common/dpmc_modes.S
浏览文件 @ 467c88fe
...@@ -376,10 +376,22 @@ ENTRY(_do_hibernate) ...@@ -376,10 +376,22 @@ ENTRY(_do_hibernate)
#endif #endif
#ifdef PINT0_ASSIGN #ifdef PINT0_ASSIGN
PM_SYS_PUSH(PINT0_MASK_SET)
PM_SYS_PUSH(PINT1_MASK_SET)
PM_SYS_PUSH(PINT2_MASK_SET)
PM_SYS_PUSH(PINT3_MASK_SET)
PM_SYS_PUSH(PINT0_ASSIGN) PM_SYS_PUSH(PINT0_ASSIGN)
PM_SYS_PUSH(PINT1_ASSIGN) PM_SYS_PUSH(PINT1_ASSIGN)
PM_SYS_PUSH(PINT2_ASSIGN) PM_SYS_PUSH(PINT2_ASSIGN)
PM_SYS_PUSH(PINT3_ASSIGN) PM_SYS_PUSH(PINT3_ASSIGN)
PM_SYS_PUSH(PINT0_INVERT_SET)
PM_SYS_PUSH(PINT1_INVERT_SET)
PM_SYS_PUSH(PINT2_INVERT_SET)
PM_SYS_PUSH(PINT3_INVERT_SET)
PM_SYS_PUSH(PINT0_EDGE_SET)
PM_SYS_PUSH(PINT1_EDGE_SET)
PM_SYS_PUSH(PINT2_EDGE_SET)
PM_SYS_PUSH(PINT3_EDGE_SET)
#endif #endif
PM_SYS_PUSH(EBIU_AMBCTL0) PM_SYS_PUSH(EBIU_AMBCTL0)
...@@ -714,10 +726,22 @@ ENTRY(_do_hibernate) ...@@ -714,10 +726,22 @@ ENTRY(_do_hibernate)
PM_SYS_POP(EBIU_AMBCTL0) PM_SYS_POP(EBIU_AMBCTL0)
#ifdef PINT0_ASSIGN #ifdef PINT0_ASSIGN
PM_SYS_POP(PINT3_EDGE_SET)
PM_SYS_POP(PINT2_EDGE_SET)
PM_SYS_POP(PINT1_EDGE_SET)
PM_SYS_POP(PINT0_EDGE_SET)
PM_SYS_POP(PINT3_INVERT_SET)
PM_SYS_POP(PINT2_INVERT_SET)
PM_SYS_POP(PINT1_INVERT_SET)
PM_SYS_POP(PINT0_INVERT_SET)
PM_SYS_POP(PINT3_ASSIGN) PM_SYS_POP(PINT3_ASSIGN)
PM_SYS_POP(PINT2_ASSIGN) PM_SYS_POP(PINT2_ASSIGN)
PM_SYS_POP(PINT1_ASSIGN) PM_SYS_POP(PINT1_ASSIGN)
PM_SYS_POP(PINT0_ASSIGN) PM_SYS_POP(PINT0_ASSIGN)
PM_SYS_POP(PINT3_MASK_SET)
PM_SYS_POP(PINT2_MASK_SET)
PM_SYS_POP(PINT1_MASK_SET)
PM_SYS_POP(PINT0_MASK_SET)
#endif #endif
#ifdef SICA_IWR1 #ifdef SICA_IWR1
......
arch/blackfin/mach-common/entry.S
浏览文件 @ 467c88fe
...@@ -600,6 +600,19 @@ ENTRY(_system_call) ...@@ -600,6 +600,19 @@ ENTRY(_system_call)
p2 = [p2]; p2 = [p2];
[p2+(TASK_THREAD+THREAD_KSP)] = sp; [p2+(TASK_THREAD+THREAD_KSP)] = sp;
#ifdef CONFIG_IPIPE
r0 = sp;
SP += -12;
call ___ipipe_syscall_root;
SP += 12;
cc = r0 == 1;
if cc jump .Lsyscall_really_exit;
cc = r0 == -1;
if cc jump .Lresume_userspace;
r3 = [sp + PT_R3];
r4 = [sp + PT_R4];
p0 = [sp + PT_ORIG_P0];
#endif /* CONFIG_IPIPE */
/* Check the System Call */ /* Check the System Call */
r7 = __NR_syscall; r7 = __NR_syscall;
...@@ -654,6 +667,17 @@ ENTRY(_system_call) ...@@ -654,6 +667,17 @@ ENTRY(_system_call)
r7 = r7 & r4; r7 = r7 & r4;
.Lsyscall_resched: .Lsyscall_resched:
#ifdef CONFIG_IPIPE
cc = BITTST(r7, TIF_IRQ_SYNC);
if !cc jump .Lsyscall_no_irqsync;
[--sp] = reti;
r0 = [sp++];
SP += -12;
call ___ipipe_sync_root;
SP += 12;
jump .Lresume_userspace_1;
.Lsyscall_no_irqsync:
#endif
cc = BITTST(r7, TIF_NEED_RESCHED); cc = BITTST(r7, TIF_NEED_RESCHED);
if !cc jump .Lsyscall_sigpending; if !cc jump .Lsyscall_sigpending;
...@@ -685,6 +709,10 @@ ENTRY(_system_call) ...@@ -685,6 +709,10 @@ ENTRY(_system_call)
.Lsyscall_really_exit: .Lsyscall_really_exit:
r5 = [sp + PT_RESERVED]; r5 = [sp + PT_RESERVED];
rets = r5; rets = r5;
#ifdef CONFIG_IPIPE
[--sp] = reti;
r5 = [sp++];
#endif /* CONFIG_IPIPE */
rts; rts;
ENDPROC(_system_call) ENDPROC(_system_call)
...@@ -771,6 +799,15 @@ _new_old_task: ...@@ -771,6 +799,15 @@ _new_old_task:
ENDPROC(_resume) ENDPROC(_resume)
ENTRY(_ret_from_exception) ENTRY(_ret_from_exception)
#ifdef CONFIG_IPIPE
[--sp] = rets;
SP += -12;
call ___ipipe_check_root
SP += 12
rets = [sp++];
cc = r0 == 0;
if cc jump 4f; /* not on behalf of Linux, get out */
#endif /* CONFIG_IPIPE */
p2.l = lo(IPEND); p2.l = lo(IPEND);
p2.h = hi(IPEND); p2.h = hi(IPEND);
...@@ -827,6 +864,28 @@ ENTRY(_ret_from_exception) ...@@ -827,6 +864,28 @@ ENTRY(_ret_from_exception)
rts; rts;
ENDPROC(_ret_from_exception) ENDPROC(_ret_from_exception)
#ifdef CONFIG_IPIPE
_sync_root_irqs:
[--sp] = reti; /* Reenable interrupts */
r0 = [sp++];
jump.l ___ipipe_sync_root
_resume_kernel_from_int:
r0.l = _sync_root_irqs
r0.h = _sync_root_irqs
[--sp] = rets;
[--sp] = ( r7:4, p5:3 );
SP += -12;
call ___ipipe_call_irqtail
SP += 12;
( r7:4, p5:3 ) = [sp++];
rets = [sp++];
rts
#else
#define _resume_kernel_from_int 2f
#endif
ENTRY(_return_from_int) ENTRY(_return_from_int)
/* If someone else already raised IRQ 15, do nothing. */ /* If someone else already raised IRQ 15, do nothing. */
csync; csync;
...@@ -848,7 +907,7 @@ ENTRY(_return_from_int) ...@@ -848,7 +907,7 @@ ENTRY(_return_from_int)
r1 = r0 - r1; r1 = r0 - r1;
r2 = r0 & r1; r2 = r0 & r1;
cc = r2 == 0; cc = r2 == 0;
if !cc jump 2f; if !cc jump _resume_kernel_from_int;
/* Lower the interrupt level to 15. */ /* Lower the interrupt level to 15. */
p0.l = lo(EVT15); p0.l = lo(EVT15);
......
arch/blackfin/mach-common/interrupt.S
浏览文件 @ 467c88fe
...@@ -235,6 +235,7 @@ ENDPROC(_evt_system_call) ...@@ -235,6 +235,7 @@ ENDPROC(_evt_system_call)
#ifdef CONFIG_IPIPE #ifdef CONFIG_IPIPE
ENTRY(___ipipe_call_irqtail) ENTRY(___ipipe_call_irqtail)
p0 = r0;
r0.l = 1f; r0.l = 1f;
r0.h = 1f; r0.h = 1f;
reti = r0; reti = r0;
...@@ -242,9 +243,6 @@ ENTRY(___ipipe_call_irqtail) ...@@ -242,9 +243,6 @@ ENTRY(___ipipe_call_irqtail)
1: 1:
[--sp] = rets; [--sp] = rets;
[--sp] = ( r7:4, p5:3 ); [--sp] = ( r7:4, p5:3 );
p0.l = ___ipipe_irq_tail_hook;
p0.h = ___ipipe_irq_tail_hook;
p0 = [p0];
sp += -12; sp += -12;
call (p0); call (p0);
sp += 12; sp += 12;
...@@ -259,7 +257,7 @@ ENTRY(___ipipe_call_irqtail) ...@@ -259,7 +257,7 @@ ENTRY(___ipipe_call_irqtail)
p0.h = hi(EVT14); p0.h = hi(EVT14);
[p0] = r0; [p0] = r0;
csync; csync;
r0 = 0x401f; r0 = 0x401f (z);
sti r0; sti r0;
raise 14; raise 14;
[--sp] = reti; /* IRQs on. */ [--sp] = reti; /* IRQs on. */
...@@ -277,11 +275,7 @@ ENTRY(___ipipe_call_irqtail) ...@@ -277,11 +275,7 @@ ENTRY(___ipipe_call_irqtail)
p0.h = _bfin_irq_flags; p0.h = _bfin_irq_flags;
r0 = [p0]; r0 = [p0];
sti r0; sti r0;
#if 0 /* FIXME: this actually raises scheduling latencies */
/* Reenable interrupts */
[--sp] = reti;
r0 = [sp++];
#endif
rts; rts;
ENDPROC(___ipipe_call_irqtail) ENDPROC(___ipipe_call_irqtail)
#endif /* CONFIG_IPIPE */ #endif /* CONFIG_IPIPE */
arch/blackfin/mach-common/ints-priority.c
浏览文件 @ 467c88fe
...@@ -161,11 +161,15 @@ static void bfin_core_unmask_irq(unsigned int irq) ...@@ -161,11 +161,15 @@ static void bfin_core_unmask_irq(unsigned int irq)
static void bfin_internal_mask_irq(unsigned int irq) static void bfin_internal_mask_irq(unsigned int irq)
{ {
unsigned long flags;
#ifdef CONFIG_BF53x #ifdef CONFIG_BF53x
local_irq_save_hw(flags);
bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() & bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() &
~(1 << SIC_SYSIRQ(irq))); ~(1 << SIC_SYSIRQ(irq)));
#else #else
unsigned mask_bank, mask_bit; unsigned mask_bank, mask_bit;
local_irq_save_hw(flags);
mask_bank = SIC_SYSIRQ(irq) / 32; mask_bank = SIC_SYSIRQ(irq) / 32;
mask_bit = SIC_SYSIRQ(irq) % 32; mask_bit = SIC_SYSIRQ(irq) % 32;
bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) & bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) &
...@@ -175,15 +179,20 @@ static void bfin_internal_mask_irq(unsigned int irq) ...@@ -175,15 +179,20 @@ static void bfin_internal_mask_irq(unsigned int irq)
~(1 << mask_bit)); ~(1 << mask_bit));
#endif #endif
#endif #endif
local_irq_restore_hw(flags);
} }
static void bfin_internal_unmask_irq(unsigned int irq) static void bfin_internal_unmask_irq(unsigned int irq)
{ {
unsigned long flags;
#ifdef CONFIG_BF53x #ifdef CONFIG_BF53x
local_irq_save_hw(flags);
bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() | bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() |
(1 << SIC_SYSIRQ(irq))); (1 << SIC_SYSIRQ(irq)));
#else #else
unsigned mask_bank, mask_bit; unsigned mask_bank, mask_bit;
local_irq_save_hw(flags);
mask_bank = SIC_SYSIRQ(irq) / 32; mask_bank = SIC_SYSIRQ(irq) / 32;
mask_bit = SIC_SYSIRQ(irq) % 32; mask_bit = SIC_SYSIRQ(irq) % 32;
bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) | bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) |
...@@ -193,6 +202,7 @@ static void bfin_internal_unmask_irq(unsigned int irq) ...@@ -193,6 +202,7 @@ static void bfin_internal_unmask_irq(unsigned int irq)
(1 << mask_bit)); (1 << mask_bit));
#endif #endif
#endif #endif
local_irq_restore_hw(flags);
} }
#ifdef CONFIG_PM #ifdef CONFIG_PM
...@@ -390,7 +400,7 @@ static void bfin_demux_error_irq(unsigned int int_err_irq, ...@@ -390,7 +400,7 @@ static void bfin_demux_error_irq(unsigned int int_err_irq,
static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle) static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle)
{ {
#ifdef CONFIG_IPIPE #ifdef CONFIG_IPIPE
_set_irq_handler(irq, handle_edge_irq); _set_irq_handler(irq, handle_level_irq);
#else #else
struct irq_desc *desc = irq_desc + irq; struct irq_desc *desc = irq_desc + irq;
/* May not call generic set_irq_handler() due to spinlock /* May not call generic set_irq_handler() due to spinlock
...@@ -1055,13 +1065,18 @@ int __init init_arch_irq(void) ...@@ -1055,13 +1065,18 @@ int __init init_arch_irq(void)
#endif #endif
default: default:
#ifdef CONFIG_IPIPE #ifdef CONFIG_IPIPE
/* /*
* We want internal interrupt sources to be masked, because * We want internal interrupt sources to be
* ISRs may trigger interrupts recursively (e.g. DMA), but * masked, because ISRs may trigger interrupts
* interrupts are _not_ masked at CPU level. So let's handle * recursively (e.g. DMA), but interrupts are
* them as level interrupts. * _not_ masked at CPU level. So let's handle
*/ * most of them as level interrupts, except
set_irq_handler(irq, handle_level_irq); * the timer interrupt which is special.
*/
if (irq == IRQ_SYSTMR || irq == IRQ_CORETMR)
set_irq_handler(irq, handle_simple_irq);
else
set_irq_handler(irq, handle_level_irq);
#else /* !CONFIG_IPIPE */ #else /* !CONFIG_IPIPE */
set_irq_handler(irq, handle_simple_irq); set_irq_handler(irq, handle_simple_irq);
#endif /* !CONFIG_IPIPE */ #endif /* !CONFIG_IPIPE */
...@@ -1123,9 +1138,8 @@ int __init init_arch_irq(void) ...@@ -1123,9 +1138,8 @@ int __init init_arch_irq(void)
#ifdef CONFIG_IPIPE #ifdef CONFIG_IPIPE
for (irq = 0; irq < NR_IRQS; irq++) { for (irq = 0; irq < NR_IRQS; irq++) {
struct irq_desc *desc = irq_desc + irq; struct irq_desc *desc = irq_to_desc(irq);
desc->ic_prio = __ipipe_get_irq_priority(irq); desc->ic_prio = __ipipe_get_irq_priority(irq);
desc->thr_prio = __ipipe_get_irqthread_priority(irq);
} }
#endif /* CONFIG_IPIPE */ #endif /* CONFIG_IPIPE */
...@@ -1208,76 +1222,21 @@ int __ipipe_get_irq_priority(unsigned irq) ...@@ -1208,76 +1222,21 @@ int __ipipe_get_irq_priority(unsigned irq)
return IVG15; return IVG15;
} }
int __ipipe_get_irqthread_priority(unsigned irq)
{
int ient, prio;
int demux_irq;
/* The returned priority value is rescaled to [0..IVG13+1]
* with 0 being the lowest effective priority level. */
if (irq <= IRQ_CORETMR)
return IVG13 - irq + 1;
/* GPIO IRQs are given the priority of the demux
* interrupt. */
if (IS_GPIOIRQ(irq)) {
#if defined(CONFIG_BF54x)
u32 bank = PINT_2_BANK(irq2pint_lut[irq - SYS_IRQS]);
demux_irq = (bank == 0 ? IRQ_PINT0 :
bank == 1 ? IRQ_PINT1 :
bank == 2 ? IRQ_PINT2 :
IRQ_PINT3);
#elif defined(CONFIG_BF561)
demux_irq = (irq >= IRQ_PF32 ? IRQ_PROG2_INTA :
irq >= IRQ_PF16 ? IRQ_PROG1_INTA :
IRQ_PROG0_INTA);
#elif defined(CONFIG_BF52x)
demux_irq = (irq >= IRQ_PH0 ? IRQ_PORTH_INTA :
irq >= IRQ_PG0 ? IRQ_PORTG_INTA :
IRQ_PORTF_INTA);
#else
demux_irq = irq;
#endif
return IVG13 - PRIO_GPIODEMUX(demux_irq) + 1;
}
/* The GPIO demux interrupt is given a lower priority
* than the GPIO IRQs, so that its threaded handler
* unmasks the interrupt line after the decoded IRQs
* have been processed. */
prio = PRIO_GPIODEMUX(irq);
/* demux irq? */
if (prio != -1)
return IVG13 - prio;
for (ient = 0; ient < NR_PERI_INTS; ient++) {
struct ivgx *ivg = ivg_table + ient;
if (ivg->irqno == irq) {
for (prio = 0; prio <= IVG13-IVG7; prio++) {
if (ivg7_13[prio].ifirst <= ivg &&
ivg7_13[prio].istop > ivg)
return IVG7 - prio;
}
}
}
return 0;
}
/* Hw interrupts are disabled on entry (check SAVE_CONTEXT). */ /* Hw interrupts are disabled on entry (check SAVE_CONTEXT). */
#ifdef CONFIG_DO_IRQ_L1 #ifdef CONFIG_DO_IRQ_L1
__attribute__((l1_text)) __attribute__((l1_text))
#endif #endif
asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs)
{ {
struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr();
struct ipipe_domain *this_domain = ipipe_current_domain;
struct ivgx *ivg_stop = ivg7_13[vec-IVG7].istop; struct ivgx *ivg_stop = ivg7_13[vec-IVG7].istop;
struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst; struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst;
int irq; int irq, s;
if (likely(vec == EVT_IVTMR_P)) { if (likely(vec == EVT_IVTMR_P)) {
irq = IRQ_CORETMR; irq = IRQ_CORETMR;
goto handle_irq; goto core_tick;
} }
SSYNC(); SSYNC();
...@@ -1319,24 +1278,39 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) ...@@ -1319,24 +1278,39 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs)
irq = ivg->irqno; irq = ivg->irqno;
if (irq == IRQ_SYSTMR) { if (irq == IRQ_SYSTMR) {
#ifdef CONFIG_GENERIC_CLOCKEVENTS
core_tick:
#else
bfin_write_TIMER_STATUS(1); /* Latch TIMIL0 */ bfin_write_TIMER_STATUS(1); /* Latch TIMIL0 */
#endif
/* This is basically what we need from the register frame. */ /* This is basically what we need from the register frame. */
__raw_get_cpu_var(__ipipe_tick_regs).ipend = regs->ipend; __raw_get_cpu_var(__ipipe_tick_regs).ipend = regs->ipend;
__raw_get_cpu_var(__ipipe_tick_regs).pc = regs->pc; __raw_get_cpu_var(__ipipe_tick_regs).pc = regs->pc;
if (!ipipe_root_domain_p) if (this_domain != ipipe_root_domain)
__raw_get_cpu_var(__ipipe_tick_regs).ipend |= 0x10;
else
__raw_get_cpu_var(__ipipe_tick_regs).ipend &= ~0x10; __raw_get_cpu_var(__ipipe_tick_regs).ipend &= ~0x10;
else
__raw_get_cpu_var(__ipipe_tick_regs).ipend |= 0x10;
} }
handle_irq: #ifndef CONFIG_GENERIC_CLOCKEVENTS
core_tick:
#endif
if (this_domain == ipipe_root_domain) {
s = __test_and_set_bit(IPIPE_SYNCDEFER_FLAG, &p->status);
barrier();
}
ipipe_trace_irq_entry(irq); ipipe_trace_irq_entry(irq);
__ipipe_handle_irq(irq, regs); __ipipe_handle_irq(irq, regs);
ipipe_trace_irq_exit(irq); ipipe_trace_irq_exit(irq);
if (ipipe_root_domain_p) if (this_domain == ipipe_root_domain) {
return !test_bit(IPIPE_STALL_FLAG, &ipipe_root_cpudom_var(status)); set_thread_flag(TIF_IRQ_SYNC);
if (!s) {
__clear_bit(IPIPE_SYNCDEFER_FLAG, &p->status);
return !test_bit(IPIPE_STALL_FLAG, &p->status);
}
}
return 0; return 0;
} }
......
arch/blackfin/mach-common/smp.c
浏览文件 @ 467c88fe
...@@ -158,10 +158,14 @@ static irqreturn_t ipi_handler(int irq, void *dev_instance) ...@@ -158,10 +158,14 @@ static irqreturn_t ipi_handler(int irq, void *dev_instance)
kfree(msg); kfree(msg);
break; break;
case BFIN_IPI_CALL_FUNC: case BFIN_IPI_CALL_FUNC:
spin_unlock(&msg_queue->lock);
ipi_call_function(cpu, msg); ipi_call_function(cpu, msg);
spin_lock(&msg_queue->lock);
break; break;
case BFIN_IPI_CPU_STOP: case BFIN_IPI_CPU_STOP:
spin_unlock(&msg_queue->lock);
ipi_cpu_stop(cpu); ipi_cpu_stop(cpu);
spin_lock(&msg_queue->lock);
kfree(msg); kfree(msg);
break; break;
default: default:
...@@ -457,7 +461,7 @@ void smp_icache_flush_range_others(unsigned long start, unsigned long end) ...@@ -457,7 +461,7 @@ void smp_icache_flush_range_others(unsigned long start, unsigned long end)
smp_flush_data.start = start; smp_flush_data.start = start;
smp_flush_data.end = end; smp_flush_data.end = end;
if (smp_call_function(&ipi_flush_icache, &smp_flush_data, 1)) if (smp_call_function(&ipi_flush_icache, &smp_flush_data, 0))
printk(KERN_WARNING "SMP: failed to run I-cache flush request on other CPUs\n"); printk(KERN_WARNING "SMP: failed to run I-cache flush request on other CPUs\n");
} }
EXPORT_SYMBOL_GPL(smp_icache_flush_range_others); EXPORT_SYMBOL_GPL(smp_icache_flush_range_others);
......
arch/blackfin/mm/init.c
浏览文件 @ 467c88fe
...@@ -104,7 +104,7 @@ void __init paging_init(void) ...@@ -104,7 +104,7 @@ void __init paging_init(void)
} }
} }
asmlinkage void init_pda(void) asmlinkage void __init init_pda(void)
{ {
unsigned int cpu = raw_smp_processor_id(); unsigned int cpu = raw_smp_processor_id();
......
arch/ia64/sn/pci/pcibr/pcibr_dma.c
浏览文件 @ 467c88fe
...@@ -135,11 +135,10 @@ pcibr_dmatrans_direct64(struct pcidev_info * info, u64 paddr, ...@@ -135,11 +135,10 @@ pcibr_dmatrans_direct64(struct pcidev_info * info, u64 paddr,
if (SN_DMA_ADDRTYPE(dma_flags) == SN_DMA_ADDR_PHYS) if (SN_DMA_ADDRTYPE(dma_flags) == SN_DMA_ADDR_PHYS)
pci_addr = IS_PIC_SOFT(pcibus_info) ? pci_addr = IS_PIC_SOFT(pcibus_info) ?
PHYS_TO_DMA(paddr) : PHYS_TO_DMA(paddr) :
PHYS_TO_TIODMA(paddr) | dma_attributes; PHYS_TO_TIODMA(paddr);
else else
pci_addr = IS_PIC_SOFT(pcibus_info) ? pci_addr = paddr;
paddr : pci_addr |= dma_attributes;
paddr | dma_attributes;
/* Handle Bus mode */ /* Handle Bus mode */
if (IS_PCIX(pcibus_info)) if (IS_PCIX(pcibus_info))
......
arch/mips/include/asm/compat.h
浏览文件 @ 467c88fe
...@@ -3,6 +3,8 @@ ...@@ -3,6 +3,8 @@
/* /*
* Architecture specific compatibility types * Architecture specific compatibility types
*/ */
#include <linux/seccomp.h>
#include <linux/thread_info.h>
#include <linux/types.h> #include <linux/types.h>
#include <asm/page.h> #include <asm/page.h>
#include <asm/ptrace.h> #include <asm/ptrace.h>
...@@ -218,4 +220,9 @@ struct compat_shmid64_ds { ...@@ -218,4 +220,9 @@ struct compat_shmid64_ds {
compat_ulong_t __unused2; compat_ulong_t __unused2;
}; };
static inline int is_compat_task(void)
{
return test_thread_flag(TIF_32BIT);
}
#endif /* _ASM_COMPAT_H */ #endif /* _ASM_COMPAT_H */
arch/x86/include/asm/linkage.h
浏览文件 @ 467c88fe
...@@ -4,11 +4,6 @@ ...@@ -4,11 +4,6 @@
#undef notrace #undef notrace
#define notrace __attribute__((no_instrument_function)) #define notrace __attribute__((no_instrument_function))
#ifdef CONFIG_X86_64
#define __ALIGN .p2align 4,,15
#define __ALIGN_STR ".p2align 4,,15"
#endif
#ifdef CONFIG_X86_32 #ifdef CONFIG_X86_32
#define asmlinkage CPP_ASMLINKAGE __attribute__((regparm(0))) #define asmlinkage CPP_ASMLINKAGE __attribute__((regparm(0)))
/* /*
...@@ -50,16 +45,25 @@ ...@@ -50,16 +45,25 @@
__asmlinkage_protect_n(ret, "g" (arg1), "g" (arg2), "g" (arg3), \ __asmlinkage_protect_n(ret, "g" (arg1), "g" (arg2), "g" (arg3), \
"g" (arg4), "g" (arg5), "g" (arg6)) "g" (arg4), "g" (arg5), "g" (arg6))
#endif #endif /* CONFIG_X86_32 */
#ifdef __ASSEMBLY__
#define GLOBAL(name) \ #define GLOBAL(name) \
.globl name; \ .globl name; \
name: name:
#ifdef CONFIG_X86_64
#define __ALIGN .p2align 4,,15
#define __ALIGN_STR ".p2align 4,,15"
#endif
#ifdef CONFIG_X86_ALIGNMENT_16 #ifdef CONFIG_X86_ALIGNMENT_16
#define __ALIGN .align 16,0x90 #define __ALIGN .align 16,0x90
#define __ALIGN_STR ".align 16,0x90" #define __ALIGN_STR ".align 16,0x90"
#endif #endif
#endif /* __ASSEMBLY__ */
#endif /* _ASM_X86_LINKAGE_H */ #endif /* _ASM_X86_LINKAGE_H */
arch/x86/kernel/ds.c
浏览文件 @ 467c88fe
...@@ -729,7 +729,7 @@ struct pebs_tracer *ds_request_pebs(struct task_struct *task, ...@@ -729,7 +729,7 @@ struct pebs_tracer *ds_request_pebs(struct task_struct *task,
spin_unlock_irqrestore(&ds_lock, irq); spin_unlock_irqrestore(&ds_lock, irq);
ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_bts); ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_pebs);
ds_resume_pebs(tracer); ds_resume_pebs(tracer);
return tracer; return tracer;
...@@ -1029,5 +1029,4 @@ void ds_copy_thread(struct task_struct *tsk, struct task_struct *father) ...@@ -1029,5 +1029,4 @@ void ds_copy_thread(struct task_struct *tsk, struct task_struct *father)
void ds_exit_thread(struct task_struct *tsk) void ds_exit_thread(struct task_struct *tsk)
{ {
WARN_ON(tsk->thread.ds_ctx);
} }
arch/x86/kernel/setup_percpu.c
浏览文件 @ 467c88fe
...@@ -42,6 +42,19 @@ unsigned long __per_cpu_offset[NR_CPUS] __read_mostly = { ...@@ -42,6 +42,19 @@ unsigned long __per_cpu_offset[NR_CPUS] __read_mostly = {
}; };
EXPORT_SYMBOL(__per_cpu_offset); EXPORT_SYMBOL(__per_cpu_offset);
/*
* On x86_64 symbols referenced from code should be reachable using
* 32bit relocations. Reserve space for static percpu variables in
* modules so that they are always served from the first chunk which
* is located at the percpu segment base. On x86_32, anything can
* address anywhere. No need to reserve space in the first chunk.
*/
#ifdef CONFIG_X86_64
#define PERCPU_FIRST_CHUNK_RESERVE PERCPU_MODULE_RESERVE
#else
#define PERCPU_FIRST_CHUNK_RESERVE 0
#endif
/** /**
* pcpu_need_numa - determine percpu allocation needs to consider NUMA * pcpu_need_numa - determine percpu allocation needs to consider NUMA
* *
...@@ -141,7 +154,7 @@ static ssize_t __init setup_pcpu_remap(size_t static_size) ...@@ -141,7 +154,7 @@ static ssize_t __init setup_pcpu_remap(size_t static_size)
{ {
static struct vm_struct vm; static struct vm_struct vm;
pg_data_t *last; pg_data_t *last;
size_t ptrs_size; size_t ptrs_size, dyn_size;
unsigned int cpu; unsigned int cpu;
ssize_t ret; ssize_t ret;
...@@ -169,12 +182,14 @@ static ssize_t __init setup_pcpu_remap(size_t static_size) ...@@ -169,12 +182,14 @@ static ssize_t __init setup_pcpu_remap(size_t static_size)
* Currently supports only single page. Supporting multiple * Currently supports only single page. Supporting multiple
* pages won't be too difficult if it ever becomes necessary. * pages won't be too difficult if it ever becomes necessary.
*/ */
pcpur_size = PFN_ALIGN(static_size + PERCPU_DYNAMIC_RESERVE); pcpur_size = PFN_ALIGN(static_size + PERCPU_MODULE_RESERVE +
PERCPU_DYNAMIC_RESERVE);
if (pcpur_size > PMD_SIZE) { if (pcpur_size > PMD_SIZE) {
pr_warning("PERCPU: static data is larger than large page, " pr_warning("PERCPU: static data is larger than large page, "
"can't use large page\n"); "can't use large page\n");
return -EINVAL; return -EINVAL;
} }
dyn_size = pcpur_size - static_size - PERCPU_FIRST_CHUNK_RESERVE;
/* allocate pointer array and alloc large pages */ /* allocate pointer array and alloc large pages */
ptrs_size = PFN_ALIGN(num_possible_cpus() * sizeof(pcpur_ptrs[0])); ptrs_size = PFN_ALIGN(num_possible_cpus() * sizeof(pcpur_ptrs[0]));
...@@ -217,8 +232,9 @@ static ssize_t __init setup_pcpu_remap(size_t static_size) ...@@ -217,8 +232,9 @@ static ssize_t __init setup_pcpu_remap(size_t static_size)
pr_info("PERCPU: Remapped at %p with large pages, static data " pr_info("PERCPU: Remapped at %p with large pages, static data "
"%zu bytes\n", vm.addr, static_size); "%zu bytes\n", vm.addr, static_size);
ret = pcpu_setup_first_chunk(pcpur_get_page, static_size, PMD_SIZE, ret = pcpu_setup_first_chunk(pcpur_get_page, static_size,
pcpur_size - static_size, vm.addr, NULL); PERCPU_FIRST_CHUNK_RESERVE,
PMD_SIZE, dyn_size, vm.addr, NULL);
goto out_free_ar; goto out_free_ar;
enomem: enomem:
...@@ -241,24 +257,31 @@ static ssize_t __init setup_pcpu_remap(size_t static_size) ...@@ -241,24 +257,31 @@ static ssize_t __init setup_pcpu_remap(size_t static_size)
* Embedding allocator * Embedding allocator
* *
* The first chunk is sized to just contain the static area plus * The first chunk is sized to just contain the static area plus
* PERCPU_DYNAMIC_RESERVE and allocated as a contiguous area using * module and dynamic reserves, and allocated as a contiguous area
* bootmem allocator and used as-is without being mapped into vmalloc * using bootmem allocator and used as-is without being mapped into
* area. This enables the first chunk to piggy back on the linear * vmalloc area. This enables the first chunk to piggy back on the
* physical PMD mapping and doesn't add any additional pressure to * linear physical PMD mapping and doesn't add any additional pressure
* TLB. * to TLB. Note that if the needed size is smaller than the minimum
* unit size, the leftover is returned to the bootmem allocator.
*/ */
static void *pcpue_ptr __initdata; static void *pcpue_ptr __initdata;
static size_t pcpue_size __initdata;
static size_t pcpue_unit_size __initdata; static size_t pcpue_unit_size __initdata;
static struct page * __init pcpue_get_page(unsigned int cpu, int pageno) static struct page * __init pcpue_get_page(unsigned int cpu, int pageno)
{ {
return virt_to_page(pcpue_ptr + cpu * pcpue_unit_size size_t off = (size_t)pageno << PAGE_SHIFT;
+ ((size_t)pageno << PAGE_SHIFT));
if (off >= pcpue_size)
return NULL;
return virt_to_page(pcpue_ptr + cpu * pcpue_unit_size + off);
} }
static ssize_t __init setup_pcpu_embed(size_t static_size) static ssize_t __init setup_pcpu_embed(size_t static_size)
{ {
unsigned int cpu; unsigned int cpu;
size_t dyn_size;
/* /*
* If large page isn't supported, there's no benefit in doing * If large page isn't supported, there's no benefit in doing
...@@ -269,25 +292,32 @@ static ssize_t __init setup_pcpu_embed(size_t static_size) ...@@ -269,25 +292,32 @@ static ssize_t __init setup_pcpu_embed(size_t static_size)
return -EINVAL; return -EINVAL;
/* allocate and copy */ /* allocate and copy */
pcpue_unit_size = PFN_ALIGN(static_size + PERCPU_DYNAMIC_RESERVE); pcpue_size = PFN_ALIGN(static_size + PERCPU_MODULE_RESERVE +
pcpue_unit_size = max_t(size_t, pcpue_unit_size, PCPU_MIN_UNIT_SIZE); PERCPU_DYNAMIC_RESERVE);
pcpue_unit_size = max_t(size_t, pcpue_size, PCPU_MIN_UNIT_SIZE);
dyn_size = pcpue_size - static_size - PERCPU_FIRST_CHUNK_RESERVE;
pcpue_ptr = pcpu_alloc_bootmem(0, num_possible_cpus() * pcpue_unit_size, pcpue_ptr = pcpu_alloc_bootmem(0, num_possible_cpus() * pcpue_unit_size,
PAGE_SIZE); PAGE_SIZE);
if (!pcpue_ptr) if (!pcpue_ptr)
return -ENOMEM; return -ENOMEM;
for_each_possible_cpu(cpu) for_each_possible_cpu(cpu) {
memcpy(pcpue_ptr + cpu * pcpue_unit_size, __per_cpu_load, void *ptr = pcpue_ptr + cpu * pcpue_unit_size;
static_size);
free_bootmem(__pa(ptr + pcpue_size),
pcpue_unit_size - pcpue_size);
memcpy(ptr, __per_cpu_load, static_size);
}
/* we're ready, commit */ /* we're ready, commit */
pr_info("PERCPU: Embedded %zu pages at %p, static data %zu bytes\n", pr_info("PERCPU: Embedded %zu pages at %p, static data %zu bytes\n",
pcpue_unit_size >> PAGE_SHIFT, pcpue_ptr, static_size); pcpue_size >> PAGE_SHIFT, pcpue_ptr, static_size);
return pcpu_setup_first_chunk(pcpue_get_page, static_size, return pcpu_setup_first_chunk(pcpue_get_page, static_size,
pcpue_unit_size, PERCPU_FIRST_CHUNK_RESERVE,
pcpue_unit_size - static_size, pcpue_ptr, pcpue_unit_size, dyn_size,
NULL); pcpue_ptr, NULL);
} }
/* /*
...@@ -344,7 +374,8 @@ static ssize_t __init setup_pcpu_4k(size_t static_size) ...@@ -344,7 +374,8 @@ static ssize_t __init setup_pcpu_4k(size_t static_size)
pr_info("PERCPU: Allocated %d 4k pages, static data %zu bytes\n", pr_info("PERCPU: Allocated %d 4k pages, static data %zu bytes\n",
pcpu4k_nr_static_pages, static_size); pcpu4k_nr_static_pages, static_size);
ret = pcpu_setup_first_chunk(pcpu4k_get_page, static_size, 0, 0, NULL, ret = pcpu_setup_first_chunk(pcpu4k_get_page, static_size,
PERCPU_FIRST_CHUNK_RESERVE, -1, -1, NULL,
pcpu4k_populate_pte); pcpu4k_populate_pte);
goto out_free_ar; goto out_free_ar;
......
arch/x86/kernel/tlb_uv.c
浏览文件 @ 467c88fe
...@@ -314,8 +314,6 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask, ...@@ -314,8 +314,6 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
int locals = 0; int locals = 0;
struct bau_desc *bau_desc; struct bau_desc *bau_desc;
WARN_ON(!in_atomic());
cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu)); cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
uv_cpu = uv_blade_processor_id(); uv_cpu = uv_blade_processor_id();
......
arch/x86/mm/init.c
浏览文件 @ 467c88fe
...@@ -134,8 +134,8 @@ unsigned long __init_refok init_memory_mapping(unsigned long start, ...@@ -134,8 +134,8 @@ unsigned long __init_refok init_memory_mapping(unsigned long start,
{ {
unsigned long page_size_mask = 0; unsigned long page_size_mask = 0;
unsigned long start_pfn, end_pfn; unsigned long start_pfn, end_pfn;
unsigned long ret = 0;
unsigned long pos; unsigned long pos;
unsigned long ret;
struct map_range mr[NR_RANGE_MR]; struct map_range mr[NR_RANGE_MR];
int nr_range, i; int nr_range, i;
......
arch/x86/mm/init_32.c
浏览文件 @ 467c88fe
...@@ -806,11 +806,6 @@ static unsigned long __init setup_node_bootmem(int nodeid, ...@@ -806,11 +806,6 @@ static unsigned long __init setup_node_bootmem(int nodeid,
{ {
unsigned long bootmap_size; unsigned long bootmap_size;
if (start_pfn > max_low_pfn)
return bootmap;
if (end_pfn > max_low_pfn)
end_pfn = max_low_pfn;
/* don't touch min_low_pfn */ /* don't touch min_low_pfn */
bootmap_size = init_bootmem_node(NODE_DATA(nodeid), bootmap_size = init_bootmem_node(NODE_DATA(nodeid),
bootmap >> PAGE_SHIFT, bootmap >> PAGE_SHIFT,
...@@ -843,13 +838,23 @@ void __init setup_bootmem_allocator(void) ...@@ -843,13 +838,23 @@ void __init setup_bootmem_allocator(void)
max_pfn_mapped<<PAGE_SHIFT); max_pfn_mapped<<PAGE_SHIFT);
printk(KERN_INFO " low ram: 0 - %08lx\n", max_low_pfn<<PAGE_SHIFT); printk(KERN_INFO " low ram: 0 - %08lx\n", max_low_pfn<<PAGE_SHIFT);
for_each_online_node(nodeid) {
unsigned long start_pfn, end_pfn;
#ifdef CONFIG_NEED_MULTIPLE_NODES #ifdef CONFIG_NEED_MULTIPLE_NODES
for_each_online_node(nodeid) start_pfn = node_start_pfn[nodeid];
bootmap = setup_node_bootmem(nodeid, node_start_pfn[nodeid], end_pfn = node_end_pfn[nodeid];
node_end_pfn[nodeid], bootmap); if (start_pfn > max_low_pfn)
continue;
if (end_pfn > max_low_pfn)
end_pfn = max_low_pfn;
#else #else
bootmap = setup_node_bootmem(0, 0, max_low_pfn, bootmap); start_pfn = 0;
end_pfn = max_low_pfn;
#endif #endif
bootmap = setup_node_bootmem(nodeid, start_pfn, end_pfn,
bootmap);
}
after_bootmem = 1; after_bootmem = 1;
} }
......
arch/x86/mm/init_64.c
浏览文件 @ 467c88fe
...@@ -85,7 +85,7 @@ early_param("gbpages", parse_direct_gbpages_on); ...@@ -85,7 +85,7 @@ early_param("gbpages", parse_direct_gbpages_on);
pteval_t __supported_pte_mask __read_mostly = ~_PAGE_IOMAP; pteval_t __supported_pte_mask __read_mostly = ~_PAGE_IOMAP;
EXPORT_SYMBOL_GPL(__supported_pte_mask); EXPORT_SYMBOL_GPL(__supported_pte_mask);
static int do_not_nx __cpuinitdata; static int disable_nx __cpuinitdata;
/* /*
* noexec=on|off * noexec=on|off
...@@ -100,9 +100,9 @@ static int __init nonx_setup(char *str) ...@@ -100,9 +100,9 @@ static int __init nonx_setup(char *str)
return -EINVAL; return -EINVAL;
if (!strncmp(str, "on", 2)) { if (!strncmp(str, "on", 2)) {
__supported_pte_mask |= _PAGE_NX; __supported_pte_mask |= _PAGE_NX;
do_not_nx = 0; disable_nx = 0;
} else if (!strncmp(str, "off", 3)) { } else if (!strncmp(str, "off", 3)) {
do_not_nx = 1; disable_nx = 1;
__supported_pte_mask &= ~_PAGE_NX; __supported_pte_mask &= ~_PAGE_NX;
} }
return 0; return 0;
...@@ -114,7 +114,7 @@ void __cpuinit check_efer(void) ...@@ -114,7 +114,7 @@ void __cpuinit check_efer(void)
unsigned long efer; unsigned long efer;
rdmsrl(MSR_EFER, efer); rdmsrl(MSR_EFER, efer);
if (!(efer & EFER_NX) || do_not_nx) if (!(efer & EFER_NX) || disable_nx)
__supported_pte_mask &= ~_PAGE_NX; __supported_pte_mask &= ~_PAGE_NX;
} }
......
arch/x86/mm/ioremap.c
浏览文件 @ 467c88fe
...@@ -87,6 +87,8 @@ bool __virt_addr_valid(unsigned long x) ...@@ -87,6 +87,8 @@ bool __virt_addr_valid(unsigned long x)
return false; return false;
if (__vmalloc_start_set && is_vmalloc_addr((void *) x)) if (__vmalloc_start_set && is_vmalloc_addr((void *) x))
return false; return false;
if (x >= FIXADDR_START)
return false;
return pfn_valid((x - PAGE_OFFSET) >> PAGE_SHIFT); return pfn_valid((x - PAGE_OFFSET) >> PAGE_SHIFT);
} }
EXPORT_SYMBOL(__virt_addr_valid); EXPORT_SYMBOL(__virt_addr_valid);
...@@ -504,13 +506,19 @@ static inline pte_t * __init early_ioremap_pte(unsigned long addr) ...@@ -504,13 +506,19 @@ static inline pte_t * __init early_ioremap_pte(unsigned long addr)
return &bm_pte[pte_index(addr)]; return &bm_pte[pte_index(addr)];
} }
static unsigned long slot_virt[FIX_BTMAPS_SLOTS] __initdata;
void __init early_ioremap_init(void) void __init early_ioremap_init(void)
{ {
pmd_t *pmd; pmd_t *pmd;
int i;
if (early_ioremap_debug) if (early_ioremap_debug)
printk(KERN_INFO "early_ioremap_init()\n"); printk(KERN_INFO "early_ioremap_init()\n");
for (i = 0; i < FIX_BTMAPS_SLOTS; i++)
slot_virt[i] = fix_to_virt(FIX_BTMAP_BEGIN - NR_FIX_BTMAPS*i);
pmd = early_ioremap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)); pmd = early_ioremap_pmd(fix_to_virt(FIX_BTMAP_BEGIN));
memset(bm_pte, 0, sizeof(bm_pte)); memset(bm_pte, 0, sizeof(bm_pte));
pmd_populate_kernel(&init_mm, pmd, bm_pte); pmd_populate_kernel(&init_mm, pmd, bm_pte);
...@@ -577,6 +585,7 @@ static inline void __init early_clear_fixmap(enum fixed_addresses idx) ...@@ -577,6 +585,7 @@ static inline void __init early_clear_fixmap(enum fixed_addresses idx)
static void __iomem *prev_map[FIX_BTMAPS_SLOTS] __initdata; static void __iomem *prev_map[FIX_BTMAPS_SLOTS] __initdata;
static unsigned long prev_size[FIX_BTMAPS_SLOTS] __initdata; static unsigned long prev_size[FIX_BTMAPS_SLOTS] __initdata;
static int __init check_early_ioremap_leak(void) static int __init check_early_ioremap_leak(void)
{ {
int count = 0; int count = 0;
...@@ -598,7 +607,8 @@ static int __init check_early_ioremap_leak(void) ...@@ -598,7 +607,8 @@ static int __init check_early_ioremap_leak(void)
} }
late_initcall(check_early_ioremap_leak); late_initcall(check_early_ioremap_leak);
static void __init __iomem *__early_ioremap(unsigned long phys_addr, unsigned long size, pgprot_t prot) static void __init __iomem *
__early_ioremap(unsigned long phys_addr, unsigned long size, pgprot_t prot)
{ {
unsigned long offset, last_addr; unsigned long offset, last_addr;
unsigned int nrpages; unsigned int nrpages;
...@@ -664,9 +674,9 @@ static void __init __iomem *__early_ioremap(unsigned long phys_addr, unsigned lo ...@@ -664,9 +674,9 @@ static void __init __iomem *__early_ioremap(unsigned long phys_addr, unsigned lo
--nrpages; --nrpages;
} }
if (early_ioremap_debug) if (early_ioremap_debug)
printk(KERN_CONT "%08lx + %08lx\n", offset, fix_to_virt(idx0)); printk(KERN_CONT "%08lx + %08lx\n", offset, slot_virt[slot]);
prev_map[slot] = (void __iomem *)(offset + fix_to_virt(idx0)); prev_map[slot] = (void __iomem *)(offset + slot_virt[slot]);
return prev_map[slot]; return prev_map[slot];
} }
...@@ -734,8 +744,3 @@ void __init early_iounmap(void __iomem *addr, unsigned long size) ...@@ -734,8 +744,3 @@ void __init early_iounmap(void __iomem *addr, unsigned long size)
} }
prev_map[slot] = NULL; prev_map[slot] = NULL;
} }
void __this_fixmap_does_not_exist(void)
{
WARN_ON(1);
}
arch/x86/mm/kmmio.c
浏览文件 @ 467c88fe
...@@ -451,23 +451,24 @@ static void rcu_free_kmmio_fault_pages(struct rcu_head *head) ...@@ -451,23 +451,24 @@ static void rcu_free_kmmio_fault_pages(struct rcu_head *head)
static void remove_kmmio_fault_pages(struct rcu_head *head) static void remove_kmmio_fault_pages(struct rcu_head *head)
{ {
struct kmmio_delayed_release *dr = container_of( struct kmmio_delayed_release *dr =
head, container_of(head, struct kmmio_delayed_release, rcu);
struct kmmio_delayed_release,
rcu);
struct kmmio_fault_page *p = dr->release_list; struct kmmio_fault_page *p = dr->release_list;
struct kmmio_fault_page **prevp = &dr->release_list; struct kmmio_fault_page **prevp = &dr->release_list;
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&kmmio_lock, flags); spin_lock_irqsave(&kmmio_lock, flags);
while (p) { while (p) {
if (!p->count) if (!p->count) {
list_del_rcu(&p->list); list_del_rcu(&p->list);
else prevp = &p->release_next;
} else {
*prevp = p->release_next; *prevp = p->release_next;
prevp = &p->release_next; }
p = p->release_next; p = p->release_next;
} }
spin_unlock_irqrestore(&kmmio_lock, flags); spin_unlock_irqrestore(&kmmio_lock, flags);
/* This is the real RCU destroy call. */ /* This is the real RCU destroy call. */
call_rcu(&dr->rcu, rcu_free_kmmio_fault_pages); call_rcu(&dr->rcu, rcu_free_kmmio_fault_pages);
} }
......
arch/x86/mm/memtest.c
浏览文件 @ 467c88fe
...@@ -100,6 +100,9 @@ static int __init parse_memtest(char *arg) ...@@ -100,6 +100,9 @@ static int __init parse_memtest(char *arg)
{ {
if (arg) if (arg)
memtest_pattern = simple_strtoul(arg, NULL, 0); memtest_pattern = simple_strtoul(arg, NULL, 0);
else
memtest_pattern = ARRAY_SIZE(patterns);
return 0; return 0;
} }
......
block/blk-merge.c
浏览文件 @ 467c88fe
...@@ -39,14 +39,13 @@ void blk_recalc_rq_sectors(struct request *rq, int nsect) ...@@ -39,14 +39,13 @@ void blk_recalc_rq_sectors(struct request *rq, int nsect)
} }
static unsigned int __blk_recalc_rq_segments(struct request_queue *q, static unsigned int __blk_recalc_rq_segments(struct request_queue *q,
struct bio *bio, struct bio *bio)
unsigned int *seg_size_ptr)
{ {
unsigned int phys_size; unsigned int phys_size;
struct bio_vec *bv, *bvprv = NULL; struct bio_vec *bv, *bvprv = NULL;
int cluster, i, high, highprv = 1; int cluster, i, high, highprv = 1;
unsigned int seg_size, nr_phys_segs; unsigned int seg_size, nr_phys_segs;
struct bio *fbio; struct bio *fbio, *bbio;
if (!bio) if (!bio)
return 0; return 0;
...@@ -87,26 +86,20 @@ static unsigned int __blk_recalc_rq_segments(struct request_queue *q, ...@@ -87,26 +86,20 @@ static unsigned int __blk_recalc_rq_segments(struct request_queue *q,
seg_size = bv->bv_len; seg_size = bv->bv_len;
highprv = high; highprv = high;
} }
bbio = bio;
} }
if (seg_size_ptr) if (nr_phys_segs == 1 && seg_size > fbio->bi_seg_front_size)
*seg_size_ptr = seg_size; fbio->bi_seg_front_size = seg_size;
if (seg_size > bbio->bi_seg_back_size)
bbio->bi_seg_back_size = seg_size;
return nr_phys_segs; return nr_phys_segs;
} }
void blk_recalc_rq_segments(struct request *rq) void blk_recalc_rq_segments(struct request *rq)
{ {
unsigned int seg_size = 0, phys_segs; rq->nr_phys_segments = __blk_recalc_rq_segments(rq->q, rq->bio);
phys_segs = __blk_recalc_rq_segments(rq->q, rq->bio, &seg_size);
if (phys_segs == 1 && seg_size > rq->bio->bi_seg_front_size)
rq->bio->bi_seg_front_size = seg_size;
if (seg_size > rq->biotail->bi_seg_back_size)
rq->biotail->bi_seg_back_size = seg_size;
rq->nr_phys_segments = phys_segs;
} }
void blk_recount_segments(struct request_queue *q, struct bio *bio) void blk_recount_segments(struct request_queue *q, struct bio *bio)
...@@ -114,7 +107,7 @@ void blk_recount_segments(struct request_queue *q, struct bio *bio) ...@@ -114,7 +107,7 @@ void blk_recount_segments(struct request_queue *q, struct bio *bio)
struct bio *nxt = bio->bi_next; struct bio *nxt = bio->bi_next;
bio->bi_next = NULL; bio->bi_next = NULL;
bio->bi_phys_segments = __blk_recalc_rq_segments(q, bio, NULL); bio->bi_phys_segments = __blk_recalc_rq_segments(q, bio);
bio->bi_next = nxt; bio->bi_next = nxt;
bio->bi_flags |= (1 << BIO_SEG_VALID); bio->bi_flags |= (1 << BIO_SEG_VALID);
} }
......
drivers/ata/ahci.c
浏览文件 @ 467c88fe
...@@ -582,18 +582,18 @@ static const struct pci_device_id ahci_pci_tbl[] = { ...@@ -582,18 +582,18 @@ static const struct pci_device_id ahci_pci_tbl[] = {
{ PCI_VDEVICE(NVIDIA, 0x0abd), board_ahci }, /* MCP79 */ { PCI_VDEVICE(NVIDIA, 0x0abd), board_ahci }, /* MCP79 */
{ PCI_VDEVICE(NVIDIA, 0x0abe), board_ahci }, /* MCP79 */ { PCI_VDEVICE(NVIDIA, 0x0abe), board_ahci }, /* MCP79 */
{ PCI_VDEVICE(NVIDIA, 0x0abf), board_ahci }, /* MCP79 */ { PCI_VDEVICE(NVIDIA, 0x0abf), board_ahci }, /* MCP79 */
{ PCI_VDEVICE(NVIDIA, 0x0bc8), board_ahci }, /* MCP7B */ { PCI_VDEVICE(NVIDIA, 0x0d84), board_ahci }, /* MCP89 */
{ PCI_VDEVICE(NVIDIA, 0x0bc9), board_ahci }, /* MCP7B */ { PCI_VDEVICE(NVIDIA, 0x0d85), board_ahci }, /* MCP89 */
{ PCI_VDEVICE(NVIDIA, 0x0bca), board_ahci }, /* MCP7B */ { PCI_VDEVICE(NVIDIA, 0x0d86), board_ahci }, /* MCP89 */
{ PCI_VDEVICE(NVIDIA, 0x0bcb), board_ahci }, /* MCP7B */ { PCI_VDEVICE(NVIDIA, 0x0d87), board_ahci }, /* MCP89 */
{ PCI_VDEVICE(NVIDIA, 0x0bcc), board_ahci }, /* MCP7B */ { PCI_VDEVICE(NVIDIA, 0x0d88), board_ahci }, /* MCP89 */
{ PCI_VDEVICE(NVIDIA, 0x0bcd), board_ahci }, /* MCP7B */ { PCI_VDEVICE(NVIDIA, 0x0d89), board_ahci }, /* MCP89 */
{ PCI_VDEVICE(NVIDIA, 0x0bce), board_ahci }, /* MCP7B */ { PCI_VDEVICE(NVIDIA, 0x0d8a), board_ahci }, /* MCP89 */
{ PCI_VDEVICE(NVIDIA, 0x0bcf), board_ahci }, /* MCP7B */ { PCI_VDEVICE(NVIDIA, 0x0d8b), board_ahci }, /* MCP89 */
{ PCI_VDEVICE(NVIDIA, 0x0bc4), board_ahci }, /* MCP7B */ { PCI_VDEVICE(NVIDIA, 0x0d8c), board_ahci }, /* MCP89 */
{ PCI_VDEVICE(NVIDIA, 0x0bc5), board_ahci }, /* MCP7B */ { PCI_VDEVICE(NVIDIA, 0x0d8d), board_ahci }, /* MCP89 */
{ PCI_VDEVICE(NVIDIA, 0x0bc6), board_ahci }, /* MCP7B */ { PCI_VDEVICE(NVIDIA, 0x0d8e), board_ahci }, /* MCP89 */
{ PCI_VDEVICE(NVIDIA, 0x0bc7), board_ahci }, /* MCP7B */ { PCI_VDEVICE(NVIDIA, 0x0d8f), board_ahci }, /* MCP89 */
/* SiS */ /* SiS */
{ PCI_VDEVICE(SI, 0x1184), board_ahci }, /* SiS 966 */ { PCI_VDEVICE(SI, 0x1184), board_ahci }, /* SiS 966 */
......
drivers/ata/libata-core.c
浏览文件 @ 467c88fe
...@@ -1322,14 +1322,16 @@ static u64 ata_id_n_sectors(const u16 *id) ...@@ -1322,14 +1322,16 @@ static u64 ata_id_n_sectors(const u16 *id)
{ {
if (ata_id_has_lba(id)) { if (ata_id_has_lba(id)) {
if (ata_id_has_lba48(id)) if (ata_id_has_lba48(id))
return ata_id_u64(id, 100); return ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
else else
return ata_id_u32(id, 60); return ata_id_u32(id, ATA_ID_LBA_CAPACITY);
} else { } else {
if (ata_id_current_chs_valid(id)) if (ata_id_current_chs_valid(id))
return ata_id_u32(id, 57); return id[ATA_ID_CUR_CYLS] * id[ATA_ID_CUR_HEADS] *
id[ATA_ID_CUR_SECTORS];
else else
return id[1] * id[3] * id[6]; return id[ATA_ID_CYLS] * id[ATA_ID_HEADS] *
id[ATA_ID_SECTORS];
} }
} }
...@@ -4612,7 +4614,7 @@ void ata_sg_clean(struct ata_queued_cmd *qc) ...@@ -4612,7 +4614,7 @@ void ata_sg_clean(struct ata_queued_cmd *qc)
VPRINTK("unmapping %u sg elements\n", qc->n_elem); VPRINTK("unmapping %u sg elements\n", qc->n_elem);
if (qc->n_elem) if (qc->n_elem)
dma_unmap_sg(ap->dev, sg, qc->n_elem, dir); dma_unmap_sg(ap->dev, sg, qc->orig_n_elem, dir);
qc->flags &= ~ATA_QCFLAG_DMAMAP; qc->flags &= ~ATA_QCFLAG_DMAMAP;
qc->sg = NULL; qc->sg = NULL;
...@@ -4727,7 +4729,7 @@ static int ata_sg_setup(struct ata_queued_cmd *qc) ...@@ -4727,7 +4729,7 @@ static int ata_sg_setup(struct ata_queued_cmd *qc)
return -1; return -1;
DPRINTK("%d sg elements mapped\n", n_elem); DPRINTK("%d sg elements mapped\n", n_elem);
qc->orig_n_elem = qc->n_elem;
qc->n_elem = n_elem; qc->n_elem = n_elem;
qc->flags |= ATA_QCFLAG_DMAMAP; qc->flags |= ATA_QCFLAG_DMAMAP;
......
drivers/ata/libata-eh.c
浏览文件 @ 467c88fe
...@@ -2423,11 +2423,14 @@ int ata_eh_reset(struct ata_link *link, int classify, ...@@ -2423,11 +2423,14 @@ int ata_eh_reset(struct ata_link *link, int classify,
} }
/* prereset() might have cleared ATA_EH_RESET. If so, /* prereset() might have cleared ATA_EH_RESET. If so,
* bang classes and return. * bang classes, thaw and return.
*/ */
if (reset && !(ehc->i.action & ATA_EH_RESET)) { if (reset && !(ehc->i.action & ATA_EH_RESET)) {
ata_for_each_dev(dev, link, ALL) ata_for_each_dev(dev, link, ALL)
classes[dev->devno] = ATA_DEV_NONE; classes[dev->devno] = ATA_DEV_NONE;
if ((ap->pflags & ATA_PFLAG_FROZEN) &&
ata_is_host_link(link))
ata_eh_thaw_port(ap);
rc = 0; rc = 0;
goto out; goto out;
} }
...@@ -2901,7 +2904,7 @@ static int atapi_eh_clear_ua(struct ata_device *dev) ...@@ -2901,7 +2904,7 @@ static int atapi_eh_clear_ua(struct ata_device *dev)
int i; int i;
for (i = 0; i < ATA_EH_UA_TRIES; i++) { for (i = 0; i < ATA_EH_UA_TRIES; i++) {
u8 sense_buffer[SCSI_SENSE_BUFFERSIZE]; u8 *sense_buffer = dev->link->ap->sector_buf;
u8 sense_key = 0; u8 sense_key = 0;
unsigned int err_mask; unsigned int err_mask;
......
drivers/ata/sata_nv.c
浏览文件 @ 467c88fe
...@@ -2523,7 +2523,7 @@ static void __exit nv_exit(void) ...@@ -2523,7 +2523,7 @@ static void __exit nv_exit(void)
module_init(nv_init); module_init(nv_init);
module_exit(nv_exit); module_exit(nv_exit);
module_param_named(adma, adma_enabled, bool, 0444); module_param_named(adma, adma_enabled, bool, 0444);
MODULE_PARM_DESC(adma, "Enable use of ADMA (Default: true)"); MODULE_PARM_DESC(adma, "Enable use of ADMA (Default: false)");
module_param_named(swncq, swncq_enabled, bool, 0444); module_param_named(swncq, swncq_enabled, bool, 0444);
MODULE_PARM_DESC(swncq, "Enable use of SWNCQ (Default: true)"); MODULE_PARM_DESC(swncq, "Enable use of SWNCQ (Default: true)");
drivers/block/cciss.c
浏览文件 @ 467c88fe
...@@ -3606,11 +3606,9 @@ static int __devinit cciss_init_one(struct pci_dev *pdev, ...@@ -3606,11 +3606,9 @@ static int __devinit cciss_init_one(struct pci_dev *pdev,
if (cciss_hard_reset_controller(pdev) || cciss_reset_msi(pdev)) if (cciss_hard_reset_controller(pdev) || cciss_reset_msi(pdev))
return -ENODEV; return -ENODEV;
/* Some devices (notably the HP Smart Array 5i Controller) /* Now try to get the controller to respond to a no-op. Some
need a little pause here */ devices (notably the HP Smart Array 5i Controller) need
schedule_timeout_uninterruptible(30*HZ); up to 30 seconds to respond. */
/* Now try to get the controller to respond to a no-op */
for (i=0; i<30; i++) { for (i=0; i<30; i++) {
if (cciss_noop(pdev) == 0) if (cciss_noop(pdev) == 0)
break; break;
......
drivers/block/loop.c
浏览文件 @ 467c88fe
...@@ -392,8 +392,7 @@ lo_splice_actor(struct pipe_inode_info *pipe, struct pipe_buffer *buf, ...@@ -392,8 +392,7 @@ lo_splice_actor(struct pipe_inode_info *pipe, struct pipe_buffer *buf,
struct loop_device *lo = p->lo; struct loop_device *lo = p->lo;
struct page *page = buf->page; struct page *page = buf->page;
sector_t IV; sector_t IV;
size_t size; int size, ret;
int ret;
ret = buf->ops->confirm(pipe, buf); ret = buf->ops->confirm(pipe, buf);
if (unlikely(ret)) if (unlikely(ret))
......
drivers/block/xen-blkfront.c
浏览文件 @ 467c88fe
...@@ -977,6 +977,8 @@ static void backend_changed(struct xenbus_device *dev, ...@@ -977,6 +977,8 @@ static void backend_changed(struct xenbus_device *dev,
break; break;
case XenbusStateClosing: case XenbusStateClosing:
if (info->gd == NULL)
xenbus_dev_fatal(dev, -ENODEV, "gd is NULL");
bd = bdget_disk(info->gd, 0); bd = bdget_disk(info->gd, 0);
if (bd == NULL) if (bd == NULL)
xenbus_dev_fatal(dev, -ENODEV, "bdget failed"); xenbus_dev_fatal(dev, -ENODEV, "bdget failed");
......
drivers/dca/dca-core.c
浏览文件 @ 467c88fe
/* /*
* Copyright(c) 2007 Intel Corporation. All rights reserved. * Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free * under the terms of the GNU General Public License as published by the Free
......
drivers/dma/dmatest.c
浏览文件 @ 467c88fe
...@@ -430,13 +430,15 @@ late_initcall(dmatest_init); ...@@ -430,13 +430,15 @@ late_initcall(dmatest_init);
static void __exit dmatest_exit(void) static void __exit dmatest_exit(void)
{ {
struct dmatest_chan *dtc, *_dtc; struct dmatest_chan *dtc, *_dtc;
struct dma_chan *chan;
list_for_each_entry_safe(dtc, _dtc, &dmatest_channels, node) { list_for_each_entry_safe(dtc, _dtc, &dmatest_channels, node) {
list_del(&dtc->node); list_del(&dtc->node);
chan = dtc->chan;
dmatest_cleanup_channel(dtc); dmatest_cleanup_channel(dtc);
pr_debug("dmatest: dropped channel %s\n", pr_debug("dmatest: dropped channel %s\n",
dma_chan_name(dtc->chan)); dma_chan_name(chan));
dma_release_channel(dtc->chan); dma_release_channel(chan);
} }
} }
module_exit(dmatest_exit); module_exit(dmatest_exit);
......
drivers/dma/fsldma.c
浏览文件 @ 467c88fe
...@@ -158,7 +158,8 @@ static void dma_start(struct fsl_dma_chan *fsl_chan) ...@@ -158,7 +158,8 @@ static void dma_start(struct fsl_dma_chan *fsl_chan)
static void dma_halt(struct fsl_dma_chan *fsl_chan) static void dma_halt(struct fsl_dma_chan *fsl_chan)
{ {
int i = 0; int i;
DMA_OUT(fsl_chan, &fsl_chan->reg_base->mr, DMA_OUT(fsl_chan, &fsl_chan->reg_base->mr,
DMA_IN(fsl_chan, &fsl_chan->reg_base->mr, 32) | FSL_DMA_MR_CA, DMA_IN(fsl_chan, &fsl_chan->reg_base->mr, 32) | FSL_DMA_MR_CA,
32); 32);
...@@ -166,8 +167,11 @@ static void dma_halt(struct fsl_dma_chan *fsl_chan) ...@@ -166,8 +167,11 @@ static void dma_halt(struct fsl_dma_chan *fsl_chan)
DMA_IN(fsl_chan, &fsl_chan->reg_base->mr, 32) & ~(FSL_DMA_MR_CS DMA_IN(fsl_chan, &fsl_chan->reg_base->mr, 32) & ~(FSL_DMA_MR_CS
| FSL_DMA_MR_EMS_EN | FSL_DMA_MR_CA), 32); | FSL_DMA_MR_EMS_EN | FSL_DMA_MR_CA), 32);
while (!dma_is_idle(fsl_chan) && (i++ < 100)) for (i = 0; i < 100; i++) {
if (dma_is_idle(fsl_chan))
break;
udelay(10); udelay(10);
}
if (i >= 100 && !dma_is_idle(fsl_chan)) if (i >= 100 && !dma_is_idle(fsl_chan))
dev_err(fsl_chan->dev, "DMA halt timeout!\n"); dev_err(fsl_chan->dev, "DMA halt timeout!\n");
} }
......
drivers/dma/ioat.c
浏览文件 @ 467c88fe
此差异已折叠。
drivers/dma/ioat_dca.c
浏览文件 @ 467c88fe
此差异已折叠。
drivers/dma/ioat_dma.c
浏览文件 @ 467c88fe
此差异已折叠。
drivers/dma/ioatdma.h
浏览文件 @ 467c88fe
此差异已折叠。
drivers/dma/ioatdma_hw.h
浏览文件 @ 467c88fe
此差异已折叠。
drivers/dma/ioatdma_registers.h
浏览文件 @ 467c88fe
此差异已折叠。
drivers/dma/iop-adma.c
浏览文件 @ 467c88fe
此差异已折叠。
drivers/dma/ipu/ipu_idmac.c
浏览文件 @ 467c88fe
此差异已折叠。
drivers/dma/mv_xor.c
浏览文件 @ 467c88fe
此差异已折叠。
drivers/ide/Kconfig
浏览文件 @ 467c88fe
此差异已折叠。
drivers/ide/Makefile
浏览文件 @ 467c88fe
此差异已折叠。
drivers/ide/at91_ide.c 0 → 100644
浏览文件 @ 467c88fe
此差异已折叠。
drivers/ide/ide-disk_proc.c
浏览文件 @ 467c88fe
此差异已折叠。
drivers/ide/ide-floppy_proc.c
浏览文件 @ 467c88fe
此差异已折叠。
drivers/ide/ide-io.c
浏览文件 @ 467c88fe
此差异已折叠。
drivers/ide/ide-iops.c
浏览文件 @ 467c88fe
此差异已折叠。
drivers/ide/ide-probe.c
浏览文件 @ 467c88fe
此差异已折叠。
drivers/ide/ide-proc.c
浏览文件 @ 467c88fe
此差异已折叠。
drivers/ide/ide-tape.c
浏览文件 @ 467c88fe
此差异已折叠。
drivers/mmc/core/mmc_ops.c
浏览文件 @ 467c88fe
此差异已折叠。
drivers/watchdog/gef_wdt.c
浏览文件 @ 467c88fe
此差异已折叠。
drivers/watchdog/ks8695_wdt.c
浏览文件 @ 467c88fe
此差异已折叠。
drivers/watchdog/orion5x_wdt.c
浏览文件 @ 467c88fe
此差异已折叠。
drivers/watchdog/rc32434_wdt.c
浏览文件 @ 467c88fe
此差异已折叠。
fs/ext4/ialloc.c
浏览文件 @ 467c88fe
此差异已折叠。
fs/squashfs/block.c
浏览文件 @ 467c88fe
此差异已折叠。
fs/squashfs/cache.c
浏览文件 @ 467c88fe
此差异已折叠。
fs/squashfs/inode.c
浏览文件 @ 467c88fe
此差异已折叠。
fs/squashfs/squashfs.h
浏览文件 @ 467c88fe
此差异已折叠。
fs/squashfs/super.c
浏览文件 @ 467c88fe
此差异已折叠。
include/linux/ata.h
浏览文件 @ 467c88fe
此差异已折叠。
include/linux/dmaengine.h
浏览文件 @ 467c88fe
此差异已折叠。
include/linux/hdreg.h
浏览文件 @ 467c88fe
此差异已折叠。
include/linux/ide.h
浏览文件 @ 467c88fe
此差异已折叠。
include/linux/libata.h
浏览文件 @ 467c88fe
此差异已折叠。
include/linux/percpu.h
浏览文件 @ 467c88fe
此差异已折叠。
include/linux/serio.h
浏览文件 @ 467c88fe
此差异已折叠。
kernel/module.c
浏览文件 @ 467c88fe
此差异已折叠。
kernel/softirq.c
浏览文件 @ 467c88fe
此差异已折叠。
mm/percpu.c
浏览文件 @ 467c88fe
此差异已折叠。
security/smack/smack_lsm.c
浏览文件 @ 467c88fe
此差异已折叠。
security/smack/smackfs.c
浏览文件 @ 467c88fe
此差异已折叠。
sound/pci/hda/patch_sigmatel.c
浏览文件 @ 467c88fe
此差异已折叠。
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