提交 44a9462d 编写于 作者: M Mark A. Greer 提交者: Paul Walmsley

ARM: AM33XX: Add sha0 crypto clock data

Add clock data for for the SHA0 crypto module
on the am33xx SoC.

CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: NMark A. Greer <mgreer@animalcreek.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
上级 114d7a8b
...@@ -413,6 +413,10 @@ static struct clk smartreflex1_fck; ...@@ -413,6 +413,10 @@ static struct clk smartreflex1_fck;
DEFINE_STRUCT_CLK_HW_OMAP(smartreflex1_fck, NULL); DEFINE_STRUCT_CLK_HW_OMAP(smartreflex1_fck, NULL);
DEFINE_STRUCT_CLK(smartreflex1_fck, dpll_core_ck_parents, clk_ops_null); DEFINE_STRUCT_CLK(smartreflex1_fck, dpll_core_ck_parents, clk_ops_null);
static struct clk sha0_fck;
DEFINE_STRUCT_CLK_HW_OMAP(sha0_fck, NULL);
DEFINE_STRUCT_CLK(sha0_fck, dpll_core_ck_parents, clk_ops_null);
/* /*
* Modules clock nodes * Modules clock nodes
* *
...@@ -878,6 +882,7 @@ static struct omap_clk am33xx_clks[] = { ...@@ -878,6 +882,7 @@ static struct omap_clk am33xx_clks[] = {
CLK(NULL, "mmu_fck", &mmu_fck), CLK(NULL, "mmu_fck", &mmu_fck),
CLK(NULL, "smartreflex0_fck", &smartreflex0_fck), CLK(NULL, "smartreflex0_fck", &smartreflex0_fck),
CLK(NULL, "smartreflex1_fck", &smartreflex1_fck), CLK(NULL, "smartreflex1_fck", &smartreflex1_fck),
CLK(NULL, "sha0_fck", &sha0_fck),
CLK(NULL, "timer1_fck", &timer1_fck), CLK(NULL, "timer1_fck", &timer1_fck),
CLK(NULL, "timer2_fck", &timer2_fck), CLK(NULL, "timer2_fck", &timer2_fck),
CLK(NULL, "timer3_fck", &timer3_fck), CLK(NULL, "timer3_fck", &timer3_fck),
......
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