提交 41ec0d50 编写于 作者: S Shawn Guo 提交者: Shawn Guo

arm64: dts: zx296718: set a better parent clock for I2S0

The default I2S0 parent clock AUDIO_24M can not be divided into required
sample rate in some cases, for example when 48KHz is needed.  Change the
parent clock to AUDIO_99M which works for most sample rates.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
上级 9e5edc82
......@@ -564,6 +564,8 @@
clocks = <&audiocrm AUDIO_I2S0_WCLK>,
<&audiocrm AUDIO_I2S0_PCLK>;
clock-names = "wclk", "pclk";
assigned-clocks = <&audiocrm I2S0_WCLK_MUX>;
assigned-clock-parents = <&topcrm AUDIO_99M>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma 22>, <&dma 23>;
dma-names = "tx", "rx";
......
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