提交 3a928e98 编写于 作者: L Ley Foon Tan 提交者: Bjorn Helgaas

PCI: altera: Poll for link up status after retraining the link

Some PCIe devices take a long time to reach link up state after retrain.
Poll for link up status after retraining the link.  This is to make sure
the link is up before we access configuration space.

[bhelgaas: changelog]
Signed-off-by: NLey Foon Tan <lftan@altera.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
上级 c622032e
...@@ -61,6 +61,8 @@ ...@@ -61,6 +61,8 @@
#define TLP_LOOP 500 #define TLP_LOOP 500
#define RP_DEVFN 0 #define RP_DEVFN 0
#define LINK_UP_TIMEOUT 5000
#define INTX_NUM 4 #define INTX_NUM 4
#define DWORD_MASK 3 #define DWORD_MASK 3
...@@ -101,6 +103,7 @@ static void altera_pcie_retrain(struct pci_dev *dev) ...@@ -101,6 +103,7 @@ static void altera_pcie_retrain(struct pci_dev *dev)
{ {
u16 linkcap, linkstat; u16 linkcap, linkstat;
struct altera_pcie *pcie = dev->bus->sysdata; struct altera_pcie *pcie = dev->bus->sysdata;
int timeout = 0;
if (!altera_pcie_link_is_up(pcie)) if (!altera_pcie_link_is_up(pcie))
return; return;
...@@ -115,9 +118,16 @@ static void altera_pcie_retrain(struct pci_dev *dev) ...@@ -115,9 +118,16 @@ static void altera_pcie_retrain(struct pci_dev *dev)
return; return;
pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &linkstat); pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &linkstat);
if ((linkstat & PCI_EXP_LNKSTA_CLS) == PCI_EXP_LNKSTA_CLS_2_5GB) if ((linkstat & PCI_EXP_LNKSTA_CLS) == PCI_EXP_LNKSTA_CLS_2_5GB) {
pcie_capability_set_word(dev, PCI_EXP_LNKCTL, pcie_capability_set_word(dev, PCI_EXP_LNKCTL,
PCI_EXP_LNKCTL_RL); PCI_EXP_LNKCTL_RL);
while (!altera_pcie_link_is_up(pcie)) {
timeout++;
if (timeout > LINK_UP_TIMEOUT)
break;
udelay(5);
}
}
} }
DECLARE_PCI_FIXUP_EARLY(0x1172, PCI_ANY_ID, altera_pcie_retrain); DECLARE_PCI_FIXUP_EARLY(0x1172, PCI_ANY_ID, altera_pcie_retrain);
......
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