提交 3795e91d 编写于 作者: S Soren Brinkmann 提交者: Michal Simek

arm: dt: zynq: Add fclk-enable property to clkc node

Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
上级 38dbfb59
...@@ -134,6 +134,7 @@ ...@@ -134,6 +134,7 @@
#clock-cells = <1>; #clock-cells = <1>;
compatible = "xlnx,ps7-clkc"; compatible = "xlnx,ps7-clkc";
ps-clk-frequency = <33333333>; ps-clk-frequency = <33333333>;
fclk-enable = <0>;
clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
"cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x",
"dci", "lqspi", "smc", "pcap", "gem0", "gem1", "dci", "lqspi", "smc", "pcap", "gem0", "gem1",
......
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