提交 36ad5ae6 编写于 作者: S Soren Brinkmann 提交者: Michal Simek

ARM: zynq: DT: Add DDRC node

Add the DDR controller to the Zynq devicetree.
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
上级 c07c8b00
...@@ -146,6 +146,11 @@ ...@@ -146,6 +146,11 @@
cache-level = <2>; cache-level = <2>;
}; };
memory-controller@f8006000 {
compatible = "xlnx,zynq-ddrc-a05";
reg = <0xf8006000 0x1000>;
} ;
uart0: serial@e0000000 { uart0: serial@e0000000 {
compatible = "xlnx,xuartps", "cdns,uart-r1p8"; compatible = "xlnx,xuartps", "cdns,uart-r1p8";
status = "disabled"; status = "disabled";
......
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