提交 3309a8e2 编写于 作者: M Matthew Leach 提交者: Daniel Lezcano

dts: ca5: add the global timer for the A5

The Cortex A5 contains a global timer: add the appropriate device tree
node.
Acked-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NMatthew Leach <matthew.leach@arm.com>
Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
上级 10b1f231
...@@ -88,6 +88,14 @@ ...@@ -88,6 +88,14 @@
interrupts = <1 13 0x304>; interrupts = <1 13 0x304>;
}; };
timer@2c000200 {
compatible = "arm,cortex-a5-global-timer",
"arm,cortex-a9-global-timer";
reg = <0x2c000200 0x20>;
interrupts = <1 11 0x304>;
clocks = <&oscclk0>;
};
watchdog@2c000620 { watchdog@2c000620 {
compatible = "arm,cortex-a5-twd-wdt"; compatible = "arm,cortex-a5-twd-wdt";
reg = <0x2c000620 0x20>; reg = <0x2c000620 0x20>;
...@@ -120,7 +128,7 @@ ...@@ -120,7 +128,7 @@
compatible = "arm,vexpress,config-bus"; compatible = "arm,vexpress,config-bus";
arm,vexpress,config-bridge = <&v2m_sysreg>; arm,vexpress,config-bridge = <&v2m_sysreg>;
osc@0 { oscclk0: osc@0 {
/* CPU and internal AXI reference clock */ /* CPU and internal AXI reference clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 0>; arm,vexpress-sysreg,func = <1 0>;
......
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