提交 23aaf4ce 编写于 作者: F Fabio Estevam 提交者: Mark Brown

ASoC: fsl ssi doc: Move optional properties to the correct section

Properties 'fsl,ssi-asynchronous', 'fsl,playback-dma' and 'fsl,capture-dma'
are optional, so move them under the optional section of the document.

While at it mention that 'fsl,playback-dma' and 'fsl,capture-dma'
only apply to Power Architecture.
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Acked-by: NTimur Tabi <timur@tabi.org>
Signed-off-by: NMark Brown <broonie@kernel.org>
上级 c6682fed
...@@ -20,24 +20,8 @@ Required properties: ...@@ -20,24 +20,8 @@ Required properties:
have. have.
- interrupt-parent: The phandle for the interrupt controller that - interrupt-parent: The phandle for the interrupt controller that
services interrupts for this device. services interrupts for this device.
- fsl,playback-dma: Phandle to a node for the DMA channel to use for
playback of audio. This is typically dictated by SOC
design. See the notes below.
- fsl,capture-dma: Phandle to a node for the DMA channel to use for
capture (recording) of audio. This is typically dictated
by SOC design. See the notes below.
- fsl,fifo-depth: The number of elements in the transmit and receive FIFOs. - fsl,fifo-depth: The number of elements in the transmit and receive FIFOs.
This number is the maximum allowed value for SFCSR[TFWM0]. This number is the maximum allowed value for SFCSR[TFWM0].
- fsl,ssi-asynchronous:
If specified, the SSI is to be programmed in asynchronous
mode. In this mode, pins SRCK, STCK, SRFS, and STFS must
all be connected to valid signals. In synchronous mode,
SRCK and SRFS are ignored. Asynchronous mode allows
playback and capture to use different sample sizes and
sample rates. Some drivers may require that SRCK and STCK
be connected together, and SRFS and STFS be connected
together. This would still allow different sample sizes,
but not different sample rates.
- clocks: "ipg" - Required clock for the SSI unit - clocks: "ipg" - Required clock for the SSI unit
"baud" - Required clock for SSI master mode. Otherwise this "baud" - Required clock for SSI master mode. Otherwise this
clock is not used clock is not used
...@@ -61,6 +45,24 @@ Optional properties: ...@@ -61,6 +45,24 @@ Optional properties:
- fsl,mode: The operating mode for the AC97 interface only. - fsl,mode: The operating mode for the AC97 interface only.
"ac97-slave" - AC97 mode, SSI is clock slave "ac97-slave" - AC97 mode, SSI is clock slave
"ac97-master" - AC97 mode, SSI is clock master "ac97-master" - AC97 mode, SSI is clock master
- fsl,ssi-asynchronous:
If specified, the SSI is to be programmed in asynchronous
mode. In this mode, pins SRCK, STCK, SRFS, and STFS must
all be connected to valid signals. In synchronous mode,
SRCK and SRFS are ignored. Asynchronous mode allows
playback and capture to use different sample sizes and
sample rates. Some drivers may require that SRCK and STCK
be connected together, and SRFS and STFS be connected
together. This would still allow different sample sizes,
but not different sample rates.
- fsl,playback-dma: Phandle to a node for the DMA channel to use for
playback of audio. This is typically dictated by SOC
design. See the notes below.
Only used on Power Architecture.
- fsl,capture-dma: Phandle to a node for the DMA channel to use for
capture (recording) of audio. This is typically dictated
by SOC design. See the notes below.
Only used on Power Architecture.
Child 'codec' node required properties: Child 'codec' node required properties:
- compatible: Compatible list, contains the name of the codec - compatible: Compatible list, contains the name of the codec
......
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