提交 067cc286 编写于 作者: T Thierry Reding 提交者: Olof Johansson

ARM: tegra: paz00: Fix some indentation inconsistencies

Indentation of the clock property used a hodgepodge of tabs and spaces.
Make them more consistent (tabs for indentation followed by spaces for
alignment).
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>
上级 27ff34ef
...@@ -296,7 +296,7 @@ ...@@ -296,7 +296,7 @@
request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
slave-addr = <138>; slave-addr = <138>;
clocks = <&tegra_car TEGRA20_CLK_I2C3>, clocks = <&tegra_car TEGRA20_CLK_I2C3>,
<&tegra_car TEGRA20_CLK_PLL_P_OUT3>; <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
clock-names = "div-clk", "fast-clk"; clock-names = "div-clk", "fast-clk";
resets = <&tegra_car 67>; resets = <&tegra_car 67>;
reset-names = "i2c"; reset-names = "i2c";
...@@ -589,8 +589,8 @@ ...@@ -589,8 +589,8 @@
GPIO_ACTIVE_HIGH>; GPIO_ACTIVE_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_PLL_A>, clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
<&tegra_car TEGRA20_CLK_PLL_A_OUT0>, <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
<&tegra_car TEGRA20_CLK_CDEV1>; <&tegra_car TEGRA20_CLK_CDEV1>;
clock-names = "pll_a", "pll_a_out0", "mclk"; clock-names = "pll_a", "pll_a_out0", "mclk";
}; };
}; };
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