clk: meson-gxbb: expose spdif master clock

Expose the spdif master clock and the mux to select the appropriate spdif
clock parent depending on the data source.
Acked-by: NMichael Turquette <mturquette@baylibre.com>
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>

drivers/clk/meson/gxbb.h

@@ -280,10 +280,10 @@
 /* CLKID_CTS_AMCLK */
 #define CLKID_CTS_AMCLK_SEL	  108
 #define CLKID_CTS_AMCLK_DIV	  109
-#define CLKID_CTS_MCLK_I958	  110
+/* CLKID_CTS_MCLK_I958 */
 #define CLKID_CTS_MCLK_I958_SEL	  111
 #define CLKID_CTS_MCLK_I958_DIV	  112
-#define CLKID_CTS_I958		  113
+/* CLKID_CTS_I958 */
 
 #define NR_CLKS			  114
 

include/dt-bindings/clock/gxbb-clkc.h

@@ -45,5 +45,7 @@
 #define CLKID_MALI_1		105
 #define CLKID_MALI		106
 #define CLKID_CTS_AMCLK		107
+#define CLKID_CTS_MCLK_I958	110
+#define CLKID_CTS_I958		113
 
 #endif /* __GXBB_CLKC_H */