Provide a module parameter to request internal loop by the SPI master
controller.
This should make loop testing easier without extra HW modification.

For test automation a logic analyzer is recommended for host
controller-independent verification.
An example test rig configuration and procedure:
  i.MX6S RIoRBoard           Logic Analyzer
  -----------------------------------------
  (J13  4) GND ------------- GND
  (J13  6) CSPI3-CLK ------> PIN 3
  (J13  8) CSPI3-MOSI <----- PIN 2
     ^ - internal loop configured by SPI_LOOP
     |   or can be user external jamper.
  (J13 10) CSPI3-MISO -----> PIN 1

grab some data and decode it:
sigrok-cli -d fx2lafw --time 160000 --config samplerate=10m  \
  --channels 0-2 -o dump.sr
sigrok-cli -i dump.sr -P spi:mosi=1:clk=2 > result_for_regression_tests
Signed-off-by: NOleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: NMark Brown <broonie@kernel.org>