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由 Nicolas Pitre 提交于
With a TCLK = 200MHz, the half period of the hardware timer is roughly 10 seconds. Because cnt32_to_63() must be called at least once per half period of the base hardware counter, it is a bit risky to rely solely on scheduling to generate frequent enough calls. Let's use a kernel timer to ensure this. Signed-off-by: NNicolas Pitre <nico@marvell.com>a399e3fa