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由 Thierry Reding 提交于
The MSI target address can reside beyond the 32-bit boundary on devices with more than 2 GiB of system memory. The PCI host bridge on Tegra can easily support 64-bit addresses, so make sure to pass the upper 32 bits of the target address to endpoints when allocating MSI entries. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NStephen Warren <swarren@nvidia.com>
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