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由 Hai Li 提交于
This change takes advantage of a HW feature that synchronize flush operation on CTL1 to CTL0, to keep dual DSI pipes in sync. Signed-off-by: NHai Li <hali@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
b96b3a06
This change takes advantage of a HW feature that synchronize flush operation on CTL1 to CTL0, to keep dual DSI pipes in sync. Signed-off-by: NHai Li <hali@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>