This patch is the Flexgen implementation reusing as much as possible
of Common Clock Framework functions.

The idea is to have an instance of "struct flexgen" per output clock.
It represents the clock cross bar (by a mux element), and the pre and final dividers
(using dividers and gates elements).
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NOlivier Bideau <olivier.bideau@st.com>
Signed-off-by: NGabriel Fernandez <gabriel.fernandez@linaro.org>
Acked-by: NPeter Griffin <peter.griffin@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>