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由 Xiangliang Yu 提交于
Add VCE ring test slow workaround for SRIOV. Signed-off-by: NFrank Min <Frank.Min@amd.com> Signed-off-by: NXiangliang Yu <Xiangliang.Yu@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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