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由 Philip Avinash 提交于
EHRPWM module requires explicit clock gating of TBCLK from control module. Hence add TBCLK clock node in clock tree for EHRPWM modules. Signed-off-by: NPhilip Avinash <avinashphilip@ti.com> [bigeasy: remove CK_AM33XX] Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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