“4d70c59bb5be9e41a06b9f11ecfba75c14f9fea7”上不存在“drivers/clocksource/qcom-timer.c”
-
由 Florian Fainelli 提交于
Add support for loading bitstreams on the Altera Cyclone II FPGA populated on the TS-7300 board. This is done through the configuration and data registers offered through a memory interface between the EP93xx SoC and the FPGA via an intermediate CPLD device. The EP93xx SoC on the TS-7300 does not have direct means of configuring the on-board FPGA other than by using the special memory mapped interface to the CPLD. No other entity on the system can control the FPGA bitstream. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Acked-by: NAlan Tull <atull@opensource.altera.com> Acked-by: NMoritz Fischer <moritz.fischer@ettus.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
4348f7e2