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由 Peter Chen 提交于
Add USB clock information, the pll_usb_main_clk is USB_PLL at CCM which is the output of USBOTG2 PHY. Signed-off-by: NPeter Chen <peter.chen@freescale.com> Signed-off-by: NIrina Tirdea <irina.tirdea@nxp.com> Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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