Patch from Todd Poynor

Add definition of K0DB4 SDCLK<0,3> divide-by-4 control/status bit in the
MDREFR register for Intel XScale PXA27x.
Signed-off-by: NTodd Poynor <tpoynor@mvista.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>