Interrupts for GPIOs 16 through 31 are enabled by bit 1 in the
"binten" register (offset 8). Previous versions of GPIO only
used bit 0, which enables GPIO 0-15 interrupts.
Signed-off-by: NVitaly Andrianov <vitalya@ti.com>
Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: NSekhar Nori <nsekhar@ti.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>