ATCPIT100 is often used on the Andes architecture,
This timer provide 4 PIT channels. Each PIT channel is a
multi-function timer, can be configured as 32,16,8 bit timers
or PWM as well.

For system timer it will set channel 1 32-bit timer0 as clock
source and count downwards until underflow and restart again.

It also set channel 0 32-bit timer0 as clock event and count
downwards until condition match. It will generate an interrupt
for handling periodically.
Signed-off-by: NRick Chen <rickchen36@gmail.com>
Signed-off-by: NGreentime Hu <green.hu@gmail.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>

Add andestech atcpit100 timer