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由 Philip Elcan 提交于
Several of the bits of the TLBI register operand are RES0 per the ARM ARM, so TLBI operations should avoid writing non-zero values to these bits. This patch adds a macro __TLBI_VADDR(addr, asid) that creates the operand register in the correct format and honors the RES0 bits. Acked-by: NMark Rutland <mark.rutland@arm.com> Signed-off-by: NPhilip Elcan <pelcan@codeaurora.org> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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