To ensure writes to clock registers have properly propagated through the
clock control logic and state machines, we need to ensure the writes have
been posted in the registers and wait for 1us after that.
Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: NJon Hunter <jonathanh@nvidia.com>
Tested-by: NJon Hunter <jonathanh@nvidia.com>
Tested-by: NHector Martin <marcan@marcan.st>
Tested-by: NAndre Heider <a.heider@gmail.com>
Tested-by: NMikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>