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    drm/i915: Add self-refresh support on Sandybridge · 1398261a
    Yuanhan Liu 提交于
    Add the support of memory self-refresh on Sandybridge, which is now
    support 3 levels of watermarks and the source of the latency values
    for watermarks has changed.
    
    On Sandybridge, the LP0 WM value is not hardcoded any more. All the
    latency value is now should be extracted from MCHBAR SSKPD register.
    And the MCHBAR base address is changed, too.
    
    For the WM values, if any calculated watermark values is larger than
    the maximum value that can be programmed into the associated watermark
    register, that watermark must be disabled.
    Signed-off-by: NYuanhan Liu <yuanhan.liu@linux.intel.com>
    [ickle: remove duplicate compute routines and fixup for checkpatch]
    Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
    1398261a
intel_display.c 193.0 KB