p54pci.c 16.2 KB
Newer Older
1 2 3 4 5

/*
 * Linux device driver for PCI based Prism54
 *
 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
6
 * Copyright (c) 2008, Christian Lamparter <chunkeey@web.de>
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
 *
 * Based on the islsm (softmac prism54) driver, which is:
 * Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/init.h>
#include <linux/pci.h>
#include <linux/firmware.h>
#include <linux/etherdevice.h>
#include <linux/delay.h>
#include <linux/completion.h>
#include <net/mac80211.h>

#include "p54.h"
#include "p54pci.h"

MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
MODULE_DESCRIPTION("Prism54 PCI wireless driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("prism54pci");
31
MODULE_FIRMWARE("isl3886pci");
32 33 34 35 36 37 38 39 40 41

static struct pci_device_id p54p_table[] __devinitdata = {
	/* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
	{ PCI_DEVICE(0x1260, 0x3890) },
	/* 3COM 3CRWE154G72 Wireless LAN adapter */
	{ PCI_DEVICE(0x10b7, 0x6001) },
	/* Intersil PRISM Indigo Wireless LAN adapter */
	{ PCI_DEVICE(0x1260, 0x3877) },
	/* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
	{ PCI_DEVICE(0x1260, 0x3886) },
A
Andrew Morton 已提交
42
	{ },
43 44 45 46 47 48 49 50 51 52
};

MODULE_DEVICE_TABLE(pci, p54p_table);

static int p54p_upload_firmware(struct ieee80211_hw *dev)
{
	struct p54p_priv *priv = dev->priv;
	const struct firmware *fw_entry = NULL;
	__le32 reg;
	int err;
53
	__le32 *data;
54 55
	u32 remains, left, device_addr;

56
	P54P_WRITE(int_enable, cpu_to_le32(0));
57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75
	P54P_READ(int_enable);
	udelay(10);

	reg = P54P_READ(ctrl_stat);
	reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
	reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT);
	P54P_WRITE(ctrl_stat, reg);
	P54P_READ(ctrl_stat);
	udelay(10);

	reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
	P54P_WRITE(ctrl_stat, reg);
	wmb();
	udelay(10);

	reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
	P54P_WRITE(ctrl_stat, reg);
	wmb();

76
	err = request_firmware(&fw_entry, "isl3886pci", &priv->pdev->dev);
77
	if (err) {
78
		printk(KERN_ERR "%s (p54pci): cannot find firmware "
79 80 81 82
		       "(isl3886pci)\n", pci_name(priv->pdev));
		err = request_firmware(&fw_entry, "isl3886", &priv->pdev->dev);
		if (err)
			return err;
83 84
	}

85 86 87 88 89
	err = p54_parse_firmware(dev, fw_entry);
	if (err) {
		release_firmware(fw_entry);
		return err;
	}
90

91
	data = (__le32 *) fw_entry->data;
92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129
	remains = fw_entry->size;
	device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
	while (remains) {
		u32 i = 0;
		left = min((u32)0x1000, remains);
		P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr));
		P54P_READ(int_enable);

		device_addr += 0x1000;
		while (i < left) {
			P54P_WRITE(direct_mem_win[i], *data++);
			i += sizeof(u32);
		}

		remains -= left;
		P54P_READ(int_enable);
	}

	release_firmware(fw_entry);

	reg = P54P_READ(ctrl_stat);
	reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN);
	reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
	reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT);
	P54P_WRITE(ctrl_stat, reg);
	P54P_READ(ctrl_stat);
	udelay(10);

	reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
	P54P_WRITE(ctrl_stat, reg);
	wmb();
	udelay(10);

	reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
	P54P_WRITE(ctrl_stat, reg);
	wmb();
	udelay(10);

130
	/* wait for the firmware to boot properly */
131 132
	mdelay(100);

133
	return 0;
134 135
}

136 137 138
static void p54p_refill_rx_ring(struct ieee80211_hw *dev,
	int ring_index, struct p54p_desc *ring, u32 ring_limit,
	struct sk_buff **rx_buf)
139 140
{
	struct p54p_priv *priv = dev->priv;
141
	struct p54p_ring_control *ring_control = priv->ring_control;
142
	u32 limit, idx, i;
143

144 145 146 147
	idx = le32_to_cpu(ring_control->host_idx[ring_index]);
	limit = idx;
	limit -= le32_to_cpu(ring_control->device_idx[ring_index]);
	limit = ring_limit - limit;
148

149
	i = idx % ring_limit;
150
	while (limit-- > 1) {
151
		struct p54p_desc *desc = &ring[i];
152 153 154 155

		if (!desc->host_addr) {
			struct sk_buff *skb;
			dma_addr_t mapping;
156
			skb = dev_alloc_skb(priv->common.rx_mtu + 32);
157 158 159 160 161
			if (!skb)
				break;

			mapping = pci_map_single(priv->pdev,
						 skb_tail_pointer(skb),
162
						 priv->common.rx_mtu + 32,
163 164 165
						 PCI_DMA_FROMDEVICE);
			desc->host_addr = cpu_to_le32(mapping);
			desc->device_addr = 0;	// FIXME: necessary?
166
			desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
167
			desc->flags = 0;
168
			rx_buf[i] = skb;
169 170
		}

171
		i++;
172
		idx++;
173
		i %= ring_limit;
174 175 176
	}

	wmb();
177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198
	ring_control->host_idx[ring_index] = cpu_to_le32(idx);
}

static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
	int ring_index, struct p54p_desc *ring, u32 ring_limit,
	struct sk_buff **rx_buf)
{
	struct p54p_priv *priv = dev->priv;
	struct p54p_ring_control *ring_control = priv->ring_control;
	struct p54p_desc *desc;
	u32 idx, i;

	i = (*index) % ring_limit;
	(*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
	idx %= ring_limit;
	while (i != idx) {
		u16 len;
		struct sk_buff *skb;
		desc = &ring[i];
		len = le16_to_cpu(desc->len);
		skb = rx_buf[i];

199 200 201
		if (!skb) {
			i++;
			i %= ring_limit;
202
			continue;
203
		}
204 205 206 207 208
		skb_put(skb, len);

		if (p54_rx(dev, skb)) {
			pci_unmap_single(priv->pdev,
					 le32_to_cpu(desc->host_addr),
209 210
					 priv->common.rx_mtu + 32,
					 PCI_DMA_FROMDEVICE);
211 212 213 214
			rx_buf[i] = NULL;
			desc->host_addr = 0;
		} else {
			skb_trim(skb, 0);
215
			desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240
		}

		i++;
		i %= ring_limit;
	}

	p54p_refill_rx_ring(dev, ring_index, ring, ring_limit, rx_buf);
}

/* caller must hold priv->lock */
static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index,
	int ring_index, struct p54p_desc *ring, u32 ring_limit,
	void **tx_buf)
{
	struct p54p_priv *priv = dev->priv;
	struct p54p_ring_control *ring_control = priv->ring_control;
	struct p54p_desc *desc;
	u32 idx, i;

	i = (*index) % ring_limit;
	(*index) = idx = le32_to_cpu(ring_control->device_idx[1]);
	idx %= ring_limit;

	while (i != idx) {
		desc = &ring[i];
C
Christian Lamparter 已提交
241
		p54_free_skb(dev, tx_buf[i]);
242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270
		tx_buf[i] = NULL;

		pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
				 le16_to_cpu(desc->len), PCI_DMA_TODEVICE);

		desc->host_addr = 0;
		desc->device_addr = 0;
		desc->len = 0;
		desc->flags = 0;

		i++;
		i %= ring_limit;
	}
}

static void p54p_rx_tasklet(unsigned long dev_id)
{
	struct ieee80211_hw *dev = (struct ieee80211_hw *)dev_id;
	struct p54p_priv *priv = dev->priv;
	struct p54p_ring_control *ring_control = priv->ring_control;

	p54p_check_rx_ring(dev, &priv->rx_idx_mgmt, 2, ring_control->rx_mgmt,
		ARRAY_SIZE(ring_control->rx_mgmt), priv->rx_buf_mgmt);

	p54p_check_rx_ring(dev, &priv->rx_idx_data, 0, ring_control->rx_data,
		ARRAY_SIZE(ring_control->rx_data), priv->rx_buf_data);

	wmb();
	P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
271 272 273 274 275 276
}

static irqreturn_t p54p_interrupt(int irq, void *dev_id)
{
	struct ieee80211_hw *dev = dev_id;
	struct p54p_priv *priv = dev->priv;
277
	struct p54p_ring_control *ring_control = priv->ring_control;
278 279 280 281
	__le32 reg;

	spin_lock(&priv->lock);
	reg = P54P_READ(int_ident);
282
	if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) {
283 284 285 286 287 288 289 290 291
		spin_unlock(&priv->lock);
		return IRQ_HANDLED;
	}

	P54P_WRITE(int_ack, reg);

	reg &= P54P_READ(int_enable);

	if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)) {
292 293 294 295
		p54p_check_tx_ring(dev, &priv->tx_idx_mgmt,
				   3, ring_control->tx_mgmt,
				   ARRAY_SIZE(ring_control->tx_mgmt),
				   priv->tx_buf_mgmt);
296

297 298 299 300
		p54p_check_tx_ring(dev, &priv->tx_idx_data,
				   1, ring_control->tx_data,
				   ARRAY_SIZE(ring_control->tx_data),
				   priv->tx_buf_data);
301

302
		tasklet_schedule(&priv->rx_tasklet);
303 304 305 306 307 308 309 310 311

	} else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
		complete(&priv->boot_comp);

	spin_unlock(&priv->lock);

	return reg ? IRQ_HANDLED : IRQ_NONE;
}

C
Christian Lamparter 已提交
312 313
static void p54p_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
		    int free_on_tx)
314 315
{
	struct p54p_priv *priv = dev->priv;
316
	struct p54p_ring_control *ring_control = priv->ring_control;
317 318 319 320 321 322 323
	unsigned long flags;
	struct p54p_desc *desc;
	dma_addr_t mapping;
	u32 device_idx, idx, i;

	spin_lock_irqsave(&priv->lock, flags);

324 325 326
	device_idx = le32_to_cpu(ring_control->device_idx[1]);
	idx = le32_to_cpu(ring_control->host_idx[1]);
	i = idx % ARRAY_SIZE(ring_control->tx_data);
327

C
Christian Lamparter 已提交
328 329
	mapping = pci_map_single(priv->pdev, skb->data, skb->len,
				 PCI_DMA_TODEVICE);
330
	desc = &ring_control->tx_data[i];
331
	desc->host_addr = cpu_to_le32(mapping);
332
	desc->device_addr = ((struct p54_hdr *)skb->data)->req_id;
C
Christian Lamparter 已提交
333
	desc->len = cpu_to_le16(skb->len);
334 335 336
	desc->flags = 0;

	wmb();
337
	ring_control->host_idx[1] = cpu_to_le32(idx + 1);
338 339

	if (free_on_tx)
C
Christian Lamparter 已提交
340
		priv->tx_buf_data[i] = skb;
341 342 343 344 345 346 347 348

	spin_unlock_irqrestore(&priv->lock, flags);

	P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
	P54P_READ(dev_int);

	/* FIXME: unlikely to happen because the device usually runs out of
	   memory before we fill the ring up, but we can make it impossible */
C
Christian Lamparter 已提交
349 350
	if (idx - device_idx > ARRAY_SIZE(ring_control->tx_data) - 2) {
		p54_free_skb(dev, skb);
351
		printk(KERN_INFO "%s: tx overflow.\n", wiphy_name(dev->wiphy));
C
Christian Lamparter 已提交
352
	}
353 354 355 356 357
}

static void p54p_stop(struct ieee80211_hw *dev)
{
	struct p54p_priv *priv = dev->priv;
358
	struct p54p_ring_control *ring_control = priv->ring_control;
359 360 361
	unsigned int i;
	struct p54p_desc *desc;

362 363
	tasklet_kill(&priv->rx_tasklet);

364
	P54P_WRITE(int_enable, cpu_to_le32(0));
365 366 367 368 369 370 371
	P54P_READ(int_enable);
	udelay(10);

	free_irq(priv->pdev->irq, dev);

	P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));

372
	for (i = 0; i < ARRAY_SIZE(priv->rx_buf_data); i++) {
373
		desc = &ring_control->rx_data[i];
374
		if (desc->host_addr)
375 376
			pci_unmap_single(priv->pdev,
					 le32_to_cpu(desc->host_addr),
377 378
					 priv->common.rx_mtu + 32,
					 PCI_DMA_FROMDEVICE);
379 380
		kfree_skb(priv->rx_buf_data[i]);
		priv->rx_buf_data[i] = NULL;
381 382
	}

383 384 385 386 387
	for (i = 0; i < ARRAY_SIZE(priv->rx_buf_mgmt); i++) {
		desc = &ring_control->rx_mgmt[i];
		if (desc->host_addr)
			pci_unmap_single(priv->pdev,
					 le32_to_cpu(desc->host_addr),
388 389
					 priv->common.rx_mtu + 32,
					 PCI_DMA_FROMDEVICE);
390 391 392 393 394
		kfree_skb(priv->rx_buf_mgmt[i]);
		priv->rx_buf_mgmt[i] = NULL;
	}

	for (i = 0; i < ARRAY_SIZE(priv->tx_buf_data); i++) {
395
		desc = &ring_control->tx_data[i];
396
		if (desc->host_addr)
397 398 399 400 401
			pci_unmap_single(priv->pdev,
					 le32_to_cpu(desc->host_addr),
					 le16_to_cpu(desc->len),
					 PCI_DMA_TODEVICE);

C
Christian Lamparter 已提交
402
		p54_free_skb(dev, priv->tx_buf_data[i]);
403 404 405 406 407 408 409 410 411 412
		priv->tx_buf_data[i] = NULL;
	}

	for (i = 0; i < ARRAY_SIZE(priv->tx_buf_mgmt); i++) {
		desc = &ring_control->tx_mgmt[i];
		if (desc->host_addr)
			pci_unmap_single(priv->pdev,
					 le32_to_cpu(desc->host_addr),
					 le16_to_cpu(desc->len),
					 PCI_DMA_TODEVICE);
413

C
Christian Lamparter 已提交
414
		p54_free_skb(dev, priv->tx_buf_mgmt[i]);
415
		priv->tx_buf_mgmt[i] = NULL;
416 417
	}

418
	memset(ring_control, 0, sizeof(*ring_control));
419 420
}

421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482
static int p54p_open(struct ieee80211_hw *dev)
{
	struct p54p_priv *priv = dev->priv;
	int err;

	init_completion(&priv->boot_comp);
	err = request_irq(priv->pdev->irq, &p54p_interrupt,
			  IRQF_SHARED, "p54pci", dev);
	if (err) {
		printk(KERN_ERR "%s: failed to register IRQ handler\n",
		       wiphy_name(dev->wiphy));
		return err;
	}

	memset(priv->ring_control, 0, sizeof(*priv->ring_control));
	err = p54p_upload_firmware(dev);
	if (err) {
		free_irq(priv->pdev->irq, dev);
		return err;
	}
	priv->rx_idx_data = priv->tx_idx_data = 0;
	priv->rx_idx_mgmt = priv->tx_idx_mgmt = 0;

	p54p_refill_rx_ring(dev, 0, priv->ring_control->rx_data,
		ARRAY_SIZE(priv->ring_control->rx_data), priv->rx_buf_data);

	p54p_refill_rx_ring(dev, 2, priv->ring_control->rx_mgmt,
		ARRAY_SIZE(priv->ring_control->rx_mgmt), priv->rx_buf_mgmt);

	P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
	P54P_READ(ring_control_base);
	wmb();
	udelay(10);

	P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
	P54P_READ(int_enable);
	wmb();
	udelay(10);

	P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
	P54P_READ(dev_int);

	if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
		printk(KERN_ERR "%s: Cannot boot firmware!\n",
		       wiphy_name(dev->wiphy));
		p54p_stop(dev);
		return -ETIMEDOUT;
	}

	P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
	P54P_READ(int_enable);
	wmb();
	udelay(10);

	P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
	P54P_READ(dev_int);
	wmb();
	udelay(10);

	return 0;
}

483 484 485 486 487 488 489 490 491 492
static int __devinit p54p_probe(struct pci_dev *pdev,
				const struct pci_device_id *id)
{
	struct p54p_priv *priv;
	struct ieee80211_hw *dev;
	unsigned long mem_addr, mem_len;
	int err;

	err = pci_enable_device(pdev);
	if (err) {
493
		printk(KERN_ERR "%s (p54pci): Cannot enable new PCI device\n",
494 495 496 497 498 499 500
		       pci_name(pdev));
		return err;
	}

	mem_addr = pci_resource_start(pdev, 0);
	mem_len = pci_resource_len(pdev, 0);
	if (mem_len < sizeof(struct p54p_csr)) {
501
		printk(KERN_ERR "%s (p54pci): Too short PCI resources\n",
502 503 504 505 506
		       pci_name(pdev));
		pci_disable_device(pdev);
		return err;
	}

507
	err = pci_request_regions(pdev, "p54pci");
508
	if (err) {
509
		printk(KERN_ERR "%s (p54pci): Cannot obtain PCI resources\n",
510 511 512 513 514 515
		       pci_name(pdev));
		return err;
	}

	if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) ||
	    pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
516
		printk(KERN_ERR "%s (p54pci): No suitable DMA available\n",
517 518 519 520 521 522 523 524 525 526 527 528
		       pci_name(pdev));
		goto err_free_reg;
	}

	pci_set_master(pdev);
	pci_try_set_mwi(pdev);

	pci_write_config_byte(pdev, 0x40, 0);
	pci_write_config_byte(pdev, 0x41, 0);

	dev = p54_init_common(sizeof(*priv));
	if (!dev) {
529
		printk(KERN_ERR "%s (p54pci): ieee80211 alloc failed\n",
530 531 532 533 534 535 536 537 538 539 540 541 542
		       pci_name(pdev));
		err = -ENOMEM;
		goto err_free_reg;
	}

	priv = dev->priv;
	priv->pdev = pdev;

	SET_IEEE80211_DEV(dev, &pdev->dev);
	pci_set_drvdata(pdev, dev);

	priv->map = ioremap(mem_addr, mem_len);
	if (!priv->map) {
543
		printk(KERN_ERR "%s (p54pci): Cannot map device memory\n",
544 545 546 547 548 549 550 551
		       pci_name(pdev));
		err = -EINVAL;	// TODO: use a better error code?
		goto err_free_dev;
	}

	priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control),
						  &priv->ring_control_dma);
	if (!priv->ring_control) {
552
		printk(KERN_ERR "%s (p54pci): Cannot allocate rings\n",
553 554 555 556 557 558 559 560 561
		       pci_name(pdev));
		err = -ENOMEM;
		goto err_iounmap;
	}
	priv->common.open = p54p_open;
	priv->common.stop = p54p_stop;
	priv->common.tx = p54p_tx;

	spin_lock_init(&priv->lock);
562
	tasklet_init(&priv->rx_tasklet, p54p_rx_tasklet, (unsigned long)dev);
563

564 565 566
	err = p54p_open(dev);
	if (err)
		goto err_free_common;
567 568 569
	err = p54_read_eeprom(dev);
	p54p_stop(dev);
	if (err)
570
		goto err_free_common;
571

572 573
	err = ieee80211_register_hw(dev);
	if (err) {
574
		printk(KERN_ERR "%s (p54pci): Cannot register netdevice\n",
575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623
		       pci_name(pdev));
		goto err_free_common;
	}

	return 0;

 err_free_common:
	p54_free_common(dev);
	pci_free_consistent(pdev, sizeof(*priv->ring_control),
			    priv->ring_control, priv->ring_control_dma);

 err_iounmap:
	iounmap(priv->map);

 err_free_dev:
	pci_set_drvdata(pdev, NULL);
	ieee80211_free_hw(dev);

 err_free_reg:
	pci_release_regions(pdev);
	pci_disable_device(pdev);
	return err;
}

static void __devexit p54p_remove(struct pci_dev *pdev)
{
	struct ieee80211_hw *dev = pci_get_drvdata(pdev);
	struct p54p_priv *priv;

	if (!dev)
		return;

	ieee80211_unregister_hw(dev);
	priv = dev->priv;
	pci_free_consistent(pdev, sizeof(*priv->ring_control),
			    priv->ring_control, priv->ring_control_dma);
	p54_free_common(dev);
	iounmap(priv->map);
	pci_release_regions(pdev);
	pci_disable_device(pdev);
	ieee80211_free_hw(dev);
}

#ifdef CONFIG_PM
static int p54p_suspend(struct pci_dev *pdev, pm_message_t state)
{
	struct ieee80211_hw *dev = pci_get_drvdata(pdev);
	struct p54p_priv *priv = dev->priv;

624
	if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641
		ieee80211_stop_queues(dev);
		p54p_stop(dev);
	}

	pci_save_state(pdev);
	pci_set_power_state(pdev, pci_choose_state(pdev, state));
	return 0;
}

static int p54p_resume(struct pci_dev *pdev)
{
	struct ieee80211_hw *dev = pci_get_drvdata(pdev);
	struct p54p_priv *priv = dev->priv;

	pci_set_power_state(pdev, PCI_D0);
	pci_restore_state(pdev);

642
	if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
643
		p54p_open(dev);
644
		ieee80211_wake_queues(dev);
645 646 647 648 649 650 651
	}

	return 0;
}
#endif /* CONFIG_PM */

static struct pci_driver p54p_driver = {
652
	.name		= "p54pci",
653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673
	.id_table	= p54p_table,
	.probe		= p54p_probe,
	.remove		= __devexit_p(p54p_remove),
#ifdef CONFIG_PM
	.suspend	= p54p_suspend,
	.resume		= p54p_resume,
#endif /* CONFIG_PM */
};

static int __init p54p_init(void)
{
	return pci_register_driver(&p54p_driver);
}

static void __exit p54p_exit(void)
{
	pci_unregister_driver(&p54p_driver);
}

module_init(p54p_init);
module_exit(p54p_exit);