qla_os.c 152.8 KB
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/*
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Andrew Vasquez 已提交
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 * QLogic Fibre Channel HBA Driver
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 * Copyright (c)  2003-2013 QLogic Corporation
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 *
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 * See LICENSE.qla2xxx for copyright and licensing details.
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 */
#include "qla_def.h"

#include <linux/moduleparam.h>
#include <linux/vmalloc.h>
#include <linux/delay.h>
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#include <linux/kthread.h>
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#include <linux/mutex.h>
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#include <linux/kobject.h>
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#include <linux/slab.h>
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#include <scsi/scsi_tcq.h>
#include <scsi/scsicam.h>
#include <scsi/scsi_transport.h>
#include <scsi/scsi_transport_fc.h>

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#include "qla_target.h"

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/*
 * Driver version
 */
char qla2x00_version_str[40];

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static int apidev_major;

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/*
 * SRB allocation cache
 */
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static struct kmem_cache *srb_cachep;
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/*
 * CT6 CTX allocation cache
 */
static struct kmem_cache *ctx_cachep;
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/*
 * error level for logging
 */
int ql_errlev = ql_log_all;
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static int ql2xenableclass2;
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module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
MODULE_PARM_DESC(ql2xenableclass2,
		"Specify if Class 2 operations are supported from the very "
		"beginning. Default is 0 - class 2 not supported.");

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int ql2xlogintimeout = 20;
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module_param(ql2xlogintimeout, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xlogintimeout,
		"Login timeout value in seconds.");

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int qlport_down_retry;
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module_param(qlport_down_retry, int, S_IRUGO);
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MODULE_PARM_DESC(qlport_down_retry,
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		"Maximum number of command retries to a port that returns "
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		"a PORT-DOWN status.");

int ql2xplogiabsentdevice;
module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(ql2xplogiabsentdevice,
		"Option to enable PLOGI to devices that are not present after "
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		"a Fabric scan.  This is needed for several broken switches. "
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		"Default is 0 - no PLOGI. 1 - perfom PLOGI.");

int ql2xloginretrycount = 0;
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module_param(ql2xloginretrycount, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xloginretrycount,
		"Specify an alternate value for the NVRAM login retry count.");

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int ql2xallocfwdump = 1;
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module_param(ql2xallocfwdump, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xallocfwdump,
		"Option to enable allocation of memory for a firmware dump "
		"during HBA initialization.  Memory allocation requirements "
		"vary by ISP type.  Default is 1 - allocate memory.");

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int ql2xextended_error_logging;
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module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
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MODULE_PARM_DESC(ql2xextended_error_logging,
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		"Option to enable extended error logging,\n"
		"\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
		"\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
		"\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
		"\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
		"\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
		"\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
		"\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
		"\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
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		"\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
		"\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
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		"\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
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		"\t\t0x1e400000 - Preferred value for capturing essential "
		"debug information (equivalent to old "
		"ql2xextended_error_logging=1).\n"
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		"\t\tDo LOGICAL OR of the value to enable more than one level");
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int ql2xshiftctondsd = 6;
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module_param(ql2xshiftctondsd, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xshiftctondsd,
		"Set to control shifting of command type processing "
		"based on total number of SG elements.");

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int ql2xfdmienable=1;
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module_param(ql2xfdmienable, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xfdmienable,
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		"Enables FDMI registrations. "
		"0 - no FDMI. Default is 1 - perform FDMI.");
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int ql2xmaxqdepth = MAX_Q_DEPTH;
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module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(ql2xmaxqdepth,
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		"Maximum queue depth to set for each LUN. "
		"Default is 32.");
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int ql2xenabledif = 2;
module_param(ql2xenabledif, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xenabledif,
		" Enable T10-CRC-DIF "
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		" Default is 0 - No DIF Support. 1 - Enable it"
		", 2 - Enable DIF for all types, except Type 0.");
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int ql2xenablehba_err_chk = 2;
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module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(ql2xenablehba_err_chk,
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		" Enable T10-CRC-DIF Error isolation by HBA:\n"
		" Default is 1.\n"
		"  0 -- Error isolation disabled\n"
		"  1 -- Error isolation enabled only for DIX Type 0\n"
		"  2 -- Error isolation enabled for all Types\n");
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int ql2xiidmaenable=1;
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module_param(ql2xiidmaenable, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xiidmaenable,
		"Enables iIDMA settings "
		"Default is 1 - perform iIDMA. 0 - no iIDMA.");

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int ql2xmaxqueues = 1;
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module_param(ql2xmaxqueues, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xmaxqueues,
		"Enables MQ settings "
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		"Default is 1 for single queue. Set it to number "
		"of queues in MQ mode.");
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int ql2xmultique_tag;
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module_param(ql2xmultique_tag, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xmultique_tag,
		"Enables CPU affinity settings for the driver "
		"Default is 0 for no affinity of request and response IO. "
		"Set it to 1 to turn on the cpu affinity.");
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int ql2xfwloadbin;
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module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
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MODULE_PARM_DESC(ql2xfwloadbin,
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		"Option to specify location from which to load ISP firmware:.\n"
		" 2 -- load firmware via the request_firmware() (hotplug).\n"
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		"      interface.\n"
		" 1 -- load firmware from flash.\n"
		" 0 -- use default semantics.\n");

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int ql2xetsenable;
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module_param(ql2xetsenable, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xetsenable,
		"Enables firmware ETS burst."
		"Default is 0 - skip ETS enablement.");

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int ql2xdbwr = 1;
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module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
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MODULE_PARM_DESC(ql2xdbwr,
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		"Option to specify scheme for request queue posting.\n"
		" 0 -- Regular doorbell.\n"
		" 1 -- CAMRAM doorbell (faster).\n");
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int ql2xtargetreset = 1;
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module_param(ql2xtargetreset, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xtargetreset,
		 "Enable target reset."
		 "Default is 1 - use hw defaults.");

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int ql2xgffidenable;
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module_param(ql2xgffidenable, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xgffidenable,
		"Enables GFF_ID checks of port type. "
		"Default is 0 - Do not use GFF_ID information.");
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int ql2xasynctmfenable;
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module_param(ql2xasynctmfenable, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xasynctmfenable,
		"Enables issue of TM IOCBs asynchronously via IOCB mechanism"
		"Default is 0 - Issue TM IOCBs via mailbox mechanism.");
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int ql2xdontresethba;
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module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
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MODULE_PARM_DESC(ql2xdontresethba,
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		"Option to specify reset behaviour.\n"
		" 0 (Default) -- Reset on failure.\n"
		" 1 -- Do not reset on failure.\n");
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uint ql2xmaxlun = MAX_LUNS;
module_param(ql2xmaxlun, uint, S_IRUGO);
MODULE_PARM_DESC(ql2xmaxlun,
		"Defines the maximum LU number to register with the SCSI "
		"midlayer. Default is 65535.");

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int ql2xmdcapmask = 0x1F;
module_param(ql2xmdcapmask, int, S_IRUGO);
MODULE_PARM_DESC(ql2xmdcapmask,
		"Set the Minidump driver capture mask level. "
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		"Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
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int ql2xmdenable = 1;
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module_param(ql2xmdenable, int, S_IRUGO);
MODULE_PARM_DESC(ql2xmdenable,
		"Enable/disable MiniDump. "
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		"0 - MiniDump disabled. "
		"1 (Default) - MiniDump enabled.");
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/*
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 * SCSI host template entry points
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 */
static int qla2xxx_slave_configure(struct scsi_device * device);
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static int qla2xxx_slave_alloc(struct scsi_device *);
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static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
static void qla2xxx_scan_start(struct Scsi_Host *);
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static void qla2xxx_slave_destroy(struct scsi_device *);
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static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
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static int qla2xxx_eh_abort(struct scsi_cmnd *);
static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
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static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
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static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
static int qla2xxx_eh_host_reset(struct scsi_cmnd *);

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static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
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static int qla2x00_change_queue_type(struct scsi_device *, int);
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static void qla2x00_free_device(scsi_qla_host_t *);
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struct scsi_host_template qla2xxx_driver_template = {
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	.module			= THIS_MODULE,
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	.name			= QLA2XXX_DRIVER_NAME,
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	.queuecommand		= qla2xxx_queuecommand,
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	.eh_abort_handler	= qla2xxx_eh_abort,
	.eh_device_reset_handler = qla2xxx_eh_device_reset,
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	.eh_target_reset_handler = qla2xxx_eh_target_reset,
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	.eh_bus_reset_handler	= qla2xxx_eh_bus_reset,
	.eh_host_reset_handler	= qla2xxx_eh_host_reset,

	.slave_configure	= qla2xxx_slave_configure,

	.slave_alloc		= qla2xxx_slave_alloc,
	.slave_destroy		= qla2xxx_slave_destroy,
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	.scan_finished		= qla2xxx_scan_finished,
	.scan_start		= qla2xxx_scan_start,
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	.change_queue_depth	= qla2x00_change_queue_depth,
	.change_queue_type	= qla2x00_change_queue_type,
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	.this_id		= -1,
	.cmd_per_lun		= 3,
	.use_clustering		= ENABLE_CLUSTERING,
	.sg_tablesize		= SG_ALL,

	.max_sectors		= 0xFFFF,
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	.shost_attrs		= qla2x00_host_attrs,
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	.supported_mode		= MODE_INITIATOR,
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};

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static struct scsi_transport_template *qla2xxx_transport_template = NULL;
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struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
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/* TODO Convert to inlines
 *
 * Timer routines
 */

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__inline__ void
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qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
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{
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	init_timer(&vha->timer);
	vha->timer.expires = jiffies + interval * HZ;
	vha->timer.data = (unsigned long)vha;
	vha->timer.function = (void (*)(unsigned long))func;
	add_timer(&vha->timer);
	vha->timer_active = 1;
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}

static inline void
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qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
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{
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	/* Currently used for 82XX only. */
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	if (vha->device_flags & DFLG_DEV_FAILED) {
		ql_dbg(ql_dbg_timer, vha, 0x600d,
		    "Device in a failed state, returning.\n");
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		return;
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	}
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	mod_timer(&vha->timer, jiffies + interval * HZ);
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}

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static __inline__ void
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qla2x00_stop_timer(scsi_qla_host_t *vha)
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{
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	del_timer_sync(&vha->timer);
	vha->timer_active = 0;
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}

static int qla2x00_do_dpc(void *data);

static void qla2x00_rst_aen(scsi_qla_host_t *);

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static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
	struct req_que **, struct rsp_que **);
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static void qla2x00_free_fw_dump(struct qla_hw_data *);
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static void qla2x00_mem_free(struct qla_hw_data *);
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/* -------------------------------------------------------------------------- */
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static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
				struct rsp_que *rsp)
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{
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	scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
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	ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
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				GFP_KERNEL);
	if (!ha->req_q_map) {
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		ql_log(ql_log_fatal, vha, 0x003b,
		    "Unable to allocate memory for request queue ptrs.\n");
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		goto fail_req_map;
	}

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	ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
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				GFP_KERNEL);
	if (!ha->rsp_q_map) {
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		ql_log(ql_log_fatal, vha, 0x003c,
		    "Unable to allocate memory for response queue ptrs.\n");
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		goto fail_rsp_map;
	}
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	/*
	 * Make sure we record at least the request and response queue zero in
	 * case we need to free them if part of the probe fails.
	 */
	ha->rsp_q_map[0] = rsp;
	ha->req_q_map[0] = req;
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	set_bit(0, ha->rsp_qid_map);
	set_bit(0, ha->req_qid_map);
	return 1;

fail_rsp_map:
	kfree(ha->req_q_map);
	ha->req_q_map = NULL;
fail_req_map:
	return -ENOMEM;
}

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static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
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{
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	if (IS_QLAFX00(ha)) {
		if (req && req->ring_fx00)
			dma_free_coherent(&ha->pdev->dev,
			    (req->length_fx00 + 1) * sizeof(request_t),
			    req->ring_fx00, req->dma_fx00);
	} else if (req && req->ring)
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		dma_free_coherent(&ha->pdev->dev,
		(req->length + 1) * sizeof(request_t),
		req->ring, req->dma);

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	if (req)
		kfree(req->outstanding_cmds);

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	kfree(req);
	req = NULL;
}

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static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
{
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	if (IS_QLAFX00(ha)) {
		if (rsp && rsp->ring)
			dma_free_coherent(&ha->pdev->dev,
			    (rsp->length_fx00 + 1) * sizeof(request_t),
			    rsp->ring_fx00, rsp->dma_fx00);
	} else if (rsp && rsp->ring) {
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		dma_free_coherent(&ha->pdev->dev,
		(rsp->length + 1) * sizeof(response_t),
		rsp->ring, rsp->dma);
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	}
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	kfree(rsp);
	rsp = NULL;
}

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static void qla2x00_free_queues(struct qla_hw_data *ha)
{
	struct req_que *req;
	struct rsp_que *rsp;
	int cnt;

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	for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
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		req = ha->req_q_map[cnt];
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		qla2x00_free_req_que(ha, req);
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	}
	kfree(ha->req_q_map);
	ha->req_q_map = NULL;
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	for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
		rsp = ha->rsp_q_map[cnt];
		qla2x00_free_rsp_que(ha, rsp);
	}
	kfree(ha->rsp_q_map);
	ha->rsp_q_map = NULL;
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}

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static int qla25xx_setup_mode(struct scsi_qla_host *vha)
{
	uint16_t options = 0;
	int ques, req, ret;
	struct qla_hw_data *ha = vha->hw;

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	if (!(ha->fw_attributes & BIT_6)) {
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		ql_log(ql_log_warn, vha, 0x00d8,
		    "Firmware is not multi-queue capable.\n");
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		goto fail;
	}
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	if (ql2xmultique_tag) {
		/* create a request queue for IO */
		options |= BIT_7;
		req = qla25xx_create_req_que(ha, options, 0, 0, -1,
			QLA_DEFAULT_QUE_QOS);
		if (!req) {
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			ql_log(ql_log_warn, vha, 0x00e0,
			    "Failed to create request queue.\n");
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			goto fail;
		}
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		ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
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		vha->req = ha->req_q_map[req];
		options |= BIT_1;
		for (ques = 1; ques < ha->max_rsp_queues; ques++) {
			ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
			if (!ret) {
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				ql_log(ql_log_warn, vha, 0x00e8,
				    "Failed to create response queue.\n");
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				goto fail2;
			}
		}
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		ha->flags.cpu_affinity_enabled = 1;
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		ql_dbg(ql_dbg_multiq, vha, 0xc007,
		    "CPU affinity mode enalbed, "
		    "no. of response queues:%d no. of request queues:%d.\n",
		    ha->max_rsp_queues, ha->max_req_queues);
		ql_dbg(ql_dbg_init, vha, 0x00e9,
		    "CPU affinity mode enalbed, "
		    "no. of response queues:%d no. of request queues:%d.\n",
		    ha->max_rsp_queues, ha->max_req_queues);
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	}
	return 0;
fail2:
	qla25xx_delete_queues(vha);
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	destroy_workqueue(ha->wq);
	ha->wq = NULL;
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	vha->req = ha->req_q_map[0];
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fail:
	ha->mqenable = 0;
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	kfree(ha->req_q_map);
	kfree(ha->rsp_q_map);
	ha->max_req_queues = ha->max_rsp_queues = 1;
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	return 1;
}

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static char *
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qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
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{
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	struct qla_hw_data *ha = vha->hw;
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	static char *pci_bus_modes[] = {
		"33", "66", "100", "133",
	};
	uint16_t pci_bus;

	strcpy(str, "PCI");
	pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
	if (pci_bus) {
		strcat(str, "-X (");
		strcat(str, pci_bus_modes[pci_bus]);
	} else {
		pci_bus = (ha->pci_attr & BIT_8) >> 8;
		strcat(str, " (");
		strcat(str, pci_bus_modes[pci_bus]);
	}
	strcat(str, " MHz)");

	return (str);
}

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static char *
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qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
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{
	static char *pci_bus_modes[] = { "33", "66", "100", "133", };
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	struct qla_hw_data *ha = vha->hw;
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	uint32_t pci_bus;
	int pcie_reg;

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	pcie_reg = pci_pcie_cap(ha->pdev);
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	if (pcie_reg) {
		char lwstr[6];
		uint16_t pcie_lstat, lspeed, lwidth;

504
		pcie_reg += PCI_EXP_LNKCAP;
505 506 507 508 509 510
		pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
		lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
		lwidth = (pcie_lstat &
		    (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;

		strcpy(str, "PCIe (");
511 512
		switch (lspeed) {
		case 1:
513
			strcat(str, "2.5GT/s ");
514 515
			break;
		case 2:
516
			strcat(str, "5.0GT/s ");
517 518 519 520 521
			break;
		case 3:
			strcat(str, "8.0GT/s ");
			break;
		default:
522
			strcat(str, "<unknown> ");
523 524
			break;
		}
525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549
		snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
		strcat(str, lwstr);

		return str;
	}

	strcpy(str, "PCI");
	pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
	if (pci_bus == 0 || pci_bus == 8) {
		strcat(str, " (");
		strcat(str, pci_bus_modes[pci_bus >> 3]);
	} else {
		strcat(str, "-X ");
		if (pci_bus & BIT_2)
			strcat(str, "Mode 2");
		else
			strcat(str, "Mode 1");
		strcat(str, " (");
		strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
	}
	strcat(str, " MHz)");

	return str;
}

550
static char *
551
qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
L
Linus Torvalds 已提交
552 553
{
	char un_str[10];
554
	struct qla_hw_data *ha = vha->hw;
A
Andrew Vasquez 已提交
555

L
Linus Torvalds 已提交
556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588
	sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
	    ha->fw_minor_version,
	    ha->fw_subminor_version);

	if (ha->fw_attributes & BIT_9) {
		strcat(str, "FLX");
		return (str);
	}

	switch (ha->fw_attributes & 0xFF) {
	case 0x7:
		strcat(str, "EF");
		break;
	case 0x17:
		strcat(str, "TP");
		break;
	case 0x37:
		strcat(str, "IP");
		break;
	case 0x77:
		strcat(str, "VI");
		break;
	default:
		sprintf(un_str, "(%x)", ha->fw_attributes);
		strcat(str, un_str);
		break;
	}
	if (ha->fw_attributes & 0x100)
		strcat(str, "X");

	return (str);
}

589
static char *
590
qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
591
{
592
	struct qla_hw_data *ha = vha->hw;
593

594 595
	sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
	    ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
596 597 598
	return str;
}

599 600
void
qla2x00_sp_free_dma(void *vha, void *ptr)
601
{
602 603 604 605
	srb_t *sp = (srb_t *)ptr;
	struct scsi_cmnd *cmd = GET_CMD_SP(sp);
	struct qla_hw_data *ha = sp->fcport->vha->hw;
	void *ctx = GET_CMD_CTX_SP(sp);
606

607 608 609
	if (sp->flags & SRB_DMA_VALID) {
		scsi_dma_unmap(cmd);
		sp->flags &= ~SRB_DMA_VALID;
610
	}
611

612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631
	if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
		dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
		    scsi_prot_sg_count(cmd), cmd->sc_data_direction);
		sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
	}

	if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
		/* List assured to be having elements */
		qla2x00_clean_dsd_pool(ha, sp);
		sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
	}

	if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
		dma_pool_free(ha->dl_dma_pool, ctx,
		    ((struct crc_context *)ctx)->crc_ctx_dma);
		sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
	}

	if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
		struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
632

633 634 635 636 637 638 639 640 641 642
		dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
			ctx1->fcp_cmnd_dma);
		list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
		ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
		ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
		mempool_free(ctx1, ha->ctx_mempool);
		ctx1 = NULL;
	}

	CMD_SP(cmd) = NULL;
643
	qla2x00_rel_sp(sp->fcport->vha, sp);
644 645
}

646
static void
647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667
qla2x00_sp_compl(void *data, void *ptr, int res)
{
	struct qla_hw_data *ha = (struct qla_hw_data *)data;
	srb_t *sp = (srb_t *)ptr;
	struct scsi_cmnd *cmd = GET_CMD_SP(sp);

	cmd->result = res;

	if (atomic_read(&sp->ref_count) == 0) {
		ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
		    "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
		    sp, GET_CMD_SP(sp));
		if (ql2xextended_error_logging & ql_dbg_io)
			BUG();
		return;
	}
	if (!atomic_dec_and_test(&sp->ref_count))
		return;

	qla2x00_sp_free_dma(ha, sp);
	cmd->scsi_done(cmd);
668 669
}

670 671 672
/* If we are SP1 here, we need to still take and release the host_lock as SP1
 * does not have the changes necessary to avoid taking host->host_lock.
 */
L
Linus Torvalds 已提交
673
static int
674
qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
675
{
676
	scsi_qla_host_t *vha = shost_priv(host);
677
	fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
678
	struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
679 680
	struct qla_hw_data *ha = vha->hw;
	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
681 682 683
	srb_t *sp;
	int rval;

684
	if (ha->flags.eeh_busy) {
685
		if (ha->flags.pci_channel_io_perm_failure) {
686
			ql_dbg(ql_dbg_aer, vha, 0x9010,
687 688
			    "PCI Channel IO permanent failure, exiting "
			    "cmd=%p.\n", cmd);
689
			cmd->result = DID_NO_CONNECT << 16;
690
		} else {
691
			ql_dbg(ql_dbg_aer, vha, 0x9011,
692
			    "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
693
			cmd->result = DID_REQUEUE << 16;
694
		}
695 696 697
		goto qc24_fail_command;
	}

698 699 700
	rval = fc_remote_port_chkready(rport);
	if (rval) {
		cmd->result = rval;
701
		ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
702 703
		    "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
		    cmd, rval);
704 705 706
		goto qc24_fail_command;
	}

707 708
	if (!vha->flags.difdix_supported &&
		scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
709 710 711
			ql_dbg(ql_dbg_io, vha, 0x3004,
			    "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
			    cmd);
712 713 714
			cmd->result = DID_NO_CONNECT << 16;
			goto qc24_fail_command;
	}
715 716 717 718 719 720

	if (!fcport) {
		cmd->result = DID_NO_CONNECT << 16;
		goto qc24_fail_command;
	}

721 722
	if (atomic_read(&fcport->state) != FCS_ONLINE) {
		if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
723
			atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
724 725 726 727
			ql_dbg(ql_dbg_io, vha, 0x3005,
			    "Returning DNC, fcport_state=%d loop_state=%d.\n",
			    atomic_read(&fcport->state),
			    atomic_read(&base_vha->loop_state));
728 729 730
			cmd->result = DID_NO_CONNECT << 16;
			goto qc24_fail_command;
		}
731
		goto qc24_target_busy;
732 733
	}

734
	sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
735 736
	if (!sp) {
		set_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags);
737
		goto qc24_host_busy;
738
	}
739

740 741 742 743 744 745 746
	sp->u.scmd.cmd = cmd;
	sp->type = SRB_SCSI_CMD;
	atomic_set(&sp->ref_count, 1);
	CMD_SP(cmd) = (void *)sp;
	sp->free = qla2x00_sp_free_dma;
	sp->done = qla2x00_sp_compl;

747
	rval = ha->isp_ops->start_scsi(sp);
748
	if (rval != QLA_SUCCESS) {
749
		ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
750
		    "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
751
		set_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags);
752
		goto qc24_host_busy_free_sp;
753
	}
754 755 756 757

	return 0;

qc24_host_busy_free_sp:
758
	qla2x00_sp_free_dma(ha, sp);
759

760
qc24_host_busy:
761 762
	return SCSI_MLQUEUE_HOST_BUSY;

763 764 765
qc24_target_busy:
	return SCSI_MLQUEUE_TARGET_BUSY;

766
qc24_fail_command:
767
	cmd->scsi_done(cmd);
768 769 770 771

	return 0;
}

L
Linus Torvalds 已提交
772 773 774 775 776 777 778 779 780 781 782 783 784
/*
 * qla2x00_eh_wait_on_command
 *    Waits for the command to be returned by the Firmware for some
 *    max time.
 *
 * Input:
 *    cmd = Scsi Command to wait on.
 *
 * Return:
 *    Not Found : 0
 *    Found : 1
 */
static int
785
qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
L
Linus Torvalds 已提交
786
{
787 788
#define ABORT_POLLING_PERIOD	1000
#define ABORT_WAIT_ITER		((10 * 1000) / (ABORT_POLLING_PERIOD))
已提交
789
	unsigned long wait_iter = ABORT_WAIT_ITER;
790 791
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
	struct qla_hw_data *ha = vha->hw;
已提交
792
	int ret = QLA_SUCCESS;
L
Linus Torvalds 已提交
793

794
	if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
795 796
		ql_dbg(ql_dbg_taskm, vha, 0x8005,
		    "Return:eh_wait.\n");
797 798 799
		return ret;
	}

800
	while (CMD_SP(cmd) && wait_iter--) {
801
		msleep(ABORT_POLLING_PERIOD);
已提交
802 803 804
	}
	if (CMD_SP(cmd))
		ret = QLA_FUNCTION_FAILED;
L
Linus Torvalds 已提交
805

已提交
806
	return ret;
L
Linus Torvalds 已提交
807 808 809 810
}

/*
 * qla2x00_wait_for_hba_online
A
Andrew Vasquez 已提交
811
 *    Wait till the HBA is online after going through
L
Linus Torvalds 已提交
812 813 814 815 816
 *    <= MAX_RETRIES_OF_ISP_ABORT  or
 *    finally HBA is disabled ie marked offline
 *
 * Input:
 *     ha - pointer to host adapter structure
A
Andrew Vasquez 已提交
817 818
 *
 * Note:
L
Linus Torvalds 已提交
819 820 821 822 823 824 825
 *    Does context switching-Release SPIN_LOCK
 *    (if any) before calling this routine.
 *
 * Return:
 *    Success (Adapter is online) : 0
 *    Failed  (Adapter is offline/disabled) : 1
 */
826
int
827
qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
828
{
829 830
	int		return_status;
	unsigned long	wait_online;
831 832
	struct qla_hw_data *ha = vha->hw;
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
L
Linus Torvalds 已提交
833

A
Andrew Vasquez 已提交
834
	wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
835 836 837 838
	while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
	    test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
	    test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
	    ha->dpc_active) && time_before(jiffies, wait_online)) {
L
Linus Torvalds 已提交
839 840 841

		msleep(1000);
	}
842
	if (base_vha->flags.online)
A
Andrew Vasquez 已提交
843
		return_status = QLA_SUCCESS;
L
Linus Torvalds 已提交
844 845 846 847 848 849
	else
		return_status = QLA_FUNCTION_FAILED;

	return (return_status);
}

850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867
/*
 * qla2x00_wait_for_reset_ready
 *    Wait till the HBA is online after going through
 *    <= MAX_RETRIES_OF_ISP_ABORT  or
 *    finally HBA is disabled ie marked offline or flash
 *    operations are in progress.
 *
 * Input:
 *     ha - pointer to host adapter structure
 *
 * Note:
 *    Does context switching-Release SPIN_LOCK
 *    (if any) before calling this routine.
 *
 * Return:
 *    Success (Adapter is online/no flash ops) : 0
 *    Failed  (Adapter is offline/disabled/flash ops in progress) : 1
 */
868
static int
869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888
qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
{
	int		return_status;
	unsigned long	wait_online;
	struct qla_hw_data *ha = vha->hw;
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);

	wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
	while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
	    test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
	    test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
	    ha->optrom_state != QLA_SWAITING ||
	    ha->dpc_active) && time_before(jiffies, wait_online))
		msleep(1000);

	if (base_vha->flags.online &&  ha->optrom_state == QLA_SWAITING)
		return_status = QLA_SUCCESS;
	else
		return_status = QLA_FUNCTION_FAILED;

889 890
	ql_dbg(ql_dbg_taskm, vha, 0x8019,
	    "%s return status=%d.\n", __func__, return_status);
891 892 893 894

	return return_status;
}

895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922
int
qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
{
	int		return_status;
	unsigned long	wait_reset;
	struct qla_hw_data *ha = vha->hw;
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);

	wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
	while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
	    test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
	    test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
	    ha->dpc_active) && time_before(jiffies, wait_reset)) {

		msleep(1000);

		if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
		    ha->flags.chip_reset_done)
			break;
	}
	if (ha->flags.chip_reset_done)
		return_status = QLA_SUCCESS;
	else
		return_status = QLA_FUNCTION_FAILED;

	return return_status;
}

923 924 925 926 927 928
static void
sp_get(struct srb *sp)
{
	atomic_inc(&sp->ref_count);
}

L
Linus Torvalds 已提交
929 930 931 932 933 934 935 936 937 938 939 940 941
/**************************************************************************
* qla2xxx_eh_abort
*
* Description:
*    The abort function will abort the specified command.
*
* Input:
*    cmd = Linux SCSI command packet to be aborted.
*
* Returns:
*    Either SUCCESS or FAILED.
*
* Note:
942
*    Only return FAILED if command not returned by firmware.
L
Linus Torvalds 已提交
943
**************************************************************************/
944
static int
L
Linus Torvalds 已提交
945 946
qla2xxx_eh_abort(struct scsi_cmnd *cmd)
{
947
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
已提交
948
	srb_t *sp;
949
	int ret;
已提交
950
	unsigned int id, lun;
951
	unsigned long flags;
952
	int wait = 0;
953
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
954

已提交
955
	if (!CMD_SP(cmd))
956
		return SUCCESS;
L
Linus Torvalds 已提交
957

958 959 960 961 962
	ret = fc_block_scsi_eh(cmd);
	if (ret != 0)
		return ret;
	ret = SUCCESS;

已提交
963 964
	id = cmd->device->id;
	lun = cmd->device->lun;
L
Linus Torvalds 已提交
965

966
	spin_lock_irqsave(&ha->hardware_lock, flags);
967 968 969 970 971
	sp = (srb_t *) CMD_SP(cmd);
	if (!sp) {
		spin_unlock_irqrestore(&ha->hardware_lock, flags);
		return SUCCESS;
	}
L
Linus Torvalds 已提交
972

973
	ql_dbg(ql_dbg_taskm, vha, 0x8002,
974 975
	    "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n",
	    vha->host_no, id, lun, sp, cmd);
976

977 978
	/* Get a reference to the sp and drop the lock.*/
	sp_get(sp);
979

980
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
981
	if (ha->isp_ops->abort_command(sp)) {
982
		ret = FAILED;
983
		ql_dbg(ql_dbg_taskm, vha, 0x8003,
984
		    "Abort command mbx failed cmd=%p.\n", cmd);
985
	} else {
986
		ql_dbg(ql_dbg_taskm, vha, 0x8004,
987
		    "Abort command mbx success cmd=%p.\n", cmd);
988 989
		wait = 1;
	}
990 991

	spin_lock_irqsave(&ha->hardware_lock, flags);
992
	sp->done(ha, sp, 0);
993
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
L
Linus Torvalds 已提交
994

995 996 997 998
	/* Did the command return during mailbox execution? */
	if (ret == FAILED && !CMD_SP(cmd))
		ret = SUCCESS;

已提交
999
	/* Wait for the command to be returned. */
1000
	if (wait) {
1001
		if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1002
			ql_log(ql_log_warn, vha, 0x8006,
1003
			    "Abort handler timed out cmd=%p.\n", cmd);
1004
			ret = FAILED;
已提交
1005
		}
L
Linus Torvalds 已提交
1006 1007
	}

1008
	ql_log(ql_log_info, vha, 0x801c,
1009 1010
	    "Abort command issued nexus=%ld:%d:%d --  %d %x.\n",
	    vha->host_no, id, lun, wait, ret);
L
Linus Torvalds 已提交
1011

已提交
1012 1013
	return ret;
}
L
Linus Torvalds 已提交
1014

1015
int
1016
qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1017
	unsigned int l, enum nexus_wait_type type)
已提交
1018
{
1019
	int cnt, match, status;
1020
	unsigned long flags;
1021
	struct qla_hw_data *ha = vha->hw;
1022
	struct req_que *req;
1023
	srb_t *sp;
1024
	struct scsi_cmnd *cmd;
L
Linus Torvalds 已提交
1025

1026
	status = QLA_SUCCESS;
1027

1028
	spin_lock_irqsave(&ha->hardware_lock, flags);
1029
	req = vha->req;
1030
	for (cnt = 1; status == QLA_SUCCESS &&
1031
		cnt < req->num_outstanding_cmds; cnt++) {
1032 1033
		sp = req->outstanding_cmds[cnt];
		if (!sp)
1034
			continue;
1035
		if (sp->type != SRB_SCSI_CMD)
1036
			continue;
1037 1038 1039
		if (vha->vp_idx != sp->fcport->vha->vp_idx)
			continue;
		match = 0;
1040
		cmd = GET_CMD_SP(sp);
1041 1042 1043 1044 1045
		switch (type) {
		case WAIT_HOST:
			match = 1;
			break;
		case WAIT_TARGET:
1046
			match = cmd->device->id == t;
1047 1048
			break;
		case WAIT_LUN:
1049 1050
			match = (cmd->device->id == t &&
				cmd->device->lun == l);
1051
			break;
1052
		}
1053 1054 1055 1056
		if (!match)
			continue;

		spin_unlock_irqrestore(&ha->hardware_lock, flags);
1057
		status = qla2x00_eh_wait_on_command(cmd);
1058
		spin_lock_irqsave(&ha->hardware_lock, flags);
L
Linus Torvalds 已提交
1059
	}
1060
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
1061 1062

	return status;
L
Linus Torvalds 已提交
1063 1064
}

1065 1066 1067 1068 1069 1070
static char *reset_errors[] = {
	"HBA not online",
	"HBA not ready",
	"Task management failed",
	"Waiting for command completions",
};
L
Linus Torvalds 已提交
1071

1072
static int
1073
__qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1074
    struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
L
Linus Torvalds 已提交
1075
{
1076
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1077
	fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1078
	int err;
L
Linus Torvalds 已提交
1079

1080
	if (!fcport) {
1081
		return FAILED;
1082
	}
L
Linus Torvalds 已提交
1083

1084 1085 1086 1087
	err = fc_block_scsi_eh(cmd);
	if (err != 0)
		return err;

1088
	ql_log(ql_log_info, vha, 0x8009,
1089
	    "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name, vha->host_no,
1090
	    cmd->device->id, cmd->device->lun, cmd);
L
Linus Torvalds 已提交
1091

1092
	err = 0;
1093 1094 1095
	if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
		ql_log(ql_log_warn, vha, 0x800a,
		    "Wait for hba online failed for cmd=%p.\n", cmd);
1096
		goto eh_reset_failed;
1097
	}
1098
	err = 2;
1099
	if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1100 1101 1102
		!= QLA_SUCCESS) {
		ql_log(ql_log_warn, vha, 0x800c,
		    "do_reset failed for cmd=%p.\n", cmd);
1103
		goto eh_reset_failed;
1104
	}
1105
	err = 3;
1106
	if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1107 1108
	    cmd->device->lun, type) != QLA_SUCCESS) {
		ql_log(ql_log_warn, vha, 0x800d,
1109
		    "wait for pending cmds failed for cmd=%p.\n", cmd);
1110
		goto eh_reset_failed;
1111
	}
1112

1113
	ql_log(ql_log_info, vha, 0x800e,
1114 1115
	    "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name,
	    vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1116 1117 1118

	return SUCCESS;

1119
eh_reset_failed:
1120
	ql_log(ql_log_info, vha, 0x800f,
1121 1122 1123
	    "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name,
	    reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
	    cmd);
1124 1125
	return FAILED;
}
L
Linus Torvalds 已提交
1126

1127 1128 1129
static int
qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
{
1130 1131
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
1132

1133 1134
	return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
	    ha->isp_ops->lun_reset);
L
Linus Torvalds 已提交
1135 1136 1137
}

static int
1138
qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
L
Linus Torvalds 已提交
1139
{
1140 1141
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
1142

1143 1144
	return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
	    ha->isp_ops->target_reset);
L
Linus Torvalds 已提交
1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161
}

/**************************************************************************
* qla2xxx_eh_bus_reset
*
* Description:
*    The bus reset function will reset the bus and abort any executing
*    commands.
*
* Input:
*    cmd = Linux SCSI command packet of the command that cause the
*          bus reset.
*
* Returns:
*    SUCCESS/FAILURE (defined as macro in scsi.h).
*
**************************************************************************/
1162
static int
L
Linus Torvalds 已提交
1163 1164
qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
{
1165
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1166
	fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1167
	int ret = FAILED;
已提交
1168 1169 1170 1171
	unsigned int id, lun;

	id = cmd->device->id;
	lun = cmd->device->lun;
L
Linus Torvalds 已提交
1172

1173
	if (!fcport) {
已提交
1174
		return ret;
1175
	}
L
Linus Torvalds 已提交
1176

1177 1178 1179 1180 1181
	ret = fc_block_scsi_eh(cmd);
	if (ret != 0)
		return ret;
	ret = FAILED;

1182
	ql_log(ql_log_info, vha, 0x8012,
1183
	    "BUS RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
L
Linus Torvalds 已提交
1184

1185
	if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1186 1187
		ql_log(ql_log_fatal, vha, 0x8013,
		    "Wait for hba online failed board disabled.\n");
已提交
1188
		goto eh_bus_reset_done;
L
Linus Torvalds 已提交
1189 1190
	}

1191 1192 1193
	if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
		ret = SUCCESS;

已提交
1194 1195
	if (ret == FAILED)
		goto eh_bus_reset_done;
L
Linus Torvalds 已提交
1196

1197
	/* Flush outstanding commands. */
1198
	if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1199 1200 1201
	    QLA_SUCCESS) {
		ql_log(ql_log_warn, vha, 0x8014,
		    "Wait for pending commands failed.\n");
1202
		ret = FAILED;
1203
	}
L
Linus Torvalds 已提交
1204

已提交
1205
eh_bus_reset_done:
1206
	ql_log(ql_log_warn, vha, 0x802b,
1207
	    "BUS RESET %s nexus=%ld:%d:%d.\n",
1208
	    (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
L
Linus Torvalds 已提交
1209

已提交
1210
	return ret;
L
Linus Torvalds 已提交
1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227
}

/**************************************************************************
* qla2xxx_eh_host_reset
*
* Description:
*    The reset function will reset the Adapter.
*
* Input:
*      cmd = Linux SCSI command packet of the command that cause the
*            adapter reset.
*
* Returns:
*      Either SUCCESS or FAILED.
*
* Note:
**************************************************************************/
1228
static int
L
Linus Torvalds 已提交
1229 1230
qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
{
1231 1232
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
	struct qla_hw_data *ha = vha->hw;
1233
	int ret = FAILED;
已提交
1234
	unsigned int id, lun;
1235
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
L
Linus Torvalds 已提交
1236

已提交
1237 1238 1239
	id = cmd->device->id;
	lun = cmd->device->lun;

1240
	ql_log(ql_log_info, vha, 0x8018,
1241
	    "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
L
Linus Torvalds 已提交
1242

1243
	if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
已提交
1244
		goto eh_host_reset_lock;
L
Linus Torvalds 已提交
1245

1246 1247
	if (vha != base_vha) {
		if (qla2x00_vp_abort_isp(vha))
已提交
1248
			goto eh_host_reset_lock;
1249
	} else {
1250 1251 1252 1253 1254 1255 1256 1257
		if (IS_QLA82XX(vha->hw)) {
			if (!qla82xx_fcoe_ctx_reset(vha)) {
				/* Ctx reset success */
				ret = SUCCESS;
				goto eh_host_reset_lock;
			}
			/* fall thru if ctx reset failed */
		}
1258 1259 1260
		if (ha->wq)
			flush_workqueue(ha->wq);

1261
		set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1262
		if (ha->isp_ops->abort_isp(base_vha)) {
1263 1264 1265 1266
			clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
			/* failed. schedule dpc to try */
			set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);

1267 1268 1269
			if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
				ql_log(ql_log_warn, vha, 0x802a,
				    "wait for hba online failed.\n");
1270
				goto eh_host_reset_lock;
1271
			}
1272 1273
		}
		clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
A
Andrew Vasquez 已提交
1274
	}
L
Linus Torvalds 已提交
1275

1276
	/* Waiting for command to be returned to OS.*/
1277
	if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1278
		QLA_SUCCESS)
已提交
1279
		ret = SUCCESS;
L
Linus Torvalds 已提交
1280

已提交
1281
eh_host_reset_lock:
1282 1283 1284
	ql_log(ql_log_info, vha, 0x8017,
	    "ADAPTER RESET %s nexus=%ld:%d:%d.\n",
	    (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
L
Linus Torvalds 已提交
1285

已提交
1286 1287
	return ret;
}
L
Linus Torvalds 已提交
1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298

/*
* qla2x00_loop_reset
*      Issue loop reset.
*
* Input:
*      ha = adapter block pointer.
*
* Returns:
*      0 = success
*/
1299
int
1300
qla2x00_loop_reset(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
1301
{
1302
	int ret;
1303
	struct fc_port *fcport;
1304
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
1305

1306
	if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1307 1308 1309 1310 1311 1312
		list_for_each_entry(fcport, &vha->vp_fcports, list) {
			if (fcport->port_type != FCT_TARGET)
				continue;

			ret = ha->isp_ops->target_reset(fcport, 0, 0);
			if (ret != QLA_SUCCESS) {
1313 1314 1315
				ql_dbg(ql_dbg_taskm, vha, 0x802c,
				    "Bus Reset failed: Target Reset=%d "
				    "d_id=%x.\n", ret, fcport->d_id.b24);
1316 1317 1318 1319
			}
		}
	}

1320 1321 1322
	if (IS_QLAFX00(ha))
		return QLA_SUCCESS;

1323
	if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1324 1325 1326
		atomic_set(&vha->loop_state, LOOP_DOWN);
		atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
		qla2x00_mark_all_devices_lost(vha, 0);
1327
		ret = qla2x00_full_login_lip(vha);
1328
		if (ret != QLA_SUCCESS) {
1329 1330
			ql_dbg(ql_dbg_taskm, vha, 0x802d,
			    "full_login_lip=%d.\n", ret);
1331
		}
1332 1333
	}

1334
	if (ha->flags.enable_lip_reset) {
1335
		ret = qla2x00_lip_reset(vha);
1336
		if (ret != QLA_SUCCESS)
1337 1338
			ql_dbg(ql_dbg_taskm, vha, 0x802e,
			    "lip_reset failed (%d).\n", ret);
L
Linus Torvalds 已提交
1339 1340 1341
	}

	/* Issue marker command only when we are going to start the I/O */
1342
	vha->marker_needed = 1;
L
Linus Torvalds 已提交
1343

1344
	return QLA_SUCCESS;
L
Linus Torvalds 已提交
1345 1346
}

1347
void
1348
qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1349
{
1350
	int que, cnt;
1351 1352
	unsigned long flags;
	srb_t *sp;
1353
	struct qla_hw_data *ha = vha->hw;
1354
	struct req_que *req;
1355 1356

	spin_lock_irqsave(&ha->hardware_lock, flags);
1357
	for (que = 0; que < ha->max_req_queues; que++) {
1358
		req = ha->req_q_map[que];
1359 1360
		if (!req)
			continue;
1361 1362 1363
		if (!req->outstanding_cmds)
			continue;
		for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1364
			sp = req->outstanding_cmds[cnt];
1365
			if (sp) {
1366
				req->outstanding_cmds[cnt] = NULL;
1367
				sp->done(vha, sp, res);
1368
			}
1369 1370 1371 1372 1373
		}
	}
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
}

已提交
1374 1375
static int
qla2xxx_slave_alloc(struct scsi_device *sdev)
L
Linus Torvalds 已提交
1376
{
1377
	struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
L
Linus Torvalds 已提交
1378

1379
	if (!rport || fc_remote_port_chkready(rport))
已提交
1380
		return -ENXIO;
1381

1382
	sdev->hostdata = *(fc_port_t **)rport->dd_data;
L
Linus Torvalds 已提交
1383

已提交
1384 1385
	return 0;
}
L
Linus Torvalds 已提交
1386

已提交
1387 1388 1389
static int
qla2xxx_slave_configure(struct scsi_device *sdev)
{
1390
	scsi_qla_host_t *vha = shost_priv(sdev->host);
1391
	struct req_que *req = vha->req;
已提交
1392

1393 1394 1395
	if (IS_T10_PI_CAPABLE(vha->hw))
		blk_queue_update_dma_alignment(sdev->request_queue, 0x7);

已提交
1396
	if (sdev->tagged_supported)
1397
		scsi_activate_tcq(sdev, req->max_q_depth);
已提交
1398
	else
1399
		scsi_deactivate_tcq(sdev, req->max_q_depth);
已提交
1400 1401
	return 0;
}
L
Linus Torvalds 已提交
1402

已提交
1403 1404 1405 1406
static void
qla2xxx_slave_destroy(struct scsi_device *sdev)
{
	sdev->hostdata = NULL;
L
Linus Torvalds 已提交
1407 1408
}

1409 1410 1411 1412 1413 1414 1415
static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
{
	fc_port_t *fcport = (struct fc_port *) sdev->hostdata;

	if (!scsi_track_queue_full(sdev, qdepth))
		return;

1416
	ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1417 1418
	    "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n",
	    sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438
}

static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
{
	fc_port_t *fcport = sdev->hostdata;
	struct scsi_qla_host *vha = fcport->vha;
	struct req_que *req = NULL;

	req = vha->req;
	if (!req)
		return;

	if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
		return;

	if (sdev->ordered_tags)
		scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
	else
		scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);

1439
	ql_dbg(ql_dbg_io, vha, 0x302a,
1440 1441
	    "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n",
	    sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1442 1443
}

1444
static int
1445
qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1446
{
1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457
	switch (reason) {
	case SCSI_QDEPTH_DEFAULT:
		scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
		break;
	case SCSI_QDEPTH_QFULL:
		qla2x00_handle_queue_full(sdev, qdepth);
		break;
	case SCSI_QDEPTH_RAMP_UP:
		qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
		break;
	default:
1458
		return -EOPNOTSUPP;
1459
	}
1460

1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478
	return sdev->queue_depth;
}

static int
qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
{
	if (sdev->tagged_supported) {
		scsi_set_tag_type(sdev, tag_type);
		if (tag_type)
			scsi_activate_tcq(sdev, sdev->queue_depth);
		else
			scsi_deactivate_tcq(sdev, sdev->queue_depth);
	} else
		tag_type = 0;

	return tag_type;
}

1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553
static void
qla2x00_host_ramp_down_queuedepth(scsi_qla_host_t *vha)
{
	scsi_qla_host_t *vp;
	struct Scsi_Host *shost;
	struct scsi_device *sdev;
	struct qla_hw_data *ha = vha->hw;
	unsigned long flags;

	ha->host_last_rampdown_time = jiffies;

	if (ha->cfg_lun_q_depth <= vha->host->cmd_per_lun)
		return;

	if ((ha->cfg_lun_q_depth / 2) < vha->host->cmd_per_lun)
		ha->cfg_lun_q_depth = vha->host->cmd_per_lun;
	else
		ha->cfg_lun_q_depth = ha->cfg_lun_q_depth / 2;

	/*
	 * Geometrically ramp down the queue depth for all devices on this
	 * adapter
	 */
	spin_lock_irqsave(&ha->vport_slock, flags);
	list_for_each_entry(vp, &ha->vp_list, list) {
		shost = vp->host;
		shost_for_each_device(sdev, shost) {
			if (sdev->queue_depth > shost->cmd_per_lun) {
				if (sdev->queue_depth < ha->cfg_lun_q_depth)
					continue;
				ql_log(ql_log_warn, vp, 0x3031,
				    "%ld:%d:%d: Ramping down queue depth to %d",
				    vp->host_no, sdev->id, sdev->lun,
				    ha->cfg_lun_q_depth);
				qla2x00_change_queue_depth(sdev,
				    ha->cfg_lun_q_depth, SCSI_QDEPTH_DEFAULT);
			}
		}
	}
	spin_unlock_irqrestore(&ha->vport_slock, flags);

	return;
}

static void
qla2x00_host_ramp_up_queuedepth(scsi_qla_host_t *vha)
{
	scsi_qla_host_t *vp;
	struct Scsi_Host *shost;
	struct scsi_device *sdev;
	struct qla_hw_data *ha = vha->hw;
	unsigned long flags;

	ha->host_last_rampup_time = jiffies;
	ha->cfg_lun_q_depth++;

	/*
	 * Linearly ramp up the queue depth for all devices on this
	 * adapter
	 */
	spin_lock_irqsave(&ha->vport_slock, flags);
	list_for_each_entry(vp, &ha->vp_list, list) {
		shost = vp->host;
		shost_for_each_device(sdev, shost) {
			if (sdev->queue_depth > ha->cfg_lun_q_depth)
				continue;
			qla2x00_change_queue_depth(sdev, ha->cfg_lun_q_depth,
			    SCSI_QDEPTH_RAMP_UP);
		}
	}
	spin_unlock_irqrestore(&ha->vport_slock, flags);

	return;
}

L
Linus Torvalds 已提交
1554 1555 1556 1557 1558 1559 1560 1561
/**
 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
 * @ha: HA context
 *
 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
 * supported addressing method.
 */
static void
1562
qla2x00_config_dma_addressing(struct qla_hw_data *ha)
L
Linus Torvalds 已提交
1563
{
1564
	/* Assume a 32bit DMA mask. */
L
Linus Torvalds 已提交
1565 1566
	ha->flags.enable_64bit_addressing = 0;

1567
	if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1568 1569
		/* Any upper-dword bits set? */
		if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1570
		    !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1571
			/* Ok, a 64bit DMA mask is applicable. */
L
Linus Torvalds 已提交
1572
			ha->flags.enable_64bit_addressing = 1;
1573 1574
			ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
			ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1575
			return;
L
Linus Torvalds 已提交
1576 1577
		}
	}
1578

1579 1580
	dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
	pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
L
Linus Torvalds 已提交
1581 1582
}

1583
static void
1584
qla2x00_enable_intrs(struct qla_hw_data *ha)
1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598
{
	unsigned long flags = 0;
	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;

	spin_lock_irqsave(&ha->hardware_lock, flags);
	ha->interrupts_on = 1;
	/* enable risc and host interrupts */
	WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
	RD_REG_WORD(&reg->ictrl);
	spin_unlock_irqrestore(&ha->hardware_lock, flags);

}

static void
1599
qla2x00_disable_intrs(struct qla_hw_data *ha)
1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612
{
	unsigned long flags = 0;
	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;

	spin_lock_irqsave(&ha->hardware_lock, flags);
	ha->interrupts_on = 0;
	/* disable risc and host interrupts */
	WRT_REG_WORD(&reg->ictrl, 0);
	RD_REG_WORD(&reg->ictrl);
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
}

static void
1613
qla24xx_enable_intrs(struct qla_hw_data *ha)
1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625
{
	unsigned long flags = 0;
	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;

	spin_lock_irqsave(&ha->hardware_lock, flags);
	ha->interrupts_on = 1;
	WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
	RD_REG_DWORD(&reg->ictrl);
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
}

static void
1626
qla24xx_disable_intrs(struct qla_hw_data *ha)
1627 1628 1629 1630
{
	unsigned long flags = 0;
	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;

1631 1632
	if (IS_NOPOLLING_TYPE(ha))
		return;
1633 1634 1635 1636 1637 1638 1639
	spin_lock_irqsave(&ha->hardware_lock, flags);
	ha->interrupts_on = 0;
	WRT_REG_DWORD(&reg->ictrl, 0);
	RD_REG_DWORD(&reg->ictrl);
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
}

1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748
static int
qla2x00_iospace_config(struct qla_hw_data *ha)
{
	resource_size_t pio;
	uint16_t msix;
	int cpus;

	if (pci_request_selected_regions(ha->pdev, ha->bars,
	    QLA2XXX_DRIVER_NAME)) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
		    "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}
	if (!(ha->bars & 1))
		goto skip_pio;

	/* We only need PIO for Flash operations on ISP2312 v2 chips. */
	pio = pci_resource_start(ha->pdev, 0);
	if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
		if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
			ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
			    "Invalid pci I/O region size (%s).\n",
			    pci_name(ha->pdev));
			pio = 0;
		}
	} else {
		ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
		    "Region #0 no a PIO resource (%s).\n",
		    pci_name(ha->pdev));
		pio = 0;
	}
	ha->pio_address = pio;
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
	    "PIO address=%llu.\n",
	    (unsigned long long)ha->pio_address);

skip_pio:
	/* Use MMIO operations for all accesses. */
	if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
		    "Region #1 not an MMIO resource (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}
	if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
		    "Invalid PCI mem region size (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}

	ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
	if (!ha->iobase) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
		    "Cannot remap MMIO (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}

	/* Determine queue resources */
	ha->max_req_queues = ha->max_rsp_queues = 1;
	if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
		(ql2xmaxqueues > 1 && ql2xmultique_tag) ||
		(!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
		goto mqiobase_exit;

	ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
			pci_resource_len(ha->pdev, 3));
	if (ha->mqiobase) {
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
		    "MQIO Base=%p.\n", ha->mqiobase);
		/* Read MSIX vector size of the board */
		pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
		ha->msix_count = msix;
		/* Max queues are bounded by available msix vectors */
		/* queue 0 uses two msix vectors */
		if (ql2xmultique_tag) {
			cpus = num_online_cpus();
			ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
				(cpus + 1) : (ha->msix_count - 1);
			ha->max_req_queues = 2;
		} else if (ql2xmaxqueues > 1) {
			ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
			    QLA_MQ_SIZE : ql2xmaxqueues;
			ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
			    "QoS mode set, max no of request queues:%d.\n",
			    ha->max_req_queues);
			ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
			    "QoS mode set, max no of request queues:%d.\n",
			    ha->max_req_queues);
		}
		ql_log_pci(ql_log_info, ha->pdev, 0x001a,
		    "MSI-X vector count: %d.\n", msix);
	} else
		ql_log_pci(ql_log_info, ha->pdev, 0x001b,
		    "BAR 3 not enabled.\n");

mqiobase_exit:
	ha->msix_count = ha->max_rsp_queues + 1;
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
	    "MSIX Count:%d.\n", ha->msix_count);
	return (0);

iospace_error_exit:
	return (-ENOMEM);
}


1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830
static int
qla83xx_iospace_config(struct qla_hw_data *ha)
{
	uint16_t msix;
	int cpus;

	if (pci_request_selected_regions(ha->pdev, ha->bars,
	    QLA2XXX_DRIVER_NAME)) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
		    "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
		    pci_name(ha->pdev));

		goto iospace_error_exit;
	}

	/* Use MMIO operations for all accesses. */
	if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
		ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
		    "Invalid pci I/O region size (%s).\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}
	if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
		ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
		    "Invalid PCI mem region size (%s), aborting\n",
			pci_name(ha->pdev));
		goto iospace_error_exit;
	}

	ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
	if (!ha->iobase) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
		    "Cannot remap MMIO (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}

	/* 64bit PCI BAR - BAR2 will correspoond to region 4 */
	/* 83XX 26XX always use MQ type access for queues
	 * - mbar 2, a.k.a region 4 */
	ha->max_req_queues = ha->max_rsp_queues = 1;
	ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
			pci_resource_len(ha->pdev, 4));

	if (!ha->mqiobase) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
		    "BAR2/region4 not enabled\n");
		goto mqiobase_exit;
	}

	ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
			pci_resource_len(ha->pdev, 2));
	if (ha->msixbase) {
		/* Read MSIX vector size of the board */
		pci_read_config_word(ha->pdev,
		    QLA_83XX_PCI_MSIX_CONTROL, &msix);
		ha->msix_count = msix;
		/* Max queues are bounded by available msix vectors */
		/* queue 0 uses two msix vectors */
		if (ql2xmultique_tag) {
			cpus = num_online_cpus();
			ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
				(cpus + 1) : (ha->msix_count - 1);
			ha->max_req_queues = 2;
		} else if (ql2xmaxqueues > 1) {
			ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
						QLA_MQ_SIZE : ql2xmaxqueues;
			ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
			    "QoS mode set, max no of request queues:%d.\n",
			    ha->max_req_queues);
			ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
			    "QoS mode set, max no of request queues:%d.\n",
			    ha->max_req_queues);
		}
		ql_log_pci(ql_log_info, ha->pdev, 0x011c,
		    "MSI-X vector count: %d.\n", msix);
	} else
		ql_log_pci(ql_log_info, ha->pdev, 0x011e,
		    "BAR 1 not enabled.\n");

mqiobase_exit:
	ha->msix_count = ha->max_rsp_queues + 1;
1831 1832 1833

	qlt_83xx_iospace_config(ha);

1834 1835 1836 1837 1838 1839 1840 1841
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
	    "MSIX Count:%d.\n", ha->msix_count);
	return 0;

iospace_error_exit:
	return -ENOMEM;
}

1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856
static struct isp_operations qla2100_isp_ops = {
	.pci_config		= qla2100_pci_config,
	.reset_chip		= qla2x00_reset_chip,
	.chip_diag		= qla2x00_chip_diag,
	.config_rings		= qla2x00_config_rings,
	.reset_adapter		= qla2x00_reset_adapter,
	.nvram_config		= qla2x00_nvram_config,
	.update_fw_options	= qla2x00_update_fw_options,
	.load_risc		= qla2x00_load_risc,
	.pci_info_str		= qla2x00_pci_info_str,
	.fw_version_str		= qla2x00_fw_version_str,
	.intr_handler		= qla2100_intr_handler,
	.enable_intrs		= qla2x00_enable_intrs,
	.disable_intrs		= qla2x00_disable_intrs,
	.abort_command		= qla2x00_abort_command,
1857 1858
	.target_reset		= qla2x00_abort_target,
	.lun_reset		= qla2x00_lun_reset,
1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873
	.fabric_login		= qla2x00_login_fabric,
	.fabric_logout		= qla2x00_fabric_logout,
	.calc_req_entries	= qla2x00_calc_iocbs_32,
	.build_iocbs		= qla2x00_build_scsi_iocbs_32,
	.prep_ms_iocb		= qla2x00_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla2x00_prep_ms_fdmi_iocb,
	.read_nvram		= qla2x00_read_nvram_data,
	.write_nvram		= qla2x00_write_nvram_data,
	.fw_dump		= qla2100_fw_dump,
	.beacon_on		= NULL,
	.beacon_off		= NULL,
	.beacon_blink		= NULL,
	.read_optrom		= qla2x00_read_optrom_data,
	.write_optrom		= qla2x00_write_optrom_data,
	.get_flash_version	= qla2x00_get_flash_version,
1874
	.start_scsi		= qla2x00_start_scsi,
1875
	.abort_isp		= qla2x00_abort_isp,
1876
	.iospace_config     	= qla2x00_iospace_config,
1877
	.initialize_adapter	= qla2x00_initialize_adapter,
1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894
};

static struct isp_operations qla2300_isp_ops = {
	.pci_config		= qla2300_pci_config,
	.reset_chip		= qla2x00_reset_chip,
	.chip_diag		= qla2x00_chip_diag,
	.config_rings		= qla2x00_config_rings,
	.reset_adapter		= qla2x00_reset_adapter,
	.nvram_config		= qla2x00_nvram_config,
	.update_fw_options	= qla2x00_update_fw_options,
	.load_risc		= qla2x00_load_risc,
	.pci_info_str		= qla2x00_pci_info_str,
	.fw_version_str		= qla2x00_fw_version_str,
	.intr_handler		= qla2300_intr_handler,
	.enable_intrs		= qla2x00_enable_intrs,
	.disable_intrs		= qla2x00_disable_intrs,
	.abort_command		= qla2x00_abort_command,
1895 1896
	.target_reset		= qla2x00_abort_target,
	.lun_reset		= qla2x00_lun_reset,
1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911
	.fabric_login		= qla2x00_login_fabric,
	.fabric_logout		= qla2x00_fabric_logout,
	.calc_req_entries	= qla2x00_calc_iocbs_32,
	.build_iocbs		= qla2x00_build_scsi_iocbs_32,
	.prep_ms_iocb		= qla2x00_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla2x00_prep_ms_fdmi_iocb,
	.read_nvram		= qla2x00_read_nvram_data,
	.write_nvram		= qla2x00_write_nvram_data,
	.fw_dump		= qla2300_fw_dump,
	.beacon_on		= qla2x00_beacon_on,
	.beacon_off		= qla2x00_beacon_off,
	.beacon_blink		= qla2x00_beacon_blink,
	.read_optrom		= qla2x00_read_optrom_data,
	.write_optrom		= qla2x00_write_optrom_data,
	.get_flash_version	= qla2x00_get_flash_version,
1912
	.start_scsi		= qla2x00_start_scsi,
1913
	.abort_isp		= qla2x00_abort_isp,
1914
	.iospace_config     	= qla2x00_iospace_config,
1915
	.initialize_adapter	= qla2x00_initialize_adapter,
1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932
};

static struct isp_operations qla24xx_isp_ops = {
	.pci_config		= qla24xx_pci_config,
	.reset_chip		= qla24xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla24xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla24xx_nvram_config,
	.update_fw_options	= qla24xx_update_fw_options,
	.load_risc		= qla24xx_load_risc,
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla24xx_intr_handler,
	.enable_intrs		= qla24xx_enable_intrs,
	.disable_intrs		= qla24xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
1933 1934
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= qla24xx_read_nvram_data,
	.write_nvram		= qla24xx_write_nvram_data,
	.fw_dump		= qla24xx_fw_dump,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
	.beacon_blink		= qla24xx_beacon_blink,
	.read_optrom		= qla24xx_read_optrom_data,
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
1950
	.start_scsi		= qla24xx_start_scsi,
1951
	.abort_isp		= qla2x00_abort_isp,
1952
	.iospace_config     	= qla2x00_iospace_config,
1953
	.initialize_adapter	= qla2x00_initialize_adapter,
1954 1955
};

1956 1957 1958 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970
static struct isp_operations qla25xx_isp_ops = {
	.pci_config		= qla25xx_pci_config,
	.reset_chip		= qla24xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla24xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla24xx_nvram_config,
	.update_fw_options	= qla24xx_update_fw_options,
	.load_risc		= qla24xx_load_risc,
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla24xx_intr_handler,
	.enable_intrs		= qla24xx_enable_intrs,
	.disable_intrs		= qla24xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
1971 1972
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= qla25xx_read_nvram_data,
	.write_nvram		= qla25xx_write_nvram_data,
	.fw_dump		= qla25xx_fw_dump,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
	.beacon_blink		= qla24xx_beacon_blink,
1985
	.read_optrom		= qla25xx_read_optrom_data,
1986 1987
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
1988
	.start_scsi		= qla24xx_dif_start_scsi,
1989
	.abort_isp		= qla2x00_abort_isp,
1990
	.iospace_config     	= qla2x00_iospace_config,
1991
	.initialize_adapter	= qla2x00_initialize_adapter,
1992 1993
};

1994 1995 1996 1997 1998 1999 2000 2001
static struct isp_operations qla81xx_isp_ops = {
	.pci_config		= qla25xx_pci_config,
	.reset_chip		= qla24xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla24xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla81xx_nvram_config,
	.update_fw_options	= qla81xx_update_fw_options,
2002
	.load_risc		= qla81xx_load_risc,
2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla24xx_intr_handler,
	.enable_intrs		= qla24xx_enable_intrs,
	.disable_intrs		= qla24xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
2017 2018
	.read_nvram		= NULL,
	.write_nvram		= NULL,
2019 2020 2021
	.fw_dump		= qla81xx_fw_dump,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
2022
	.beacon_blink		= qla83xx_beacon_blink,
2023 2024 2025
	.read_optrom		= qla25xx_read_optrom_data,
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
2026
	.start_scsi		= qla24xx_dif_start_scsi,
2027
	.abort_isp		= qla2x00_abort_isp,
2028
	.iospace_config     	= qla2x00_iospace_config,
2029
	.initialize_adapter	= qla2x00_initialize_adapter,
2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040
};

static struct isp_operations qla82xx_isp_ops = {
	.pci_config		= qla82xx_pci_config,
	.reset_chip		= qla82xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla82xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla81xx_nvram_config,
	.update_fw_options	= qla24xx_update_fw_options,
	.load_risc		= qla82xx_load_risc,
2041
	.pci_info_str		= qla24xx_pci_info_str,
2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla82xx_intr_handler,
	.enable_intrs		= qla82xx_enable_intrs,
	.disable_intrs		= qla82xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= qla24xx_read_nvram_data,
	.write_nvram		= qla24xx_write_nvram_data,
	.fw_dump		= qla24xx_fw_dump,
2058 2059 2060
	.beacon_on		= qla82xx_beacon_on,
	.beacon_off		= qla82xx_beacon_off,
	.beacon_blink		= NULL,
2061 2062 2063 2064 2065
	.read_optrom		= qla82xx_read_optrom_data,
	.write_optrom		= qla82xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
	.start_scsi             = qla82xx_start_scsi,
	.abort_isp		= qla82xx_abort_isp,
2066
	.iospace_config     	= qla82xx_iospace_config,
2067
	.initialize_adapter	= qla2x00_initialize_adapter,
2068 2069
};

2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096 2097 2098 2099 2100 2101 2102 2103 2104
static struct isp_operations qla83xx_isp_ops = {
	.pci_config		= qla25xx_pci_config,
	.reset_chip		= qla24xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla24xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla81xx_nvram_config,
	.update_fw_options	= qla81xx_update_fw_options,
	.load_risc		= qla81xx_load_risc,
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla24xx_intr_handler,
	.enable_intrs		= qla24xx_enable_intrs,
	.disable_intrs		= qla24xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= NULL,
	.write_nvram		= NULL,
	.fw_dump		= qla83xx_fw_dump,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
	.beacon_blink		= qla83xx_beacon_blink,
	.read_optrom		= qla25xx_read_optrom_data,
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
	.start_scsi		= qla24xx_dif_start_scsi,
	.abort_isp		= qla2x00_abort_isp,
	.iospace_config		= qla83xx_iospace_config,
2105 2106 2107 2108 2109 2110 2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143
	.initialize_adapter	= qla2x00_initialize_adapter,
};

static struct isp_operations qlafx00_isp_ops = {
	.pci_config		= qlafx00_pci_config,
	.reset_chip		= qlafx00_soft_reset,
	.chip_diag		= qlafx00_chip_diag,
	.config_rings		= qlafx00_config_rings,
	.reset_adapter		= qlafx00_soft_reset,
	.nvram_config		= NULL,
	.update_fw_options	= NULL,
	.load_risc		= NULL,
	.pci_info_str		= qlafx00_pci_info_str,
	.fw_version_str		= qlafx00_fw_version_str,
	.intr_handler		= qlafx00_intr_handler,
	.enable_intrs		= qlafx00_enable_intrs,
	.disable_intrs		= qlafx00_disable_intrs,
	.abort_command		= qlafx00_abort_command,
	.target_reset		= qlafx00_abort_target,
	.lun_reset		= qlafx00_lun_reset,
	.fabric_login		= NULL,
	.fabric_logout		= NULL,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= qla24xx_read_nvram_data,
	.write_nvram		= qla24xx_write_nvram_data,
	.fw_dump		= NULL,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
	.beacon_blink		= NULL,
	.read_optrom		= qla24xx_read_optrom_data,
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
	.start_scsi		= qlafx00_start_scsi,
	.abort_isp		= qlafx00_abort_isp,
	.iospace_config		= qlafx00_iospace_config,
	.initialize_adapter	= qlafx00_initialize_adapter,
2144 2145
};

2146
static inline void
2147
qla2x00_set_isp_flags(struct qla_hw_data *ha)
2148 2149 2150 2151 2152 2153
{
	ha->device_type = DT_EXTENDED_IDS;
	switch (ha->pdev->device) {
	case PCI_DEVICE_ID_QLOGIC_ISP2100:
		ha->device_type |= DT_ISP2100;
		ha->device_type &= ~DT_EXTENDED_IDS;
2154
		ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2155 2156 2157 2158
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2200:
		ha->device_type |= DT_ISP2200;
		ha->device_type &= ~DT_EXTENDED_IDS;
2159
		ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2160 2161 2162
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2300:
		ha->device_type |= DT_ISP2300;
2163
		ha->device_type |= DT_ZIO_SUPPORTED;
2164
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2165 2166 2167
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2312:
		ha->device_type |= DT_ISP2312;
2168
		ha->device_type |= DT_ZIO_SUPPORTED;
2169
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2170 2171 2172
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2322:
		ha->device_type |= DT_ISP2322;
2173
		ha->device_type |= DT_ZIO_SUPPORTED;
2174 2175 2176
		if (ha->pdev->subsystem_vendor == 0x1028 &&
		    ha->pdev->subsystem_device == 0x0170)
			ha->device_type |= DT_OEM_001;
2177
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2178 2179 2180
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP6312:
		ha->device_type |= DT_ISP6312;
2181
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2182 2183 2184
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP6322:
		ha->device_type |= DT_ISP6322;
2185
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2186 2187 2188
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2422:
		ha->device_type |= DT_ISP2422;
2189
		ha->device_type |= DT_ZIO_SUPPORTED;
2190
		ha->device_type |= DT_FWI2;
2191
		ha->device_type |= DT_IIDMA;
2192
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2193 2194 2195
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2432:
		ha->device_type |= DT_ISP2432;
2196
		ha->device_type |= DT_ZIO_SUPPORTED;
2197
		ha->device_type |= DT_FWI2;
2198
		ha->device_type |= DT_IIDMA;
2199
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2200
		break;
2201 2202 2203 2204 2205 2206 2207
	case PCI_DEVICE_ID_QLOGIC_ISP8432:
		ha->device_type |= DT_ISP8432;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
2208 2209
	case PCI_DEVICE_ID_QLOGIC_ISP5422:
		ha->device_type |= DT_ISP5422;
2210
		ha->device_type |= DT_FWI2;
2211
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2212
		break;
2213 2214
	case PCI_DEVICE_ID_QLOGIC_ISP5432:
		ha->device_type |= DT_ISP5432;
2215
		ha->device_type |= DT_FWI2;
2216
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2217
		break;
2218 2219 2220 2221 2222
	case PCI_DEVICE_ID_QLOGIC_ISP2532:
		ha->device_type |= DT_ISP2532;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
2223
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2224
		break;
2225 2226 2227 2228 2229 2230 2231
	case PCI_DEVICE_ID_QLOGIC_ISP8001:
		ha->device_type |= DT_ISP8001;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
2232 2233 2234 2235 2236 2237 2238 2239
	case PCI_DEVICE_ID_QLOGIC_ISP8021:
		ha->device_type |= DT_ISP8021;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		/* Initialize 82XX ISP flags */
		qla82xx_init_flags(ha);
		break;
2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255
	case PCI_DEVICE_ID_QLOGIC_ISP2031:
		ha->device_type |= DT_ISP2031;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->device_type |= DT_T10_PI;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP8031:
		ha->device_type |= DT_ISP8031;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->device_type |= DT_T10_PI;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
2256 2257 2258
	case PCI_DEVICE_ID_QLOGIC_ISPF001:
		ha->device_type |= DT_ISPFX00;
		break;
2259
	}
2260

2261 2262 2263 2264 2265 2266
	if (IS_QLA82XX(ha))
		ha->port_no = !(ha->portnum & 1);
	else
		/* Get adapter physical port no from interrupt pin register. */
		pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);

2267 2268 2269 2270
	if (ha->port_no & 1)
		ha->flags.port0 = 1;
	else
		ha->flags.port0 = 0;
2271
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2272
	    "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2273
	    ha->device_type, ha->flags.port0, ha->fw_srisc_address);
2274 2275
}

2276 2277 2278
static void
qla2xxx_scan_start(struct Scsi_Host *shost)
{
2279
	scsi_qla_host_t *vha = shost_priv(shost);
2280

2281 2282 2283
	if (vha->hw->flags.running_gold_fw)
		return;

2284 2285 2286 2287
	set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
	set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
	set_bit(RSCN_UPDATE, &vha->dpc_flags);
	set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2288 2289 2290 2291 2292
}

static int
qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
{
2293
	scsi_qla_host_t *vha = shost_priv(shost);
2294

2295
	if (!vha->host)
2296
		return 1;
2297
	if (time > vha->hw->loop_reset_delay * HZ)
2298 2299
		return 1;

2300
	return atomic_read(&vha->loop_state) == LOOP_READY;
2301 2302
}

L
Linus Torvalds 已提交
2303 2304 2305
/*
 * PCI driver interface
 */
2306
static int
2307
qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
L
Linus Torvalds 已提交
2308
{
2309
	int	ret = -ENODEV;
L
Linus Torvalds 已提交
2310
	struct Scsi_Host *host;
2311 2312
	scsi_qla_host_t *base_vha = NULL;
	struct qla_hw_data *ha;
2313
	char pci_info[30];
2314
	char fw_str[30], wq_name[30];
2315
	struct scsi_host_template *sht;
2316
	int bars, mem_only = 0;
2317
	uint16_t req_length = 0, rsp_length = 0;
2318 2319
	struct req_que *req = NULL;
	struct rsp_que *rsp = NULL;
L
Linus Torvalds 已提交
2320

2321
	bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2322
	sht = &qla2xxx_driver_template;
2323
	if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2324
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2325
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2326
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2327
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2328
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2329
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2330 2331
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2332 2333
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001) {
2334
		bars = pci_select_bars(pdev, IORESOURCE_MEM);
2335
		mem_only = 1;
2336 2337
		ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
		    "Mem only adapter.\n");
2338
	}
2339 2340
	ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
	    "Bars=%d.\n", bars);
2341

2342 2343 2344 2345 2346 2347 2348
	if (mem_only) {
		if (pci_enable_device_mem(pdev))
			goto probe_out;
	} else {
		if (pci_enable_device(pdev))
			goto probe_out;
	}
2349

2350 2351
	/* This may fail but that's ok */
	pci_enable_pcie_error_reporting(pdev);
2352

2353 2354
	ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
	if (!ha) {
2355 2356
		ql_log_pci(ql_log_fatal, pdev, 0x0009,
		    "Unable to allocate memory for ha.\n");
2357
		goto probe_out;
L
Linus Torvalds 已提交
2358
	}
2359 2360
	ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
	    "Memory allocated for ha=%p.\n", ha);
2361
	ha->pdev = pdev;
2362
	ha->tgt.enable_class_2 = ql2xenableclass2;
L
Linus Torvalds 已提交
2363 2364

	/* Clear our data area */
2365
	ha->bars = bars;
2366
	ha->mem_only = mem_only;
2367
	spin_lock_init(&ha->hardware_lock);
2368
	spin_lock_init(&ha->vport_slock);
2369
	mutex_init(&ha->selflogin_lock);
L
Linus Torvalds 已提交
2370

2371 2372
	/* Set ISP-type information. */
	qla2x00_set_isp_flags(ha);
2373 2374

	/* Set EEH reset type to fundamental if required by hba */
2375 2376
	if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
	    IS_QLA83XX(ha))
2377 2378
		pdev->needs_freset = 1;

2379 2380 2381 2382
	ha->prev_topology = 0;
	ha->init_cb_size = sizeof(init_cb_t);
	ha->link_data_rate = PORT_SPEED_UNKNOWN;
	ha->optrom_size = OPTROM_SIZE_2300;
2383
	ha->cfg_lun_q_depth = ql2xmaxqdepth;
2384

2385
	/* Assign ISP specific operations. */
L
Linus Torvalds 已提交
2386
	if (IS_QLA2100(ha)) {
2387
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
L
Linus Torvalds 已提交
2388
		ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2389 2390 2391
		req_length = REQUEST_ENTRY_CNT_2100;
		rsp_length = RESPONSE_ENTRY_CNT_2100;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2392
		ha->gid_list_info_size = 4;
2393 2394 2395 2396
		ha->flash_conf_off = ~0;
		ha->flash_data_off = ~0;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2397
		ha->isp_ops = &qla2100_isp_ops;
L
Linus Torvalds 已提交
2398
	} else if (IS_QLA2200(ha)) {
2399
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2400
		ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2401 2402 2403
		req_length = REQUEST_ENTRY_CNT_2200;
		rsp_length = RESPONSE_ENTRY_CNT_2100;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2404
		ha->gid_list_info_size = 4;
2405 2406 2407 2408
		ha->flash_conf_off = ~0;
		ha->flash_data_off = ~0;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2409
		ha->isp_ops = &qla2100_isp_ops;
2410
	} else if (IS_QLA23XX(ha)) {
2411
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
L
Linus Torvalds 已提交
2412
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
2413 2414 2415
		req_length = REQUEST_ENTRY_CNT_2200;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2416
		ha->gid_list_info_size = 6;
2417 2418
		if (IS_QLA2322(ha) || IS_QLA6322(ha))
			ha->optrom_size = OPTROM_SIZE_2322;
2419 2420 2421 2422
		ha->flash_conf_off = ~0;
		ha->flash_data_off = ~0;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2423
		ha->isp_ops = &qla2300_isp_ops;
2424
	} else if (IS_QLA24XX_TYPE(ha)) {
2425
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2426
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
2427 2428
		req_length = REQUEST_ENTRY_CNT_24XX;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
2429
		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2430
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2431
		ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2432
		ha->gid_list_info_size = 8;
2433
		ha->optrom_size = OPTROM_SIZE_24XX;
2434
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2435
		ha->isp_ops = &qla24xx_isp_ops;
2436 2437 2438 2439
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
		ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
		ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2440
	} else if (IS_QLA25XX(ha)) {
2441
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2442
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
2443 2444
		req_length = REQUEST_ENTRY_CNT_24XX;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
2445
		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2446
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2447 2448 2449
		ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_25XX;
2450
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2451
		ha->isp_ops = &qla25xx_isp_ops;
2452 2453 2454 2455 2456
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
		ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
		ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
	} else if (IS_QLA81XX(ha)) {
2457
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2458 2459 2460
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
		req_length = REQUEST_ENTRY_CNT_24XX;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
2461
		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2462 2463 2464 2465
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_81XX;
2466
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2467 2468 2469 2470 2471
		ha->isp_ops = &qla81xx_isp_ops;
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2472
	} else if (IS_QLA82XX(ha)) {
2473
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2474 2475 2476 2477 2478 2479 2480
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
		req_length = REQUEST_ENTRY_CNT_82XX;
		rsp_length = RESPONSE_ENTRY_CNT_82XX;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_82XX;
2481
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2482 2483 2484 2485 2486
		ha->isp_ops = &qla82xx_isp_ops;
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
		ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
		ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2487
	} else if (IS_QLA83XX(ha)) {
2488
		ha->portnum = PCI_FUNC(ha->pdev->devfn);
2489
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2490 2491 2492
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
		req_length = REQUEST_ENTRY_CNT_24XX;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
2493
		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2494 2495 2496 2497 2498 2499 2500 2501 2502 2503
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_83XX;
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
		ha->isp_ops = &qla83xx_isp_ops;
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2504 2505 2506 2507 2508 2509 2510 2511 2512 2513 2514 2515
	}  else if (IS_QLAFX00(ha)) {
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
		ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
		ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
		req_length = REQUEST_ENTRY_CNT_FX00;
		rsp_length = RESPONSE_ENTRY_CNT_FX00;
		ha->init_cb_size = sizeof(struct init_cb_fx);
		ha->isp_ops = &qlafx00_isp_ops;
		ha->port_down_retry_count = 30; /* default value */
		ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
		ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
		ha->mr.fw_hbt_en = 1;
L
Linus Torvalds 已提交
2516
	}
2517

2518 2519 2520
	ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
	    "mbx_count=%d, req_length=%d, "
	    "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2521 2522
	    "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
	    "max_fibre_devices=%d.\n",
2523 2524
	    ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
	    ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2525
	    ha->nvram_npiv_size, ha->max_fibre_devices);
2526 2527 2528 2529 2530
	ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
	    "isp_ops=%p, flash_conf_off=%d, "
	    "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
	    ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
	    ha->nvram_conf_off, ha->nvram_data_off);
2531 2532 2533 2534

	/* Configure PCI I/O space */
	ret = ha->isp_ops->iospace_config(ha);
	if (ret)
2535
		goto iospace_config_failed;
2536 2537 2538 2539

	ql_log_pci(ql_log_info, pdev, 0x001d,
	    "Found an ISP%04X irq %d iobase 0x%p.\n",
	    pdev->device, pdev->irq, ha->iobase);
2540
	mutex_init(&ha->vport_lock);
2541 2542 2543
	init_completion(&ha->mbx_cmd_comp);
	complete(&ha->mbx_cmd_comp);
	init_completion(&ha->mbx_intr_comp);
2544
	init_completion(&ha->dcbx_comp);
2545
	init_completion(&ha->lb_portup_comp);
L
Linus Torvalds 已提交
2546

2547
	set_bit(0, (unsigned long *) ha->vp_idx_map);
L
Linus Torvalds 已提交
2548

2549
	qla2x00_config_dma_addressing(ha);
2550 2551 2552 2553
	ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
	    "64 Bit addressing is %s.\n",
	    ha->flags.enable_64bit_addressing ? "enable" :
	    "disable");
2554
	ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2555
	if (!ret) {
2556 2557
		ql_log_pci(ql_log_fatal, pdev, 0x0031,
		    "Failed to allocate memory for adapter, aborting.\n");
L
Linus Torvalds 已提交
2558

2559 2560 2561
		goto probe_hw_failed;
	}

2562
	req->max_q_depth = MAX_Q_DEPTH;
2563
	if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2564 2565
		req->max_q_depth = ql2xmaxqdepth;

2566 2567 2568

	base_vha = qla2x00_create_host(sht, ha);
	if (!base_vha) {
2569
		ret = -ENOMEM;
2570
		qla2x00_mem_free(ha);
2571 2572
		qla2x00_free_req_que(ha, req);
		qla2x00_free_rsp_que(ha, rsp);
2573
		goto probe_hw_failed;
L
Linus Torvalds 已提交
2574 2575
	}

2576 2577 2578
	pci_set_drvdata(pdev, base_vha);

	host = base_vha->host;
2579
	base_vha->req = req;
2580 2581 2582 2583
	if (IS_QLAFX00(ha))
		host->can_queue = 1024;
	else
		host->can_queue = req->length + 128;
2584
	if (IS_QLA2XXX_MIDTYPE(ha))
2585
		base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2586
	else
2587 2588
		base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
						base_vha->vp_idx;
2589

2590 2591 2592 2593 2594 2595 2596 2597
	/* Setup fcport template structure. */
	ha->mr.fcport.vha = base_vha;
	ha->mr.fcport.port_type = FCT_UNKNOWN;
	ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
	qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
	ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
	ha->mr.fcport.scan_state = 1;

2598 2599 2600 2601 2602 2603 2604 2605
	/* Set the SG table size based on ISP type */
	if (!IS_FWI2_CAPABLE(ha)) {
		if (IS_QLA2100(ha))
			host->sg_tablesize = 32;
	} else {
		if (!IS_QLA82XX(ha))
			host->sg_tablesize = QLA_SG_ALL;
	}
2606 2607 2608 2609 2610
	ql_dbg(ql_dbg_init, base_vha, 0x0032,
	    "can_queue=%d, req=%p, "
	    "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
	    host->can_queue, base_vha->req,
	    base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2611
	host->max_id = ha->max_fibre_devices;
2612 2613
	host->cmd_per_lun = 3;
	host->unique_id = host->host_no;
2614
	if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2615 2616 2617
		host->max_cmd_len = 32;
	else
		host->max_cmd_len = MAX_CMDSZ;
2618
	host->max_channel = MAX_BUSES - 1;
2619
	host->max_lun = ql2xmaxlun;
2620
	host->transportt = qla2xxx_transport_template;
2621
	sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2622

2623 2624 2625
	ql_dbg(ql_dbg_init, base_vha, 0x0033,
	    "max_id=%d this_id=%d "
	    "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2626
	    "max_lun=%d transportt=%p, vendor_id=%llu.\n", host->max_id,
2627 2628 2629 2630
	    host->this_id, host->cmd_per_lun, host->unique_id,
	    host->max_cmd_len, host->max_channel, host->max_lun,
	    host->transportt, sht->vendor_id);

2631 2632 2633 2634 2635 2636 2637 2638 2639
que_init:
	/* Alloc arrays of request and response ring ptrs */
	if (!qla2x00_alloc_queues(ha, req, rsp)) {
		ql_log(ql_log_fatal, base_vha, 0x003d,
		    "Failed to allocate memory for queue pointers..."
		    "aborting.\n");
		goto probe_init_failed;
	}

2640
	qlt_probe_one_stage1(base_vha, ha);
2641

2642 2643 2644
	/* Set up the irqs */
	ret = qla2x00_request_irqs(ha, rsp);
	if (ret)
2645
		goto probe_init_failed;
2646 2647 2648

	pci_save_state(pdev);

2649
	/* Assign back pointers */
2650 2651
	rsp->req = req;
	req->rsp = rsp;
2652

2653 2654 2655 2656 2657 2658 2659
	if (IS_QLAFX00(ha)) {
		ha->rsp_q_map[0] = rsp;
		ha->req_q_map[0] = req;
		set_bit(0, ha->req_qid_map);
		set_bit(0, ha->rsp_qid_map);
	}

2660 2661 2662 2663 2664
	/* FWI2-capable only. */
	req->req_q_in = &ha->iobase->isp24.req_q_in;
	req->req_q_out = &ha->iobase->isp24.req_q_out;
	rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
	rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2665
	if (ha->mqenable || IS_QLA83XX(ha)) {
2666 2667 2668 2669
		req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
		req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
		rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
		rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2670 2671
	}

2672 2673 2674 2675 2676 2677 2678
	if (IS_QLAFX00(ha)) {
		req->req_q_in = &ha->iobase->ispfx00.req_q_in;
		req->req_q_out = &ha->iobase->ispfx00.req_q_out;
		rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
		rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
	}

2679 2680 2681 2682 2683 2684
	if (IS_QLA82XX(ha)) {
		req->req_q_out = &ha->iobase->isp82.req_q_out[0];
		rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
		rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
	}

2685 2686 2687 2688 2689 2690 2691 2692 2693 2694 2695 2696 2697 2698
	ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
	    "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
	    ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
	ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
	    "req->req_q_in=%p req->req_q_out=%p "
	    "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
	    req->req_q_in, req->req_q_out,
	    rsp->rsp_q_in, rsp->rsp_q_out);
	ql_dbg(ql_dbg_init, base_vha, 0x003e,
	    "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
	    ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
	ql_dbg(ql_dbg_init, base_vha, 0x003f,
	    "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
	    req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
L
Linus Torvalds 已提交
2699

2700
	if (ha->isp_ops->initialize_adapter(base_vha)) {
2701 2702 2703
		ql_log(ql_log_fatal, base_vha, 0x00d6,
		    "Failed to initialize adapter - Adapter flags %x.\n",
		    base_vha->device_flags);
L
Linus Torvalds 已提交
2704

2705 2706 2707
		if (IS_QLA82XX(ha)) {
			qla82xx_idc_lock(ha);
			qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2708
				QLA8XXX_DEV_FAILED);
2709
			qla82xx_idc_unlock(ha);
2710 2711
			ql_log(ql_log_fatal, base_vha, 0x00d7,
			    "HW State: FAILED.\n");
2712 2713
		}

2714
		ret = -ENODEV;
L
Linus Torvalds 已提交
2715 2716 2717
		goto probe_failed;
	}

2718 2719
	if (ha->mqenable) {
		if (qla25xx_setup_mode(base_vha)) {
2720 2721
			ql_log(ql_log_warn, base_vha, 0x00ec,
			    "Failed to create queues, falling back to single queue mode.\n");
2722 2723 2724
			goto que_init;
		}
	}
2725

2726 2727 2728
	if (ha->flags.running_gold_fw)
		goto skip_dpc;

L
Linus Torvalds 已提交
2729 2730 2731
	/*
	 * Startup the kernel thread for this host adapter
	 */
2732
	ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2733
	    "%s_dpc", base_vha->host_str);
2734
	if (IS_ERR(ha->dpc_thread)) {
2735 2736
		ql_log(ql_log_fatal, base_vha, 0x00ed,
		    "Failed to start DPC thread.\n");
2737
		ret = PTR_ERR(ha->dpc_thread);
L
Linus Torvalds 已提交
2738 2739
		goto probe_failed;
	}
2740 2741
	ql_dbg(ql_dbg_init, base_vha, 0x00ee,
	    "DPC thread started successfully.\n");
L
Linus Torvalds 已提交
2742

2743 2744 2745 2746 2747 2748 2749 2750
	/*
	 * If we're not coming up in initiator mode, we might sit for
	 * a while without waking up the dpc thread, which leads to a
	 * stuck process warning.  So just kick the dpc once here and
	 * let the kthread start (and go back to sleep in qla2x00_do_dpc).
	 */
	qla2xxx_wake_dpc(base_vha);

2751 2752 2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763 2764
	if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
		sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
		ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
		INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);

		sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
		ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
		INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
		INIT_WORK(&ha->idc_state_handler,
		    qla83xx_idc_state_handler_work);
		INIT_WORK(&ha->nic_core_unrecoverable,
		    qla83xx_nic_core_unrecoverable_work);
	}

2765
skip_dpc:
2766 2767
	list_add_tail(&base_vha->list, &ha->vp_list);
	base_vha->host->irq = ha->pdev->irq;
L
Linus Torvalds 已提交
2768 2769

	/* Initialized the timer */
2770
	qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2771 2772 2773 2774 2775 2776
	ql_dbg(ql_dbg_init, base_vha, 0x00ef,
	    "Started qla2x00_timer with "
	    "interval=%d.\n", WATCH_INTERVAL);
	ql_dbg(ql_dbg_init, base_vha, 0x00f0,
	    "Detected hba at address=%p.\n",
	    ha);
2777

2778
	if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2779
		if (ha->fw_attributes & BIT_4) {
2780
			int prot = 0, guard;
2781
			base_vha->flags.difdix_supported = 1;
2782 2783
			ql_dbg(ql_dbg_init, base_vha, 0x00f1,
			    "Registering for DIF/DIX type 1 and 3 protection.\n");
2784 2785
			if (ql2xenabledif == 1)
				prot = SHOST_DIX_TYPE0_PROTECTION;
2786
			scsi_host_set_prot(host,
2787
			    prot | SHOST_DIF_TYPE1_PROTECTION
2788
			    | SHOST_DIF_TYPE2_PROTECTION
2789 2790
			    | SHOST_DIF_TYPE3_PROTECTION
			    | SHOST_DIX_TYPE1_PROTECTION
2791
			    | SHOST_DIX_TYPE2_PROTECTION
2792
			    | SHOST_DIX_TYPE3_PROTECTION);
2793 2794 2795 2796 2797 2798 2799 2800

			guard = SHOST_DIX_GUARD_CRC;

			if (IS_PI_IPGUARD_CAPABLE(ha) &&
			    (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
				guard |= SHOST_DIX_GUARD_IP;

			scsi_host_set_guard(host, guard);
2801 2802 2803 2804
		} else
			base_vha->flags.difdix_supported = 0;
	}

2805 2806
	ha->isp_ops->enable_intrs(ha);

2807 2808 2809 2810
	ret = scsi_add_host(host, &pdev->dev);
	if (ret)
		goto probe_failed;

2811 2812 2813
	base_vha->flags.init_done = 1;
	base_vha->flags.online = 1;

2814 2815 2816
	ql_dbg(ql_dbg_init, base_vha, 0x00f2,
	    "Init done and hba is online.\n");

2817 2818 2819 2820 2821
	if (qla_ini_mode_enabled(base_vha))
		scsi_scan_host(host);
	else
		ql_dbg(ql_dbg_init, base_vha, 0x0122,
			"skipping scsi_scan_host() for non-initiator port\n");
2822

2823
	qla2x00_alloc_sysfs_attr(base_vha);
2824

2825 2826 2827 2828 2829 2830 2831 2832 2833 2834 2835 2836
	if (IS_QLAFX00(ha)) {
		ret = qlafx00_fx_disc(base_vha,
			&base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);

		ret = qlafx00_fx_disc(base_vha,
			&base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);

		/* Register system information */
		ret =  qlafx00_fx_disc(base_vha,
			&base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
	}

2837
	qla2x00_init_host_attr(base_vha);
2838

2839
	qla2x00_dfs_setup(base_vha);
2840

2841
	ql_log(ql_log_info, base_vha, 0x00fb,
2842
	    "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
2843 2844 2845 2846 2847
	ql_log(ql_log_info, base_vha, 0x00fc,
	    "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
	    pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
	    pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
	    base_vha->host_no,
2848
	    ha->isp_ops->fw_version_str(base_vha, fw_str));
L
Linus Torvalds 已提交
2849

2850 2851
	qlt_add_target(ha, base_vha);

L
Linus Torvalds 已提交
2852 2853
	return 0;

2854
probe_init_failed:
2855
	qla2x00_free_req_que(ha, req);
2856 2857
	ha->req_q_map[0] = NULL;
	clear_bit(0, ha->req_qid_map);
2858
	qla2x00_free_rsp_que(ha, rsp);
2859 2860
	ha->rsp_q_map[0] = NULL;
	clear_bit(0, ha->rsp_qid_map);
2861
	ha->max_req_queues = ha->max_rsp_queues = 0;
2862

L
Linus Torvalds 已提交
2863
probe_failed:
2864 2865 2866 2867 2868 2869 2870 2871 2872 2873
	if (base_vha->timer_active)
		qla2x00_stop_timer(base_vha);
	base_vha->flags.online = 0;
	if (ha->dpc_thread) {
		struct task_struct *t = ha->dpc_thread;

		ha->dpc_thread = NULL;
		kthread_stop(t);
	}

2874
	qla2x00_free_device(base_vha);
L
Linus Torvalds 已提交
2875

2876
	scsi_host_put(base_vha->host);
L
Linus Torvalds 已提交
2877

2878
probe_hw_failed:
2879 2880 2881 2882
	if (IS_QLA82XX(ha)) {
		qla82xx_idc_lock(ha);
		qla82xx_clear_drv_active(ha);
		qla82xx_idc_unlock(ha);
2883 2884 2885 2886 2887
	}
iospace_config_failed:
	if (IS_QLA82XX(ha)) {
		if (!ha->nx_pcibase)
			iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2888 2889 2890 2891 2892
		if (!ql2xdbwr)
			iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
	} else {
		if (ha->iobase)
			iounmap(ha->iobase);
2893 2894
		if (ha->cregbase)
			iounmap(ha->cregbase);
2895
	}
2896 2897 2898
	pci_release_selected_regions(ha->pdev, ha->bars);
	kfree(ha);
	ha = NULL;
L
Linus Torvalds 已提交
2899

2900
probe_out:
2901
	pci_disable_device(pdev);
2902
	return ret;
L
Linus Torvalds 已提交
2903 2904
}

2905 2906 2907 2908 2909 2910 2911 2912 2913 2914 2915 2916 2917 2918 2919 2920
static void
qla2x00_stop_dpc_thread(scsi_qla_host_t *vha)
{
	struct qla_hw_data *ha = vha->hw;
	struct task_struct *t = ha->dpc_thread;

	if (ha->dpc_thread == NULL)
		return;
	/*
	 * qla2xxx_wake_dpc checks for ->dpc_thread
	 * so we need to zero it out.
	 */
	ha->dpc_thread = NULL;
	kthread_stop(t);
}

2921 2922 2923 2924 2925 2926
static void
qla2x00_shutdown(struct pci_dev *pdev)
{
	scsi_qla_host_t *vha;
	struct qla_hw_data  *ha;

2927 2928 2929
	if (!atomic_read(&pdev->enable_cnt))
		return;

2930 2931 2932 2933 2934 2935 2936 2937 2938 2939 2940 2941 2942 2943 2944 2945 2946 2947 2948 2949 2950 2951 2952 2953 2954 2955 2956 2957 2958 2959
	vha = pci_get_drvdata(pdev);
	ha = vha->hw;

	/* Turn-off FCE trace */
	if (ha->flags.fce_enabled) {
		qla2x00_disable_fce_trace(vha, NULL, NULL);
		ha->flags.fce_enabled = 0;
	}

	/* Turn-off EFT trace */
	if (ha->eft)
		qla2x00_disable_eft_trace(vha);

	/* Stop currently executing firmware. */
	qla2x00_try_to_stop_firmware(vha);

	/* Turn adapter off line */
	vha->flags.online = 0;

	/* turn-off interrupts on the card */
	if (ha->interrupts_on) {
		vha->flags.init_done = 0;
		ha->isp_ops->disable_intrs(ha);
	}

	qla2x00_free_irqs(vha);

	qla2x00_free_fw_dump(ha);
}

A
Adrian Bunk 已提交
2960
static void
2961
qla2x00_remove_one(struct pci_dev *pdev)
L
Linus Torvalds 已提交
2962
{
2963
	scsi_qla_host_t *base_vha, *vha;
2964
	struct qla_hw_data  *ha;
2965
	unsigned long flags;
2966

2967 2968 2969 2970 2971 2972 2973
	/*
	 * If the PCI device is disabled that means that probe failed and any
	 * resources should be have cleaned up on probe exit.
	 */
	if (!atomic_read(&pdev->enable_cnt))
		return;

2974 2975 2976
	base_vha = pci_get_drvdata(pdev);
	ha = base_vha->hw;

2977 2978
	ha->flags.host_shutting_down = 1;

2979
	set_bit(UNLOADING, &base_vha->dpc_flags);
2980 2981 2982
	mutex_lock(&ha->vport_lock);
	while (ha->cur_vport_count) {
		spin_lock_irqsave(&ha->vport_slock, flags);
2983

2984 2985 2986
		BUG_ON(base_vha->list.next == &ha->vp_list);
		/* This assumes first entry in ha->vp_list is always base vha */
		vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
2987
		scsi_host_get(vha->host);
2988

2989 2990 2991 2992 2993
		spin_unlock_irqrestore(&ha->vport_slock, flags);
		mutex_unlock(&ha->vport_lock);

		fc_vport_terminate(vha->fc_vport);
		scsi_host_put(vha->host);
2994

2995
		mutex_lock(&ha->vport_lock);
2996
	}
2997
	mutex_unlock(&ha->vport_lock);
L
Linus Torvalds 已提交
2998

2999 3000 3001 3002 3003 3004 3005 3006
	if (IS_QLA8031(ha)) {
		ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
		    "Clearing fcoe driver presence.\n");
		if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
			ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
			    "Error while clearing DRV-Presence.\n");
	}

3007 3008
	qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);

3009
	qla2x00_dfs_remove(base_vha);
3010

3011
	qla84xx_put_chip(base_vha);
3012

3013 3014 3015 3016 3017 3018
	/* Disable timer */
	if (base_vha->timer_active)
		qla2x00_stop_timer(base_vha);

	base_vha->flags.online = 0;

3019 3020 3021 3022 3023 3024 3025
	/* Flush the work queue and remove it */
	if (ha->wq) {
		flush_workqueue(ha->wq);
		destroy_workqueue(ha->wq);
		ha->wq = NULL;
	}

3026 3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038 3039 3040
	/* Cancel all work and destroy DPC workqueues */
	if (ha->dpc_lp_wq) {
		cancel_work_sync(&ha->idc_aen);
		destroy_workqueue(ha->dpc_lp_wq);
		ha->dpc_lp_wq = NULL;
	}

	if (ha->dpc_hp_wq) {
		cancel_work_sync(&ha->nic_core_reset);
		cancel_work_sync(&ha->idc_state_handler);
		cancel_work_sync(&ha->nic_core_unrecoverable);
		destroy_workqueue(ha->dpc_hp_wq);
		ha->dpc_hp_wq = NULL;
	}

3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051
	/* Kill the kernel thread for this host */
	if (ha->dpc_thread) {
		struct task_struct *t = ha->dpc_thread;

		/*
		 * qla2xxx_wake_dpc checks for ->dpc_thread
		 * so we need to zero it out.
		 */
		ha->dpc_thread = NULL;
		kthread_stop(t);
	}
3052
	qlt_remove_target(ha, base_vha);
3053

3054
	qla2x00_free_sysfs_attr(base_vha);
3055

3056
	fc_remove_host(base_vha->host);
3057

3058
	scsi_remove_host(base_vha->host);
L
Linus Torvalds 已提交
3059

3060
	qla2x00_free_device(base_vha);
3061

3062
	scsi_host_put(base_vha->host);
L
Linus Torvalds 已提交
3063

3064
	if (IS_QLA82XX(ha)) {
3065 3066 3067 3068
		qla82xx_idc_lock(ha);
		qla82xx_clear_drv_active(ha);
		qla82xx_idc_unlock(ha);

3069 3070 3071 3072 3073 3074
		iounmap((device_reg_t __iomem *)ha->nx_pcibase);
		if (!ql2xdbwr)
			iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
	} else {
		if (ha->iobase)
			iounmap(ha->iobase);
L
Linus Torvalds 已提交
3075

3076 3077 3078
		if (ha->cregbase)
			iounmap(ha->cregbase);

3079 3080
		if (ha->mqiobase)
			iounmap(ha->mqiobase);
3081 3082 3083

		if (IS_QLA83XX(ha) && ha->msixbase)
			iounmap(ha->msixbase);
3084
	}
3085

3086 3087 3088
	pci_release_selected_regions(ha->pdev, ha->bars);
	kfree(ha);
	ha = NULL;
L
Linus Torvalds 已提交
3089

3090 3091
	pci_disable_pcie_error_reporting(pdev);

3092
	pci_disable_device(pdev);
L
Linus Torvalds 已提交
3093 3094 3095 3096
	pci_set_drvdata(pdev, NULL);
}

static void
3097
qla2x00_free_device(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
3098
{
3099
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
3100

3101 3102 3103 3104 3105 3106
	qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);

	/* Disable timer */
	if (vha->timer_active)
		qla2x00_stop_timer(vha);

3107
	qla2x00_stop_dpc_thread(vha);
3108

3109
	qla25xx_delete_queues(vha);
3110
	if (ha->flags.fce_enabled)
3111
		qla2x00_disable_fce_trace(vha, NULL, NULL);
3112

3113
	if (ha->eft)
3114
		qla2x00_disable_eft_trace(vha);
3115

3116
	/* Stop currently executing firmware. */
3117
	qla2x00_try_to_stop_firmware(vha);
L
Linus Torvalds 已提交
3118

3119 3120
	vha->flags.online = 0;

3121
	/* turn-off interrupts on the card */
3122 3123
	if (ha->interrupts_on) {
		vha->flags.init_done = 0;
3124
		ha->isp_ops->disable_intrs(ha);
3125
	}
3126

3127
	qla2x00_free_irqs(vha);
L
Linus Torvalds 已提交
3128

3129 3130
	qla2x00_free_fcports(vha);

3131
	qla2x00_mem_free(ha);
3132

3133 3134
	qla82xx_md_free(vha);

3135
	qla2x00_free_queues(ha);
L
Linus Torvalds 已提交
3136 3137
}

3138 3139 3140 3141 3142 3143
void qla2x00_free_fcports(struct scsi_qla_host *vha)
{
	fc_port_t *fcport, *tfcport;

	list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
		list_del(&fcport->list);
3144
		qla2x00_clear_loop_id(fcport);
3145 3146 3147 3148 3149
		kfree(fcport);
		fcport = NULL;
	}
}

3150
static inline void
3151
qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3152 3153 3154
    int defer)
{
	struct fc_rport *rport;
3155
	scsi_qla_host_t *base_vha;
3156
	unsigned long flags;
3157 3158 3159 3160 3161 3162

	if (!fcport->rport)
		return;

	rport = fcport->rport;
	if (defer) {
3163
		base_vha = pci_get_drvdata(vha->hw->pdev);
3164
		spin_lock_irqsave(vha->host->host_lock, flags);
3165
		fcport->drport = rport;
3166
		spin_unlock_irqrestore(vha->host->host_lock, flags);
3167 3168
		set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
		qla2xxx_wake_dpc(base_vha);
3169
	} else {
3170
		fc_remote_port_delete(rport);
3171 3172
		qlt_fc_port_deleted(vha, fcport);
	}
3173 3174
}

L
Linus Torvalds 已提交
3175 3176 3177 3178 3179 3180 3181 3182 3183
/*
 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
 *
 * Input: ha = adapter block pointer.  fcport = port structure pointer.
 *
 * Return: None.
 *
 * Context:
 */
3184
void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3185
    int do_login, int defer)
L
Linus Torvalds 已提交
3186
{
3187 3188 3189 3190 3191 3192
	if (IS_QLAFX00(vha->hw)) {
		qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
		qla2x00_schedule_rport_del(vha, fcport, defer);
		return;
	}

3193
	if (atomic_read(&fcport->state) == FCS_ONLINE &&
3194
	    vha->vp_idx == fcport->vha->vp_idx) {
3195
		qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3196 3197
		qla2x00_schedule_rport_del(vha, fcport, defer);
	}
A
Andrew Vasquez 已提交
3198
	/*
L
Linus Torvalds 已提交
3199 3200 3201 3202
	 * We may need to retry the login, so don't change the state of the
	 * port but do the retries.
	 */
	if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3203
		qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
L
Linus Torvalds 已提交
3204 3205 3206 3207 3208

	if (!do_login)
		return;

	if (fcport->login_retry == 0) {
3209 3210
		fcport->login_retry = vha->hw->login_retry_count;
		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
L
Linus Torvalds 已提交
3211

3212
		ql_dbg(ql_dbg_disc, vha, 0x2067,
3213 3214
		    "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
		    fcport->port_name, fcport->loop_id, fcport->login_retry);
L
Linus Torvalds 已提交
3215 3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226 3227 3228 3229 3230 3231
	}
}

/*
 * qla2x00_mark_all_devices_lost
 *	Updates fcport state when device goes offline.
 *
 * Input:
 *	ha = adapter block pointer.
 *	fcport = port structure pointer.
 *
 * Return:
 *	None.
 *
 * Context:
 */
void
3232
qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
L
Linus Torvalds 已提交
3233 3234 3235
{
	fc_port_t *fcport;

3236
	list_for_each_entry(fcport, &vha->vp_fcports, list) {
3237
		if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
L
Linus Torvalds 已提交
3238
			continue;
3239

L
Linus Torvalds 已提交
3240 3241 3242 3243 3244 3245
		/*
		 * No point in marking the device as lost, if the device is
		 * already DEAD.
		 */
		if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
			continue;
3246
		if (atomic_read(&fcport->state) == FCS_ONLINE) {
3247
			qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3248 3249
			if (defer)
				qla2x00_schedule_rport_del(vha, fcport, defer);
3250
			else if (vha->vp_idx == fcport->vha->vp_idx)
3251 3252
				qla2x00_schedule_rport_del(vha, fcport, defer);
		}
L
Linus Torvalds 已提交
3253 3254 3255 3256 3257 3258 3259 3260 3261
	}
}

/*
* qla2x00_mem_alloc
*      Allocates adapter memory.
*
* Returns:
*      0  = success.
3262
*      !0  = failure.
L
Linus Torvalds 已提交
3263
*/
3264
static int
3265 3266
qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
	struct req_que **req, struct rsp_que **rsp)
L
Linus Torvalds 已提交
3267 3268 3269
{
	char	name[16];

3270
	ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3271
		&ha->init_cb_dma, GFP_KERNEL);
3272
	if (!ha->init_cb)
3273
		goto fail;
3274

3275 3276 3277
	if (qlt_mem_alloc(ha) < 0)
		goto fail_free_init_cb;

3278 3279
	ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
		qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3280
	if (!ha->gid_list)
3281
		goto fail_free_tgt_mem;
L
Linus Torvalds 已提交
3282

3283 3284
	ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
	if (!ha->srb_mempool)
3285
		goto fail_free_gid_list;
3286

3287 3288 3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299
	if (IS_QLA82XX(ha)) {
		/* Allocate cache for CT6 Ctx. */
		if (!ctx_cachep) {
			ctx_cachep = kmem_cache_create("qla2xxx_ctx",
				sizeof(struct ct6_dsd), 0,
				SLAB_HWCACHE_ALIGN, NULL);
			if (!ctx_cachep)
				goto fail_free_gid_list;
		}
		ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
			ctx_cachep);
		if (!ha->ctx_mempool)
			goto fail_free_srb_mempool;
3300 3301 3302
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
		    "ctx_cachep=%p ctx_mempool=%p.\n",
		    ctx_cachep, ha->ctx_mempool);
3303 3304
	}

3305 3306 3307
	/* Get memory for cached NVRAM */
	ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
	if (!ha->nvram)
3308
		goto fail_free_ctx_mempool;
3309

3310 3311 3312 3313 3314 3315 3316
	snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
		ha->pdev->device);
	ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
		DMA_POOL_SIZE, 8, 0);
	if (!ha->s_dma_pool)
		goto fail_free_nvram;

3317 3318 3319 3320
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
	    "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
	    ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);

3321
	if (IS_QLA82XX(ha) || ql2xenabledif) {
3322 3323 3324
		ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
			DSD_LIST_DMA_POOL_SIZE, 8, 0);
		if (!ha->dl_dma_pool) {
3325 3326
			ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
			    "Failed to allocate memory for dl_dma_pool.\n");
3327 3328 3329 3330 3331 3332
			goto fail_s_dma_pool;
		}

		ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
			FCP_CMND_DMA_POOL_SIZE, 8, 0);
		if (!ha->fcp_cmnd_dma_pool) {
3333 3334
			ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
			    "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3335 3336
			goto fail_dl_dma_pool;
		}
3337 3338 3339
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
		    "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
		    ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3340 3341
	}

3342 3343
	/* Allocate memory for SNS commands */
	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3344
	/* Get consistent memory allocated for SNS commands */
3345
		ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3346
		sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3347
		if (!ha->sns_cmd)
3348
			goto fail_dma_pool;
3349
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3350
		    "sns_cmd: %p.\n", ha->sns_cmd);
3351
	} else {
3352
	/* Get consistent memory allocated for MS IOCB */
3353
		ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3354
			&ha->ms_iocb_dma);
3355
		if (!ha->ms_iocb)
3356 3357
			goto fail_dma_pool;
	/* Get consistent memory allocated for CT SNS commands */
3358
		ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3359
			sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3360 3361
		if (!ha->ct_sns)
			goto fail_free_ms_iocb;
3362 3363 3364
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
		    "ms_iocb=%p ct_sns=%p.\n",
		    ha->ms_iocb, ha->ct_sns);
L
Linus Torvalds 已提交
3365 3366
	}

3367
	/* Allocate memory for request ring */
3368 3369
	*req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
	if (!*req) {
3370 3371
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
		    "Failed to allocate memory for req.\n");
3372 3373
		goto fail_req;
	}
3374 3375 3376 3377 3378
	(*req)->length = req_len;
	(*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
		((*req)->length + 1) * sizeof(request_t),
		&(*req)->dma, GFP_KERNEL);
	if (!(*req)->ring) {
3379 3380
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
		    "Failed to allocate memory for req_ring.\n");
3381 3382 3383
		goto fail_req_ring;
	}
	/* Allocate memory for response ring */
3384 3385
	*rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
	if (!*rsp) {
3386 3387
		ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
		    "Failed to allocate memory for rsp.\n");
3388 3389
		goto fail_rsp;
	}
3390 3391 3392 3393 3394 3395
	(*rsp)->hw = ha;
	(*rsp)->length = rsp_len;
	(*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
		((*rsp)->length + 1) * sizeof(response_t),
		&(*rsp)->dma, GFP_KERNEL);
	if (!(*rsp)->ring) {
3396 3397
		ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
		    "Failed to allocate memory for rsp_ring.\n");
3398 3399
		goto fail_rsp_ring;
	}
3400 3401
	(*req)->rsp = *rsp;
	(*rsp)->req = *req;
3402 3403 3404 3405 3406
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
	    "req=%p req->length=%d req->ring=%p rsp=%p "
	    "rsp->length=%d rsp->ring=%p.\n",
	    *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
	    (*rsp)->ring);
3407 3408 3409
	/* Allocate memory for NVRAM data for vports */
	if (ha->nvram_npiv_size) {
		ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3410
		    ha->nvram_npiv_size, GFP_KERNEL);
3411
		if (!ha->npiv_info) {
3412 3413
			ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
			    "Failed to allocate memory for npiv_info.\n");
3414 3415 3416 3417
			goto fail_npiv_info;
		}
	} else
		ha->npiv_info = NULL;
3418

3419
	/* Get consistent memory allocated for EX-INIT-CB. */
3420
	if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) {
3421 3422 3423 3424
		ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
		    &ha->ex_init_cb_dma);
		if (!ha->ex_init_cb)
			goto fail_ex_init_cb;
3425 3426
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
		    "ex_init_cb=%p.\n", ha->ex_init_cb);
3427 3428
	}

3429 3430
	INIT_LIST_HEAD(&ha->gbl_dsd_list);

3431 3432 3433 3434 3435 3436
	/* Get consistent memory allocated for Async Port-Database. */
	if (!IS_FWI2_CAPABLE(ha)) {
		ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
			&ha->async_pd_dma);
		if (!ha->async_pd)
			goto fail_async_pd;
3437 3438
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
		    "async_pd=%p.\n", ha->async_pd);
3439 3440
	}

3441
	INIT_LIST_HEAD(&ha->vp_list);
3442 3443 3444 3445 3446 3447 3448 3449 3450 3451 3452 3453

	/* Allocate memory for our loop_id bitmap */
	ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
	    GFP_KERNEL);
	if (!ha->loop_id_map)
		goto fail_async_pd;
	else {
		qla2x00_set_reserved_loop_ids(ha);
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
		    "loop_id_map=%p. \n", ha->loop_id_map);
	}

3454 3455
	return 1;

3456 3457
fail_async_pd:
	dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3458 3459
fail_ex_init_cb:
	kfree(ha->npiv_info);
3460 3461 3462 3463 3464
fail_npiv_info:
	dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
		sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
	(*rsp)->ring = NULL;
	(*rsp)->dma = 0;
3465
fail_rsp_ring:
3466
	kfree(*rsp);
3467
fail_rsp:
3468 3469 3470 3471
	dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
		sizeof(request_t), (*req)->ring, (*req)->dma);
	(*req)->ring = NULL;
	(*req)->dma = 0;
3472
fail_req_ring:
3473
	kfree(*req);
3474 3475 3476 3477 3478
fail_req:
	dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
		ha->ct_sns, ha->ct_sns_dma);
	ha->ct_sns = NULL;
	ha->ct_sns_dma = 0;
3479 3480 3481 3482
fail_free_ms_iocb:
	dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
	ha->ms_iocb = NULL;
	ha->ms_iocb_dma = 0;
3483
fail_dma_pool:
3484
	if (IS_QLA82XX(ha) || ql2xenabledif) {
3485 3486 3487 3488
		dma_pool_destroy(ha->fcp_cmnd_dma_pool);
		ha->fcp_cmnd_dma_pool = NULL;
	}
fail_dl_dma_pool:
3489
	if (IS_QLA82XX(ha) || ql2xenabledif) {
3490 3491 3492 3493
		dma_pool_destroy(ha->dl_dma_pool);
		ha->dl_dma_pool = NULL;
	}
fail_s_dma_pool:
3494 3495
	dma_pool_destroy(ha->s_dma_pool);
	ha->s_dma_pool = NULL;
3496 3497 3498
fail_free_nvram:
	kfree(ha->nvram);
	ha->nvram = NULL;
3499 3500 3501
fail_free_ctx_mempool:
	mempool_destroy(ha->ctx_mempool);
	ha->ctx_mempool = NULL;
3502 3503 3504 3505
fail_free_srb_mempool:
	mempool_destroy(ha->srb_mempool);
	ha->srb_mempool = NULL;
fail_free_gid_list:
3506 3507
	dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
	ha->gid_list,
3508
	ha->gid_list_dma);
3509 3510
	ha->gid_list = NULL;
	ha->gid_list_dma = 0;
3511 3512
fail_free_tgt_mem:
	qlt_mem_free(ha);
3513 3514 3515 3516 3517
fail_free_init_cb:
	dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
	ha->init_cb_dma);
	ha->init_cb = NULL;
	ha->init_cb_dma = 0;
3518
fail:
3519 3520
	ql_log(ql_log_fatal, NULL, 0x0030,
	    "Memory allocation failure.\n");
3521
	return -ENOMEM;
L
Linus Torvalds 已提交
3522 3523 3524
}

/*
3525 3526
* qla2x00_free_fw_dump
*	Frees fw dump stuff.
L
Linus Torvalds 已提交
3527 3528
*
* Input:
3529
*	ha = adapter block pointer.
L
Linus Torvalds 已提交
3530
*/
A
Adrian Bunk 已提交
3531
static void
3532
qla2x00_free_fw_dump(struct qla_hw_data *ha)
L
Linus Torvalds 已提交
3533
{
3534 3535
	if (ha->fce)
		dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
3536
		    ha->fce_dma);
3537

3538 3539 3540
	if (ha->fw_dump) {
		if (ha->eft)
			dma_free_coherent(&ha->pdev->dev,
3541
			    ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
3542 3543
		vfree(ha->fw_dump);
	}
3544 3545 3546 3547 3548 3549 3550 3551 3552 3553 3554 3555 3556 3557 3558 3559 3560 3561 3562 3563 3564
	ha->fce = NULL;
	ha->fce_dma = 0;
	ha->eft = NULL;
	ha->eft_dma = 0;
	ha->fw_dump = NULL;
	ha->fw_dumped = 0;
	ha->fw_dump_reading = 0;
}

/*
* qla2x00_mem_free
*      Frees all adapter allocated memory.
*
* Input:
*      ha = adapter block pointer.
*/
static void
qla2x00_mem_free(struct qla_hw_data *ha)
{
	qla2x00_free_fw_dump(ha);

3565 3566 3567 3568
	if (ha->mctp_dump)
		dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
		    ha->mctp_dump_dma);

3569 3570
	if (ha->srb_mempool)
		mempool_destroy(ha->srb_mempool);
3571

3572 3573 3574 3575
	if (ha->dcbx_tlv)
		dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
		    ha->dcbx_tlv, ha->dcbx_tlv_dma);

3576 3577 3578 3579
	if (ha->xgmac_data)
		dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
		    ha->xgmac_data, ha->xgmac_data_dma);

L
Linus Torvalds 已提交
3580 3581
	if (ha->sns_cmd)
		dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3582
		ha->sns_cmd, ha->sns_cmd_dma);
L
Linus Torvalds 已提交
3583 3584 3585

	if (ha->ct_sns)
		dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3586
		ha->ct_sns, ha->ct_sns_dma);
L
Linus Torvalds 已提交
3587

3588 3589 3590
	if (ha->sfp_data)
		dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);

L
Linus Torvalds 已提交
3591 3592 3593
	if (ha->ms_iocb)
		dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);

3594
	if (ha->ex_init_cb)
3595 3596
		dma_pool_free(ha->s_dma_pool,
			ha->ex_init_cb, ha->ex_init_cb_dma);
3597

3598 3599 3600
	if (ha->async_pd)
		dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);

L
Linus Torvalds 已提交
3601 3602 3603 3604
	if (ha->s_dma_pool)
		dma_pool_destroy(ha->s_dma_pool);

	if (ha->gid_list)
3605 3606
		dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
		ha->gid_list, ha->gid_list_dma);
L
Linus Torvalds 已提交
3607

3608 3609 3610 3611 3612 3613 3614 3615 3616 3617 3618 3619 3620 3621 3622 3623 3624 3625 3626 3627 3628 3629 3630 3631
	if (IS_QLA82XX(ha)) {
		if (!list_empty(&ha->gbl_dsd_list)) {
			struct dsd_dma *dsd_ptr, *tdsd_ptr;

			/* clean up allocated prev pool */
			list_for_each_entry_safe(dsd_ptr,
				tdsd_ptr, &ha->gbl_dsd_list, list) {
				dma_pool_free(ha->dl_dma_pool,
				dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
				list_del(&dsd_ptr->list);
				kfree(dsd_ptr);
			}
		}
	}

	if (ha->dl_dma_pool)
		dma_pool_destroy(ha->dl_dma_pool);

	if (ha->fcp_cmnd_dma_pool)
		dma_pool_destroy(ha->fcp_cmnd_dma_pool);

	if (ha->ctx_mempool)
		mempool_destroy(ha->ctx_mempool);

3632 3633
	qlt_mem_free(ha);

3634 3635
	if (ha->init_cb)
		dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3636
			ha->init_cb, ha->init_cb_dma);
3637 3638
	vfree(ha->optrom_buffer);
	kfree(ha->nvram);
3639
	kfree(ha->npiv_info);
3640
	kfree(ha->swl);
3641
	kfree(ha->loop_id_map);
L
Linus Torvalds 已提交
3642

3643
	ha->srb_mempool = NULL;
3644
	ha->ctx_mempool = NULL;
L
Linus Torvalds 已提交
3645 3646 3647 3648 3649 3650 3651 3652
	ha->sns_cmd = NULL;
	ha->sns_cmd_dma = 0;
	ha->ct_sns = NULL;
	ha->ct_sns_dma = 0;
	ha->ms_iocb = NULL;
	ha->ms_iocb_dma = 0;
	ha->init_cb = NULL;
	ha->init_cb_dma = 0;
3653 3654
	ha->ex_init_cb = NULL;
	ha->ex_init_cb_dma = 0;
3655 3656
	ha->async_pd = NULL;
	ha->async_pd_dma = 0;
L
Linus Torvalds 已提交
3657 3658

	ha->s_dma_pool = NULL;
3659 3660
	ha->dl_dma_pool = NULL;
	ha->fcp_cmnd_dma_pool = NULL;
L
Linus Torvalds 已提交
3661 3662 3663

	ha->gid_list = NULL;
	ha->gid_list_dma = 0;
3664 3665 3666 3667

	ha->tgt.atio_ring = NULL;
	ha->tgt.atio_dma = 0;
	ha->tgt.tgt_vp_map = NULL;
3668
}
L
Linus Torvalds 已提交
3669

3670 3671 3672 3673 3674
struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
						struct qla_hw_data *ha)
{
	struct Scsi_Host *host;
	struct scsi_qla_host *vha = NULL;
3675

3676 3677
	host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
	if (host == NULL) {
3678 3679
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
		    "Failed to allocate host from the scsi layer, aborting.\n");
3680 3681 3682 3683 3684 3685 3686 3687 3688 3689 3690 3691 3692 3693 3694
		goto fail;
	}

	/* Clear our data area */
	vha = shost_priv(host);
	memset(vha, 0, sizeof(scsi_qla_host_t));

	vha->host = host;
	vha->host_no = host->host_no;
	vha->hw = ha;

	INIT_LIST_HEAD(&vha->vp_fcports);
	INIT_LIST_HEAD(&vha->work_list);
	INIT_LIST_HEAD(&vha->list);

3695 3696
	spin_lock_init(&vha->work_lock);

3697
	sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3698 3699 3700 3701 3702
	ql_dbg(ql_dbg_init, vha, 0x0041,
	    "Allocated the host=%p hw=%p vha=%p dev_name=%s",
	    vha->host, vha->hw, vha,
	    dev_name(&(ha->pdev->dev)));

3703 3704 3705 3706
	return vha;

fail:
	return vha;
L
Linus Torvalds 已提交
3707 3708
}

3709
static struct qla_work_evt *
3710
qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3711 3712
{
	struct qla_work_evt *e;
3713 3714 3715 3716 3717
	uint8_t bail;

	QLA_VHA_MARK_BUSY(vha, bail);
	if (bail)
		return NULL;
3718

3719
	e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3720 3721
	if (!e) {
		QLA_VHA_MARK_NOT_BUSY(vha);
3722
		return NULL;
3723
	}
3724 3725 3726 3727 3728 3729 3730

	INIT_LIST_HEAD(&e->list);
	e->type = type;
	e->flags = QLA_EVT_FLAG_FREE;
	return e;
}

3731
static int
3732
qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3733
{
3734
	unsigned long flags;
3735

3736
	spin_lock_irqsave(&vha->work_lock, flags);
3737
	list_add_tail(&e->list, &vha->work_list);
3738
	spin_unlock_irqrestore(&vha->work_lock, flags);
3739
	qla2xxx_wake_dpc(vha);
3740

3741 3742 3743 3744
	return QLA_SUCCESS;
}

int
3745
qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3746 3747 3748 3749
    u32 data)
{
	struct qla_work_evt *e;

3750
	e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3751 3752 3753 3754 3755
	if (!e)
		return QLA_FUNCTION_FAILED;

	e->u.aen.code = code;
	e->u.aen.data = data;
3756
	return qla2x00_post_work(vha, e);
3757 3758
}

3759 3760 3761 3762 3763
int
qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
{
	struct qla_work_evt *e;

3764
	e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3765 3766 3767 3768
	if (!e)
		return QLA_FUNCTION_FAILED;

	memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3769
	return qla2x00_post_work(vha, e);
3770 3771
}

3772 3773 3774 3775 3776 3777 3778 3779 3780 3781 3782 3783 3784 3785 3786 3787 3788 3789 3790 3791 3792 3793 3794
#define qla2x00_post_async_work(name, type)	\
int qla2x00_post_async_##name##_work(		\
    struct scsi_qla_host *vha,			\
    fc_port_t *fcport, uint16_t *data)		\
{						\
	struct qla_work_evt *e;			\
						\
	e = qla2x00_alloc_work(vha, type);	\
	if (!e)					\
		return QLA_FUNCTION_FAILED;	\
						\
	e->u.logio.fcport = fcport;		\
	if (data) {				\
		e->u.logio.data[0] = data[0];	\
		e->u.logio.data[1] = data[1];	\
	}					\
	return qla2x00_post_work(vha, e);	\
}

qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3795 3796
qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3797

3798 3799 3800 3801 3802 3803 3804 3805 3806 3807 3808 3809 3810 3811 3812 3813 3814 3815 3816 3817 3818 3819 3820 3821 3822 3823 3824 3825 3826 3827 3828
int
qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
{
	struct qla_work_evt *e;

	e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
	if (!e)
		return QLA_FUNCTION_FAILED;

	e->u.uevent.code = code;
	return qla2x00_post_work(vha, e);
}

static void
qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
{
	char event_string[40];
	char *envp[] = { event_string, NULL };

	switch (code) {
	case QLA_UEVENT_CODE_FW_DUMP:
		snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
		    vha->host_no);
		break;
	default:
		/* do nothing */
		break;
	}
	kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
}

3829 3830 3831 3832 3833 3834 3835 3836 3837 3838 3839 3840 3841 3842 3843 3844
int
qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
			uint32_t *data, int cnt)
{
	struct qla_work_evt *e;

	e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
	if (!e)
		return QLA_FUNCTION_FAILED;

	e->u.aenfx.evtcode = evtcode;
	e->u.aenfx.count = cnt;
	memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
	return qla2x00_post_work(vha, e);
}

3845
void
3846
qla2x00_do_work(struct scsi_qla_host *vha)
3847
{
3848 3849 3850
	struct qla_work_evt *e, *tmp;
	unsigned long flags;
	LIST_HEAD(work);
3851

3852 3853 3854 3855 3856
	spin_lock_irqsave(&vha->work_lock, flags);
	list_splice_init(&vha->work_list, &work);
	spin_unlock_irqrestore(&vha->work_lock, flags);

	list_for_each_entry_safe(e, tmp, &work, list) {
3857 3858 3859 3860
		list_del_init(&e->list);

		switch (e->type) {
		case QLA_EVT_AEN:
3861
			fc_host_post_event(vha->host, fc_get_event_number(),
3862 3863
			    e->u.aen.code, e->u.aen.data);
			break;
3864 3865 3866
		case QLA_EVT_IDC_ACK:
			qla81xx_idc_ack(vha, e->u.idc_ack.mb);
			break;
3867 3868 3869 3870 3871 3872 3873 3874 3875 3876 3877 3878 3879 3880 3881
		case QLA_EVT_ASYNC_LOGIN:
			qla2x00_async_login(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
		case QLA_EVT_ASYNC_LOGIN_DONE:
			qla2x00_async_login_done(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
		case QLA_EVT_ASYNC_LOGOUT:
			qla2x00_async_logout(vha, e->u.logio.fcport);
			break;
		case QLA_EVT_ASYNC_LOGOUT_DONE:
			qla2x00_async_logout_done(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
3882 3883 3884 3885 3886 3887 3888 3889
		case QLA_EVT_ASYNC_ADISC:
			qla2x00_async_adisc(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
		case QLA_EVT_ASYNC_ADISC_DONE:
			qla2x00_async_adisc_done(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
3890 3891 3892
		case QLA_EVT_UEVENT:
			qla2x00_uevent_emit(vha, e->u.uevent.code);
			break;
3893 3894 3895
		case QLA_EVT_AENFX:
			qlafx00_process_aen(vha, e);
			break;
3896 3897 3898
		}
		if (e->flags & QLA_EVT_FLAG_FREE)
			kfree(e);
3899 3900 3901

		/* For each work completed decrement vha ref count */
		QLA_VHA_MARK_NOT_BUSY(vha);
3902 3903
	}
}
3904

3905 3906 3907 3908 3909 3910
/* Relogins all the fcports of a vport
 * Context: dpc thread
 */
void qla2x00_relogin(struct scsi_qla_host *vha)
{
	fc_port_t       *fcport;
3911
	int status;
3912 3913
	uint16_t        next_loopid = 0;
	struct qla_hw_data *ha = vha->hw;
3914
	uint16_t data[2];
3915 3916 3917 3918 3919 3920

	list_for_each_entry(fcport, &vha->vp_fcports, list) {
	/*
	 * If the port is not ONLINE then try to login
	 * to it if we haven't run out of retries.
	 */
3921 3922
		if (atomic_read(&fcport->state) != FCS_ONLINE &&
		    fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
3923
			fcport->login_retry--;
3924
			if (fcport->flags & FCF_FABRIC_DEVICE) {
3925
				if (fcport->flags & FCF_FCP2_DEVICE)
3926 3927 3928 3929 3930 3931
					ha->isp_ops->fabric_logout(vha,
							fcport->loop_id,
							fcport->d_id.b.domain,
							fcport->d_id.b.area,
							fcport->d_id.b.al_pa);

3932 3933 3934 3935 3936 3937 3938 3939 3940 3941 3942
				if (fcport->loop_id == FC_NO_LOOP_ID) {
					fcport->loop_id = next_loopid =
					    ha->min_external_loopid;
					status = qla2x00_find_new_loop_id(
					    vha, fcport);
					if (status != QLA_SUCCESS) {
						/* Ran out of IDs to use */
						break;
					}
				}

3943
				if (IS_ALOGIO_CAPABLE(ha)) {
3944
					fcport->flags |= FCF_ASYNC_SENT;
3945 3946 3947 3948 3949 3950 3951 3952
					data[0] = 0;
					data[1] = QLA_LOGIO_LOGIN_RETRIED;
					status = qla2x00_post_async_login_work(
					    vha, fcport, data);
					if (status == QLA_SUCCESS)
						continue;
					/* Attempt a retry. */
					status = 1;
3953
				} else {
3954 3955
					status = qla2x00_fabric_login(vha,
					    fcport, &next_loopid);
3956 3957 3958 3959 3960 3961 3962 3963
					if (status ==  QLA_SUCCESS) {
						int status2;
						uint8_t opts;

						opts = 0;
						if (fcport->flags &
						    FCF_FCP2_DEVICE)
							opts |= BIT_1;
3964 3965 3966
						status2 =
						    qla2x00_get_port_database(
							vha, fcport, opts);
3967 3968 3969 3970
						if (status2 != QLA_SUCCESS)
							status = 1;
					}
				}
3971 3972 3973 3974 3975 3976 3977
			} else
				status = qla2x00_local_device_login(vha,
								fcport);

			if (status == QLA_SUCCESS) {
				fcport->old_loop_id = fcport->loop_id;

3978 3979 3980
				ql_dbg(ql_dbg_disc, vha, 0x2003,
				    "Port login OK: logged in ID 0x%x.\n",
				    fcport->loop_id);
3981 3982 3983 3984 3985 3986

				qla2x00_update_fcport(vha, fcport);

			} else if (status == 1) {
				set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
				/* retry the login again */
3987 3988 3989
				ql_dbg(ql_dbg_disc, vha, 0x2007,
				    "Retrying %d login again loop_id 0x%x.\n",
				    fcport->login_retry, fcport->loop_id);
3990 3991 3992 3993 3994
			} else {
				fcport->login_retry = 0;
			}

			if (fcport->login_retry == 0 && status != QLA_SUCCESS)
3995
				qla2x00_clear_loop_id(fcport);
3996 3997 3998
		}
		if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
			break;
3999 4000 4001
	}
}

4002 4003 4004 4005 4006 4007 4008 4009 4010 4011 4012 4013 4014 4015 4016 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028 4029 4030 4031 4032 4033 4034 4035 4036 4037 4038 4039 4040 4041 4042 4043
/* Schedule work on any of the dpc-workqueues */
void
qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
{
	struct qla_hw_data *ha = base_vha->hw;

	switch (work_code) {
	case MBA_IDC_AEN: /* 0x8200 */
		if (ha->dpc_lp_wq)
			queue_work(ha->dpc_lp_wq, &ha->idc_aen);
		break;

	case QLA83XX_NIC_CORE_RESET: /* 0x1 */
		if (!ha->flags.nic_core_reset_hdlr_active) {
			if (ha->dpc_hp_wq)
				queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
		} else
			ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
			    "NIC Core reset is already active. Skip "
			    "scheduling it again.\n");
		break;
	case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
		if (ha->dpc_hp_wq)
			queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
		break;
	case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
		if (ha->dpc_hp_wq)
			queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
		break;
	default:
		ql_log(ql_log_warn, base_vha, 0xb05f,
		    "Unknow work-code=0x%x.\n", work_code);
	}

	return;
}

/* Work: Perform NIC Core Unrecoverable state handling */
void
qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
{
	struct qla_hw_data *ha =
4044
		container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4045 4046 4047 4048 4049 4050 4051 4052 4053 4054 4055 4056 4057 4058 4059 4060 4061 4062 4063 4064 4065
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
	uint32_t dev_state = 0;

	qla83xx_idc_lock(base_vha, 0);
	qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
	qla83xx_reset_ownership(base_vha);
	if (ha->flags.nic_core_reset_owner) {
		ha->flags.nic_core_reset_owner = 0;
		qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
		    QLA8XXX_DEV_FAILED);
		ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
		qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
	}
	qla83xx_idc_unlock(base_vha, 0);
}

/* Work: Execute IDC state handler */
void
qla83xx_idc_state_handler_work(struct work_struct *work)
{
	struct qla_hw_data *ha =
4066
		container_of(work, struct qla_hw_data, idc_state_handler);
4067 4068 4069 4070 4071 4072 4073 4074 4075 4076 4077
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
	uint32_t dev_state = 0;

	qla83xx_idc_lock(base_vha, 0);
	qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
	if (dev_state == QLA8XXX_DEV_FAILED ||
			dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
		qla83xx_idc_state_handler(base_vha);
	qla83xx_idc_unlock(base_vha, 0);
}

4078
static int
4079 4080 4081 4082 4083 4084 4085 4086 4087 4088 4089 4090 4091 4092 4093 4094 4095 4096 4097 4098 4099 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 4110 4111 4112 4113 4114 4115
qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
{
	int rval = QLA_SUCCESS;
	unsigned long heart_beat_wait = jiffies + (1 * HZ);
	uint32_t heart_beat_counter1, heart_beat_counter2;

	do {
		if (time_after(jiffies, heart_beat_wait)) {
			ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
			    "Nic Core f/w is not alive.\n");
			rval = QLA_FUNCTION_FAILED;
			break;
		}

		qla83xx_idc_lock(base_vha, 0);
		qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
		    &heart_beat_counter1);
		qla83xx_idc_unlock(base_vha, 0);
		msleep(100);
		qla83xx_idc_lock(base_vha, 0);
		qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
		    &heart_beat_counter2);
		qla83xx_idc_unlock(base_vha, 0);
	} while (heart_beat_counter1 == heart_beat_counter2);

	return rval;
}

/* Work: Perform NIC Core Reset handling */
void
qla83xx_nic_core_reset_work(struct work_struct *work)
{
	struct qla_hw_data *ha =
		container_of(work, struct qla_hw_data, nic_core_reset);
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
	uint32_t dev_state = 0;

4116 4117 4118 4119 4120 4121 4122
	if (IS_QLA2031(ha)) {
		if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
			ql_log(ql_log_warn, base_vha, 0xb081,
			    "Failed to dump mctp\n");
		return;
	}

4123 4124 4125 4126 4127 4128 4129 4130 4131 4132 4133 4134 4135 4136 4137 4138 4139 4140 4141 4142 4143 4144 4145 4146 4147 4148 4149 4150 4151 4152 4153 4154 4155 4156 4157 4158 4159 4160 4161 4162 4163 4164 4165 4166 4167 4168 4169 4170 4171 4172 4173 4174 4175 4176 4177 4178 4179 4180 4181 4182 4183 4184 4185 4186 4187 4188 4189 4190 4191 4192 4193 4194 4195
	if (!ha->flags.nic_core_reset_hdlr_active) {
		if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
			qla83xx_idc_lock(base_vha, 0);
			qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
			    &dev_state);
			qla83xx_idc_unlock(base_vha, 0);
			if (dev_state != QLA8XXX_DEV_NEED_RESET) {
				ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
				    "Nic Core f/w is alive.\n");
				return;
			}
		}

		ha->flags.nic_core_reset_hdlr_active = 1;
		if (qla83xx_nic_core_reset(base_vha)) {
			/* NIC Core reset failed. */
			ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
			    "NIC Core reset failed.\n");
		}
		ha->flags.nic_core_reset_hdlr_active = 0;
	}
}

/* Work: Handle 8200 IDC aens */
void
qla83xx_service_idc_aen(struct work_struct *work)
{
	struct qla_hw_data *ha =
		container_of(work, struct qla_hw_data, idc_aen);
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
	uint32_t dev_state, idc_control;

	qla83xx_idc_lock(base_vha, 0);
	qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
	qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
	qla83xx_idc_unlock(base_vha, 0);
	if (dev_state == QLA8XXX_DEV_NEED_RESET) {
		if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
			ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
			    "Application requested NIC Core Reset.\n");
			qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
		} else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
		    QLA_SUCCESS) {
			ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
			    "Other protocol driver requested NIC Core Reset.\n");
			qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
		}
	} else if (dev_state == QLA8XXX_DEV_FAILED ||
			dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
		qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
	}
}

static void
qla83xx_wait_logic(void)
{
	int i;

	/* Yield CPU */
	if (!in_interrupt()) {
		/*
		 * Wait about 200ms before retrying again.
		 * This controls the number of retries for single
		 * lock operation.
		 */
		msleep(100);
		schedule();
	} else {
		for (i = 0; i < 20; i++)
			cpu_relax(); /* This a nop instr on i386 */
	}
}

4196
static int
4197 4198 4199 4200 4201 4202 4203
qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
{
	int rval;
	uint32_t data;
	uint32_t idc_lck_rcvry_stage_mask = 0x3;
	uint32_t idc_lck_rcvry_owner_mask = 0x3c;
	struct qla_hw_data *ha = base_vha->hw;
4204 4205
	ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
	    "Trying force recovery of the IDC lock.\n");
4206 4207 4208 4209 4210 4211 4212 4213 4214 4215 4216 4217 4218 4219 4220 4221 4222 4223 4224 4225 4226 4227 4228 4229 4230 4231 4232 4233 4234 4235 4236 4237 4238 4239 4240 4241 4242 4243 4244 4245 4246 4247 4248 4249 4250 4251 4252 4253 4254 4255 4256

	rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
	if (rval)
		return rval;

	if ((data & idc_lck_rcvry_stage_mask) > 0) {
		return QLA_SUCCESS;
	} else {
		data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
		rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
		    data);
		if (rval)
			return rval;

		msleep(200);

		rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
		    &data);
		if (rval)
			return rval;

		if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
			data &= (IDC_LOCK_RECOVERY_STAGE2 |
					~(idc_lck_rcvry_stage_mask));
			rval = qla83xx_wr_reg(base_vha,
			    QLA83XX_IDC_LOCK_RECOVERY, data);
			if (rval)
				return rval;

			/* Forcefully perform IDC UnLock */
			rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
			    &data);
			if (rval)
				return rval;
			/* Clear lock-id by setting 0xff */
			rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
			    0xff);
			if (rval)
				return rval;
			/* Clear lock-recovery by setting 0x0 */
			rval = qla83xx_wr_reg(base_vha,
			    QLA83XX_IDC_LOCK_RECOVERY, 0x0);
			if (rval)
				return rval;
		} else
			return QLA_SUCCESS;
	}

	return rval;
}

4257
static int
4258 4259 4260 4261 4262 4263 4264 4265 4266 4267 4268 4269 4270 4271 4272 4273 4274 4275 4276 4277 4278 4279 4280 4281 4282 4283 4284 4285 4286 4287 4288 4289 4290 4291 4292 4293 4294 4295 4296
qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
{
	int rval = QLA_SUCCESS;
	uint32_t o_drv_lockid, n_drv_lockid;
	unsigned long lock_recovery_timeout;

	lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
retry_lockid:
	rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
	if (rval)
		goto exit;

	/* MAX wait time before forcing IDC Lock recovery = 2 secs */
	if (time_after_eq(jiffies, lock_recovery_timeout)) {
		if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
			return QLA_SUCCESS;
		else
			return QLA_FUNCTION_FAILED;
	}

	rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
	if (rval)
		goto exit;

	if (o_drv_lockid == n_drv_lockid) {
		qla83xx_wait_logic();
		goto retry_lockid;
	} else
		return QLA_SUCCESS;

exit:
	return rval;
}

void
qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
{
	uint16_t options = (requester_id << 15) | BIT_6;
	uint32_t data;
4297
	uint32_t lock_owner;
4298 4299 4300 4301 4302 4303 4304 4305 4306 4307 4308
	struct qla_hw_data *ha = base_vha->hw;

	/* IDC-lock implementation using driver-lock/lock-id remote registers */
retry_lock:
	if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
	    == QLA_SUCCESS) {
		if (data) {
			/* Setting lock-id to our function-number */
			qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
			    ha->portnum);
		} else {
4309 4310
			qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
			    &lock_owner);
4311
			ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4312 4313
			    "Failed to acquire IDC lock, acquired by %d, "
			    "retrying...\n", lock_owner);
4314 4315 4316 4317 4318 4319 4320 4321 4322 4323 4324 4325 4326 4327 4328 4329 4330 4331 4332 4333 4334 4335 4336 4337 4338 4339 4340 4341 4342 4343 4344 4345 4346 4347 4348 4349 4350 4351 4352 4353 4354 4355 4356 4357 4358 4359 4360 4361 4362 4363 4364 4365 4366 4367 4368 4369 4370 4371 4372 4373 4374 4375 4376 4377 4378 4379 4380 4381 4382 4383 4384 4385 4386 4387 4388 4389 4390 4391 4392 4393 4394 4395 4396 4397 4398 4399 4400 4401 4402 4403 4404 4405 4406 4407 4408 4409 4410 4411 4412 4413 4414 4415 4416 4417 4418 4419 4420 4421 4422 4423 4424 4425 4426 4427 4428 4429 4430 4431 4432 4433 4434 4435 4436 4437 4438 4439 4440 4441 4442 4443 4444 4445 4446 4447 4448 4449 4450 4451 4452 4453 4454 4455 4456 4457 4458 4459

			/* Retry/Perform IDC-Lock recovery */
			if (qla83xx_idc_lock_recovery(base_vha)
			    == QLA_SUCCESS) {
				qla83xx_wait_logic();
				goto retry_lock;
			} else
				ql_log(ql_log_warn, base_vha, 0xb075,
				    "IDC Lock recovery FAILED.\n");
		}

	}

	return;

	/* XXX: IDC-lock implementation using access-control mbx */
retry_lock2:
	if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
		ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
		    "Failed to acquire IDC lock. retrying...\n");
		/* Retry/Perform IDC-Lock recovery */
		if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
			qla83xx_wait_logic();
			goto retry_lock2;
		} else
			ql_log(ql_log_warn, base_vha, 0xb076,
			    "IDC Lock recovery FAILED.\n");
	}

	return;
}

void
qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
{
	uint16_t options = (requester_id << 15) | BIT_7, retry;
	uint32_t data;
	struct qla_hw_data *ha = base_vha->hw;

	/* IDC-unlock implementation using driver-unlock/lock-id
	 * remote registers
	 */
	retry = 0;
retry_unlock:
	if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
	    == QLA_SUCCESS) {
		if (data == ha->portnum) {
			qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
			/* Clearing lock-id by setting 0xff */
			qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
		} else if (retry < 10) {
			/* SV: XXX: IDC unlock retrying needed here? */

			/* Retry for IDC-unlock */
			qla83xx_wait_logic();
			retry++;
			ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
			    "Failed to release IDC lock, retyring=%d\n", retry);
			goto retry_unlock;
		}
	} else if (retry < 10) {
		/* Retry for IDC-unlock */
		qla83xx_wait_logic();
		retry++;
		ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
		    "Failed to read drv-lockid, retyring=%d\n", retry);
		goto retry_unlock;
	}

	return;

	/* XXX: IDC-unlock implementation using access-control mbx */
	retry = 0;
retry_unlock2:
	if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
		if (retry < 10) {
			/* Retry for IDC-unlock */
			qla83xx_wait_logic();
			retry++;
			ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
			    "Failed to release IDC lock, retyring=%d\n", retry);
			goto retry_unlock2;
		}
	}

	return;
}

int
__qla83xx_set_drv_presence(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;
	struct qla_hw_data *ha = vha->hw;
	uint32_t drv_presence;

	rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
	if (rval == QLA_SUCCESS) {
		drv_presence |= (1 << ha->portnum);
		rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
		    drv_presence);
	}

	return rval;
}

int
qla83xx_set_drv_presence(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;

	qla83xx_idc_lock(vha, 0);
	rval = __qla83xx_set_drv_presence(vha);
	qla83xx_idc_unlock(vha, 0);

	return rval;
}

int
__qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;
	struct qla_hw_data *ha = vha->hw;
	uint32_t drv_presence;

	rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
	if (rval == QLA_SUCCESS) {
		drv_presence &= ~(1 << ha->portnum);
		rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
		    drv_presence);
	}

	return rval;
}

int
qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;

	qla83xx_idc_lock(vha, 0);
	rval = __qla83xx_clear_drv_presence(vha);
	qla83xx_idc_unlock(vha, 0);

	return rval;
}

4460
static void
4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471
qla83xx_need_reset_handler(scsi_qla_host_t *vha)
{
	struct qla_hw_data *ha = vha->hw;
	uint32_t drv_ack, drv_presence;
	unsigned long ack_timeout;

	/* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
	ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
	while (1) {
		qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
		qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4472
		if ((drv_ack & drv_presence) == drv_presence)
4473 4474 4475 4476 4477 4478 4479 4480 4481 4482 4483 4484 4485 4486 4487 4488 4489 4490 4491 4492 4493 4494 4495 4496 4497 4498
			break;

		if (time_after_eq(jiffies, ack_timeout)) {
			ql_log(ql_log_warn, vha, 0xb067,
			    "RESET ACK TIMEOUT! drv_presence=0x%x "
			    "drv_ack=0x%x\n", drv_presence, drv_ack);
			/*
			 * The function(s) which did not ack in time are forced
			 * to withdraw any further participation in the IDC
			 * reset.
			 */
			if (drv_ack != drv_presence)
				qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
				    drv_ack);
			break;
		}

		qla83xx_idc_unlock(vha, 0);
		msleep(1000);
		qla83xx_idc_lock(vha, 0);
	}

	qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
	ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
}

4499
static int
4500 4501 4502 4503 4504 4505 4506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516 4517 4518 4519 4520 4521 4522 4523 4524 4525 4526 4527 4528 4529 4530 4531 4532 4533 4534 4535 4536 4537 4538 4539 4540 4541 4542 4543 4544 4545 4546 4547 4548 4549 4550 4551 4552 4553 4554 4555 4556 4557 4558 4559 4560 4561 4562 4563 4564 4565 4566 4567 4568 4569 4570 4571 4572 4573 4574 4575 4576 4577 4578 4579 4580 4581 4582 4583 4584 4585 4586 4587 4588 4589 4590 4591 4592 4593 4594 4595 4596 4597 4598 4599 4600 4601 4602 4603 4604 4605 4606 4607 4608 4609 4610 4611 4612 4613 4614 4615 4616 4617 4618 4619 4620 4621 4622 4623 4624 4625 4626 4627 4628 4629 4630 4631 4632 4633 4634 4635 4636 4637 4638 4639 4640 4641 4642 4643 4644 4645
qla83xx_device_bootstrap(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;
	uint32_t idc_control;

	qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
	ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");

	/* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
	__qla83xx_get_idc_control(vha, &idc_control);
	idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
	__qla83xx_set_idc_control(vha, 0);

	qla83xx_idc_unlock(vha, 0);
	rval = qla83xx_restart_nic_firmware(vha);
	qla83xx_idc_lock(vha, 0);

	if (rval != QLA_SUCCESS) {
		ql_log(ql_log_fatal, vha, 0xb06a,
		    "Failed to restart NIC f/w.\n");
		qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
		ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
	} else {
		ql_dbg(ql_dbg_p3p, vha, 0xb06c,
		    "Success in restarting nic f/w.\n");
		qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
		ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
	}

	return rval;
}

/* Assumes idc_lock always held on entry */
int
qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
{
	struct qla_hw_data *ha = base_vha->hw;
	int rval = QLA_SUCCESS;
	unsigned long dev_init_timeout;
	uint32_t dev_state;

	/* Wait for MAX-INIT-TIMEOUT for the device to go ready */
	dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);

	while (1) {

		if (time_after_eq(jiffies, dev_init_timeout)) {
			ql_log(ql_log_warn, base_vha, 0xb06e,
			    "Initialization TIMEOUT!\n");
			/* Init timeout. Disable further NIC Core
			 * communication.
			 */
			qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
				QLA8XXX_DEV_FAILED);
			ql_log(ql_log_info, base_vha, 0xb06f,
			    "HW State: FAILED.\n");
		}

		qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
		switch (dev_state) {
		case QLA8XXX_DEV_READY:
			if (ha->flags.nic_core_reset_owner)
				qla83xx_idc_audit(base_vha,
				    IDC_AUDIT_COMPLETION);
			ha->flags.nic_core_reset_owner = 0;
			ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
			    "Reset_owner reset by 0x%x.\n",
			    ha->portnum);
			goto exit;
		case QLA8XXX_DEV_COLD:
			if (ha->flags.nic_core_reset_owner)
				rval = qla83xx_device_bootstrap(base_vha);
			else {
			/* Wait for AEN to change device-state */
				qla83xx_idc_unlock(base_vha, 0);
				msleep(1000);
				qla83xx_idc_lock(base_vha, 0);
			}
			break;
		case QLA8XXX_DEV_INITIALIZING:
			/* Wait for AEN to change device-state */
			qla83xx_idc_unlock(base_vha, 0);
			msleep(1000);
			qla83xx_idc_lock(base_vha, 0);
			break;
		case QLA8XXX_DEV_NEED_RESET:
			if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
				qla83xx_need_reset_handler(base_vha);
			else {
				/* Wait for AEN to change device-state */
				qla83xx_idc_unlock(base_vha, 0);
				msleep(1000);
				qla83xx_idc_lock(base_vha, 0);
			}
			/* reset timeout value after need reset handler */
			dev_init_timeout = jiffies +
			    (ha->fcoe_dev_init_timeout * HZ);
			break;
		case QLA8XXX_DEV_NEED_QUIESCENT:
			/* XXX: DEBUG for now */
			qla83xx_idc_unlock(base_vha, 0);
			msleep(1000);
			qla83xx_idc_lock(base_vha, 0);
			break;
		case QLA8XXX_DEV_QUIESCENT:
			/* XXX: DEBUG for now */
			if (ha->flags.quiesce_owner)
				goto exit;

			qla83xx_idc_unlock(base_vha, 0);
			msleep(1000);
			qla83xx_idc_lock(base_vha, 0);
			dev_init_timeout = jiffies +
			    (ha->fcoe_dev_init_timeout * HZ);
			break;
		case QLA8XXX_DEV_FAILED:
			if (ha->flags.nic_core_reset_owner)
				qla83xx_idc_audit(base_vha,
				    IDC_AUDIT_COMPLETION);
			ha->flags.nic_core_reset_owner = 0;
			__qla83xx_clear_drv_presence(base_vha);
			qla83xx_idc_unlock(base_vha, 0);
			qla8xxx_dev_failed_handler(base_vha);
			rval = QLA_FUNCTION_FAILED;
			qla83xx_idc_lock(base_vha, 0);
			goto exit;
		case QLA8XXX_BAD_VALUE:
			qla83xx_idc_unlock(base_vha, 0);
			msleep(1000);
			qla83xx_idc_lock(base_vha, 0);
			break;
		default:
			ql_log(ql_log_warn, base_vha, 0xb071,
			    "Unknow Device State: %x.\n", dev_state);
			qla83xx_idc_unlock(base_vha, 0);
			qla8xxx_dev_failed_handler(base_vha);
			rval = QLA_FUNCTION_FAILED;
			qla83xx_idc_lock(base_vha, 0);
			goto exit;
		}
	}

exit:
	return rval;
}

L
Linus Torvalds 已提交
4646 4647 4648 4649 4650 4651 4652 4653 4654 4655 4656 4657 4658 4659 4660 4661
/**************************************************************************
* qla2x00_do_dpc
*   This kernel thread is a task that is schedule by the interrupt handler
*   to perform the background processing for interrupts.
*
* Notes:
* This task always run in the context of a kernel thread.  It
* is kick-off by the driver's detect code and starts up
* up one per adapter. It immediately goes to sleep and waits for
* some fibre event.  When either the interrupt handler or
* the timer routine detects a event it will one of the task
* bits then wake us up.
**************************************************************************/
static int
qla2x00_do_dpc(void *data)
{
4662
	int		rval;
4663 4664
	scsi_qla_host_t *base_vha;
	struct qla_hw_data *ha;
L
Linus Torvalds 已提交
4665

4666 4667
	ha = (struct qla_hw_data *)data;
	base_vha = pci_get_drvdata(ha->pdev);
L
Linus Torvalds 已提交
4668 4669 4670

	set_user_nice(current, -20);

4671
	set_current_state(TASK_INTERRUPTIBLE);
4672
	while (!kthread_should_stop()) {
4673 4674
		ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
		    "DPC handler sleeping.\n");
L
Linus Torvalds 已提交
4675

4676 4677
		schedule();
		__set_current_state(TASK_RUNNING);
L
Linus Torvalds 已提交
4678

4679 4680
		if (!base_vha->flags.init_done || ha->flags.mbox_busy)
			goto end_loop;
L
Linus Torvalds 已提交
4681

4682
		if (ha->flags.eeh_busy) {
4683 4684
			ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
			    "eeh_busy=%d.\n", ha->flags.eeh_busy);
4685
			goto end_loop;
4686 4687
		}

L
Linus Torvalds 已提交
4688 4689
		ha->dpc_active = 1;

4690 4691 4692
		ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
		    "DPC handler waking up, dpc_flags=0x%lx.\n",
		    base_vha->dpc_flags);
L
Linus Torvalds 已提交
4693

4694
		qla2x00_do_work(base_vha);
4695

4696 4697 4698 4699 4700
		if (IS_QLA82XX(ha)) {
			if (test_and_clear_bit(ISP_UNRECOVERABLE,
				&base_vha->dpc_flags)) {
				qla82xx_idc_lock(ha);
				qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4701
					QLA8XXX_DEV_FAILED);
4702
				qla82xx_idc_unlock(ha);
4703 4704
				ql_log(ql_log_info, base_vha, 0x4004,
				    "HW State: FAILED.\n");
4705 4706 4707 4708 4709 4710 4711
				qla82xx_device_state_handler(base_vha);
				continue;
			}

			if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
				&base_vha->dpc_flags)) {

4712 4713
				ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
				    "FCoE context reset scheduled.\n");
4714 4715 4716 4717 4718 4719 4720 4721 4722 4723 4724 4725 4726
				if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
					&base_vha->dpc_flags))) {
					if (qla82xx_fcoe_ctx_reset(base_vha)) {
						/* FCoE-ctx reset failed.
						 * Escalate to chip-reset
						 */
						set_bit(ISP_ABORT_NEEDED,
							&base_vha->dpc_flags);
					}
					clear_bit(ABORT_ISP_ACTIVE,
						&base_vha->dpc_flags);
				}

4727 4728
				ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
				    "FCoE context reset end.\n");
4729
			}
4730 4731 4732 4733 4734 4735 4736 4737 4738 4739 4740 4741 4742 4743 4744 4745 4746 4747 4748 4749 4750 4751 4752 4753 4754 4755 4756 4757 4758 4759 4760 4761
		} else if (IS_QLAFX00(ha)) {
			if (test_and_clear_bit(ISP_UNRECOVERABLE,
				&base_vha->dpc_flags)) {
				ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
				    "Firmware Reset Recovery\n");
				if (qlafx00_reset_initialize(base_vha)) {
					/* Failed. Abort isp later. */
					if (!test_bit(UNLOADING,
					    &base_vha->dpc_flags))
						set_bit(ISP_UNRECOVERABLE,
						    &base_vha->dpc_flags);
						ql_dbg(ql_dbg_dpc, base_vha,
						    0x4021,
						    "Reset Recovery Failed\n");
				}
			}

			if (test_and_clear_bit(FX00_TARGET_SCAN,
				&base_vha->dpc_flags)) {
				ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
				    "ISPFx00 Target Scan scheduled\n");
				if (qlafx00_rescan_isp(base_vha)) {
					if (!test_bit(UNLOADING,
					    &base_vha->dpc_flags))
						set_bit(ISP_UNRECOVERABLE,
						    &base_vha->dpc_flags);
					ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
					    "ISPFx00 Target Scan Failed\n");
				}
				ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
				    "ISPFx00 Target Scan End\n");
			}
4762 4763
		}

4764 4765
		if (test_and_clear_bit(ISP_ABORT_NEEDED,
						&base_vha->dpc_flags)) {
L
Linus Torvalds 已提交
4766

4767 4768
			ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
			    "ISP abort scheduled.\n");
L
Linus Torvalds 已提交
4769
			if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4770
			    &base_vha->dpc_flags))) {
L
Linus Torvalds 已提交
4771

4772
				if (ha->isp_ops->abort_isp(base_vha)) {
L
Linus Torvalds 已提交
4773 4774
					/* failed. retry later */
					set_bit(ISP_ABORT_NEEDED,
4775
					    &base_vha->dpc_flags);
4776
				}
4777 4778
				clear_bit(ABORT_ISP_ACTIVE,
						&base_vha->dpc_flags);
4779 4780
			}

4781 4782
			ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
			    "ISP abort end.\n");
L
Linus Torvalds 已提交
4783 4784
		}

4785 4786
		if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
		    &base_vha->dpc_flags)) {
4787
			qla2x00_update_fcports(base_vha);
4788
		}
4789

4790 4791 4792 4793 4794 4795 4796 4797 4798 4799
		if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
			int ret;
			ret = qla2x00_send_change_request(base_vha, 0x3, 0);
			if (ret != QLA_SUCCESS)
				ql_log(ql_log_warn, base_vha, 0x121,
				    "Failed to enable receiving of RSCN "
				    "requests: 0x%x.\n", ret);
			clear_bit(SCR_PENDING, &base_vha->dpc_flags);
		}

4800 4801 4802
		if (IS_QLAFX00(ha))
			goto loop_resync_check;

4803
		if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
4804 4805
			ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
			    "Quiescence mode scheduled.\n");
4806 4807 4808 4809 4810 4811 4812 4813 4814 4815 4816 4817 4818 4819 4820
			if (IS_QLA82XX(ha)) {
				qla82xx_device_state_handler(base_vha);
				clear_bit(ISP_QUIESCE_NEEDED,
				    &base_vha->dpc_flags);
				if (!ha->flags.quiesce_owner) {
					qla2x00_perform_loop_resync(base_vha);

					qla82xx_idc_lock(ha);
					qla82xx_clear_qsnt_ready(base_vha);
					qla82xx_idc_unlock(ha);
				}
			} else {
				clear_bit(ISP_QUIESCE_NEEDED,
				    &base_vha->dpc_flags);
				qla2x00_quiesce_io(base_vha);
4821
			}
4822 4823
			ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
			    "Quiescence mode end.\n");
4824 4825
		}

4826
		if (test_and_clear_bit(RESET_MARKER_NEEDED,
4827
				&base_vha->dpc_flags) &&
4828
		    (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
L
Linus Torvalds 已提交
4829

4830 4831
			ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
			    "Reset marker scheduled.\n");
4832 4833
			qla2x00_rst_aen(base_vha);
			clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
4834 4835
			ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
			    "Reset marker end.\n");
L
Linus Torvalds 已提交
4836 4837 4838
		}

		/* Retry each device up to login retry count */
4839 4840 4841 4842
		if ((test_and_clear_bit(RELOGIN_NEEDED,
						&base_vha->dpc_flags)) &&
		    !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
		    atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
L
Linus Torvalds 已提交
4843

4844 4845
			ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
			    "Relogin scheduled.\n");
4846
			qla2x00_relogin(base_vha);
4847 4848
			ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
			    "Relogin end.\n");
L
Linus Torvalds 已提交
4849
		}
4850
loop_resync_check:
4851
		if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
4852
		    &base_vha->dpc_flags)) {
L
Linus Torvalds 已提交
4853

4854 4855
			ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
			    "Loop resync scheduled.\n");
L
Linus Torvalds 已提交
4856 4857

			if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
4858
			    &base_vha->dpc_flags))) {
L
Linus Torvalds 已提交
4859

4860
				rval = qla2x00_loop_resync(base_vha);
L
Linus Torvalds 已提交
4861

4862 4863
				clear_bit(LOOP_RESYNC_ACTIVE,
						&base_vha->dpc_flags);
L
Linus Torvalds 已提交
4864 4865
			}

4866 4867
			ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
			    "Loop resync end.\n");
L
Linus Torvalds 已提交
4868 4869
		}

4870 4871 4872
		if (IS_QLAFX00(ha))
			goto intr_on_check;

4873 4874 4875 4876
		if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
		    atomic_read(&base_vha->loop_state) == LOOP_READY) {
			clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
			qla2xxx_flash_npiv_conf(base_vha);
4877 4878
		}

4879 4880 4881 4882 4883 4884 4885 4886 4887 4888 4889
		if (test_and_clear_bit(HOST_RAMP_DOWN_QUEUE_DEPTH,
		    &base_vha->dpc_flags)) {
			/* Prevents simultaneous ramp up and down */
			clear_bit(HOST_RAMP_UP_QUEUE_DEPTH,
			    &base_vha->dpc_flags);
			qla2x00_host_ramp_down_queuedepth(base_vha);
		}

		if (test_and_clear_bit(HOST_RAMP_UP_QUEUE_DEPTH,
		    &base_vha->dpc_flags))
			qla2x00_host_ramp_up_queuedepth(base_vha);
4890
intr_on_check:
L
Linus Torvalds 已提交
4891
		if (!ha->interrupts_on)
4892
			ha->isp_ops->enable_intrs(ha);
L
Linus Torvalds 已提交
4893

4894 4895 4896
		if (test_and_clear_bit(BEACON_BLINK_NEEDED,
					&base_vha->dpc_flags))
			ha->isp_ops->beacon_blink(base_vha);
4897

4898 4899
		if (!IS_QLAFX00(ha))
			qla2x00_do_dpc_all_vps(base_vha);
4900

L
Linus Torvalds 已提交
4901
		ha->dpc_active = 0;
4902
end_loop:
4903
		set_current_state(TASK_INTERRUPTIBLE);
L
Linus Torvalds 已提交
4904
	} /* End of while(1) */
4905
	__set_current_state(TASK_RUNNING);
L
Linus Torvalds 已提交
4906

4907 4908
	ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
	    "DPC handler exiting.\n");
L
Linus Torvalds 已提交
4909 4910 4911 4912 4913 4914

	/*
	 * Make sure that nobody tries to wake us up again.
	 */
	ha->dpc_active = 0;

4915 4916 4917
	/* Cleanup any residual CTX SRBs. */
	qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);

4918 4919 4920 4921
	return 0;
}

void
4922
qla2xxx_wake_dpc(struct scsi_qla_host *vha)
4923
{
4924
	struct qla_hw_data *ha = vha->hw;
4925 4926
	struct task_struct *t = ha->dpc_thread;

4927
	if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
4928
		wake_up_process(t);
L
Linus Torvalds 已提交
4929 4930 4931 4932 4933 4934 4935 4936 4937 4938
}

/*
*  qla2x00_rst_aen
*      Processes asynchronous reset.
*
* Input:
*      ha  = adapter block pointer.
*/
static void
4939
qla2x00_rst_aen(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
4940
{
4941 4942 4943
	if (vha->flags.online && !vha->flags.reset_active &&
	    !atomic_read(&vha->loop_down_timer) &&
	    !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
L
Linus Torvalds 已提交
4944
		do {
4945
			clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
L
Linus Torvalds 已提交
4946 4947 4948 4949 4950

			/*
			 * Issue marker command only when we are going to start
			 * the I/O.
			 */
4951 4952 4953
			vha->marker_needed = 1;
		} while (!atomic_read(&vha->loop_down_timer) &&
		    (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
L
Linus Torvalds 已提交
4954 4955 4956 4957 4958 4959 4960 4961 4962 4963 4964
	}
}

/**************************************************************************
*   qla2x00_timer
*
* Description:
*   One second timer
*
* Context: Interrupt
***************************************************************************/
4965
void
4966
qla2x00_timer(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
4967 4968 4969 4970 4971
{
	unsigned long	cpu_flags = 0;
	int		start_dpc = 0;
	int		index;
	srb_t		*sp;
4972
	uint16_t        w;
4973
	struct qla_hw_data *ha = vha->hw;
4974
	struct req_que *req;
4975

4976
	if (ha->flags.eeh_busy) {
4977 4978 4979
		ql_dbg(ql_dbg_timer, vha, 0x6000,
		    "EEH = %d, restarting timer.\n",
		    ha->flags.eeh_busy);
4980 4981 4982 4983
		qla2x00_restart_timer(vha, WATCH_INTERVAL);
		return;
	}

4984 4985 4986
	/* Hardware read to raise pending EEH errors during mailbox waits. */
	if (!pci_channel_offline(ha->pdev))
		pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
L
Linus Torvalds 已提交
4987

4988 4989
	/* Make sure qla82xx_watchdog is run only for physical port */
	if (!vha->vp_idx && IS_QLA82XX(ha)) {
4990 4991 4992 4993 4994
		if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
			start_dpc++;
		qla82xx_watchdog(vha);
	}

4995 4996 4997
	if (!vha->vp_idx && IS_QLAFX00(ha))
		qlafx00_timer_routine(vha);

L
Linus Torvalds 已提交
4998
	/* Loop down handler. */
4999
	if (atomic_read(&vha->loop_down_timer) > 0 &&
5000 5001
	    !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
	    !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5002
		&& vha->flags.online) {
L
Linus Torvalds 已提交
5003

5004 5005
		if (atomic_read(&vha->loop_down_timer) ==
		    vha->loop_down_abort_time) {
L
Linus Torvalds 已提交
5006

5007 5008
			ql_log(ql_log_info, vha, 0x6008,
			    "Loop down - aborting the queues before time expires.\n");
L
Linus Torvalds 已提交
5009

5010 5011
			if (!IS_QLA2100(ha) && vha->link_down_timeout)
				atomic_set(&vha->loop_state, LOOP_DEAD);
L
Linus Torvalds 已提交
5012

5013 5014 5015 5016
			/*
			 * Schedule an ISP abort to return any FCP2-device
			 * commands.
			 */
5017
			/* NPIV - scan physical port only */
5018
			if (!vha->vp_idx) {
5019 5020
				spin_lock_irqsave(&ha->hardware_lock,
				    cpu_flags);
5021
				req = ha->req_q_map[0];
5022
				for (index = 1;
5023
				    index < req->num_outstanding_cmds;
5024 5025 5026
				    index++) {
					fc_port_t *sfcp;

5027
					sp = req->outstanding_cmds[index];
5028 5029
					if (!sp)
						continue;
5030
					if (sp->type != SRB_SCSI_CMD)
5031
						continue;
5032
					sfcp = sp->fcport;
5033
					if (!(sfcp->flags & FCF_FCP2_DEVICE))
5034
						continue;
5035

5036 5037 5038 5039 5040
					if (IS_QLA82XX(ha))
						set_bit(FCOE_CTX_RESET_NEEDED,
							&vha->dpc_flags);
					else
						set_bit(ISP_ABORT_NEEDED,
5041
							&vha->dpc_flags);
5042 5043 5044
					break;
				}
				spin_unlock_irqrestore(&ha->hardware_lock,
5045
								cpu_flags);
L
Linus Torvalds 已提交
5046 5047 5048 5049 5050
			}
			start_dpc++;
		}

		/* if the loop has been down for 4 minutes, reinit adapter */
5051
		if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5052
			if (!(vha->device_flags & DFLG_NO_CABLE)) {
5053
				ql_log(ql_log_warn, vha, 0x6009,
L
Linus Torvalds 已提交
5054 5055
				    "Loop down - aborting ISP.\n");

5056 5057 5058 5059 5060 5061
				if (IS_QLA82XX(ha))
					set_bit(FCOE_CTX_RESET_NEEDED,
						&vha->dpc_flags);
				else
					set_bit(ISP_ABORT_NEEDED,
						&vha->dpc_flags);
L
Linus Torvalds 已提交
5062 5063
			}
		}
5064 5065 5066
		ql_dbg(ql_dbg_timer, vha, 0x600a,
		    "Loop down - seconds remaining %d.\n",
		    atomic_read(&vha->loop_down_timer));
L
Linus Torvalds 已提交
5067 5068
	}

5069 5070
	/* Check if beacon LED needs to be blinked for physical host only */
	if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5071 5072 5073 5074 5075
		/* There is no beacon_blink function for ISP82xx */
		if (!IS_QLA82XX(ha)) {
			set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
			start_dpc++;
		}
5076 5077
	}

5078
	/* Process any deferred work. */
5079
	if (!list_empty(&vha->work_list))
5080 5081
		start_dpc++;

L
Linus Torvalds 已提交
5082
	/* Schedule the DPC routine if needed */
5083 5084 5085
	if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
	    test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
	    test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
L
Linus Torvalds 已提交
5086
	    start_dpc ||
5087 5088
	    test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
	    test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5089 5090
	    test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
	    test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5091
	    test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5092 5093 5094
	    test_bit(RELOGIN_NEEDED, &vha->dpc_flags) ||
	    test_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags) ||
	    test_bit(HOST_RAMP_UP_QUEUE_DEPTH, &vha->dpc_flags))) {
5095 5096 5097 5098 5099 5100 5101 5102 5103 5104 5105 5106
		ql_dbg(ql_dbg_timer, vha, 0x600b,
		    "isp_abort_needed=%d loop_resync_needed=%d "
		    "fcport_update_needed=%d start_dpc=%d "
		    "reset_marker_needed=%d",
		    test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
		    test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
		    test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
		    start_dpc,
		    test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
		ql_dbg(ql_dbg_timer, vha, 0x600c,
		    "beacon_blink_needed=%d isp_unrecoverable=%d "
		    "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5107 5108
		    "relogin_needed=%d, host_ramp_down_needed=%d "
		    "host_ramp_up_needed=%d.\n",
5109 5110 5111 5112
		    test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
		    test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
		    test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
		    test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5113 5114 5115
		    test_bit(RELOGIN_NEEDED, &vha->dpc_flags),
		    test_bit(HOST_RAMP_UP_QUEUE_DEPTH, &vha->dpc_flags),
		    test_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags));
5116
		qla2xxx_wake_dpc(vha);
5117
	}
L
Linus Torvalds 已提交
5118

5119
	qla2x00_restart_timer(vha, WATCH_INTERVAL);
L
Linus Torvalds 已提交
5120 5121
}

5122 5123
/* Firmware interface routines. */

5124
#define FW_BLOBS	10
5125 5126 5127 5128
#define FW_ISP21XX	0
#define FW_ISP22XX	1
#define FW_ISP2300	2
#define FW_ISP2322	3
5129
#define FW_ISP24XX	4
5130
#define FW_ISP25XX	5
5131
#define FW_ISP81XX	6
5132
#define FW_ISP82XX	7
5133 5134
#define FW_ISP2031	8
#define FW_ISP8031	9
5135

5136 5137 5138 5139 5140
#define FW_FILE_ISP21XX	"ql2100_fw.bin"
#define FW_FILE_ISP22XX	"ql2200_fw.bin"
#define FW_FILE_ISP2300	"ql2300_fw.bin"
#define FW_FILE_ISP2322	"ql2322_fw.bin"
#define FW_FILE_ISP24XX	"ql2400_fw.bin"
5141
#define FW_FILE_ISP25XX	"ql2500_fw.bin"
5142
#define FW_FILE_ISP81XX	"ql8100_fw.bin"
5143
#define FW_FILE_ISP82XX	"ql8200_fw.bin"
5144 5145
#define FW_FILE_ISP2031	"ql2600_fw.bin"
#define FW_FILE_ISP8031	"ql8300_fw.bin"
5146

5147
static DEFINE_MUTEX(qla_fw_lock);
5148 5149

static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5150 5151 5152 5153 5154
	{ .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
	{ .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
	{ .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
	{ .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
	{ .name = FW_FILE_ISP24XX, },
5155
	{ .name = FW_FILE_ISP25XX, },
5156
	{ .name = FW_FILE_ISP81XX, },
5157
	{ .name = FW_FILE_ISP82XX, },
5158 5159
	{ .name = FW_FILE_ISP2031, },
	{ .name = FW_FILE_ISP8031, },
5160 5161 5162
};

struct fw_blob *
5163
qla2x00_request_firmware(scsi_qla_host_t *vha)
5164
{
5165
	struct qla_hw_data *ha = vha->hw;
5166 5167 5168 5169 5170 5171
	struct fw_blob *blob;

	if (IS_QLA2100(ha)) {
		blob = &qla_fw_blobs[FW_ISP21XX];
	} else if (IS_QLA2200(ha)) {
		blob = &qla_fw_blobs[FW_ISP22XX];
5172
	} else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5173
		blob = &qla_fw_blobs[FW_ISP2300];
5174
	} else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5175
		blob = &qla_fw_blobs[FW_ISP2322];
5176
	} else if (IS_QLA24XX_TYPE(ha)) {
5177
		blob = &qla_fw_blobs[FW_ISP24XX];
5178 5179
	} else if (IS_QLA25XX(ha)) {
		blob = &qla_fw_blobs[FW_ISP25XX];
5180 5181
	} else if (IS_QLA81XX(ha)) {
		blob = &qla_fw_blobs[FW_ISP81XX];
5182 5183
	} else if (IS_QLA82XX(ha)) {
		blob = &qla_fw_blobs[FW_ISP82XX];
5184 5185 5186 5187
	} else if (IS_QLA2031(ha)) {
		blob = &qla_fw_blobs[FW_ISP2031];
	} else if (IS_QLA8031(ha)) {
		blob = &qla_fw_blobs[FW_ISP8031];
5188 5189
	} else {
		return NULL;
5190 5191
	}

5192
	mutex_lock(&qla_fw_lock);
5193 5194 5195 5196
	if (blob->fw)
		goto out;

	if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5197 5198
		ql_log(ql_log_warn, vha, 0x0063,
		    "Failed to load firmware image (%s).\n", blob->name);
5199 5200 5201 5202 5203 5204
		blob->fw = NULL;
		blob = NULL;
		goto out;
	}

out:
5205
	mutex_unlock(&qla_fw_lock);
5206 5207 5208 5209 5210 5211 5212 5213
	return blob;
}

static void
qla2x00_release_firmware(void)
{
	int idx;

5214
	mutex_lock(&qla_fw_lock);
5215
	for (idx = 0; idx < FW_BLOBS; idx++)
5216
		release_firmware(qla_fw_blobs[idx].fw);
5217
	mutex_unlock(&qla_fw_lock);
5218 5219
}

5220 5221 5222
static pci_ers_result_t
qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
{
5223 5224 5225
	scsi_qla_host_t *vha = pci_get_drvdata(pdev);
	struct qla_hw_data *ha = vha->hw;

5226 5227
	ql_dbg(ql_dbg_aer, vha, 0x9000,
	    "PCI error detected, state %x.\n", state);
5228

5229 5230
	switch (state) {
	case pci_channel_io_normal:
5231
		ha->flags.eeh_busy = 0;
5232 5233
		return PCI_ERS_RESULT_CAN_RECOVER;
	case pci_channel_io_frozen:
5234
		ha->flags.eeh_busy = 1;
5235 5236
		/* For ISP82XX complete any pending mailbox cmd */
		if (IS_QLA82XX(ha)) {
5237
			ha->flags.isp82xx_fw_hung = 1;
5238 5239
			ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
			qla82xx_clear_pending_mbx(vha);
5240
		}
5241
		qla2x00_free_irqs(vha);
5242
		pci_disable_device(pdev);
5243 5244
		/* Return back all IOs */
		qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5245 5246
		return PCI_ERS_RESULT_NEED_RESET;
	case pci_channel_io_perm_failure:
5247 5248
		ha->flags.pci_channel_io_perm_failure = 1;
		qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5249 5250 5251 5252 5253 5254 5255 5256 5257 5258 5259
		return PCI_ERS_RESULT_DISCONNECT;
	}
	return PCI_ERS_RESULT_NEED_RESET;
}

static pci_ers_result_t
qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
{
	int risc_paused = 0;
	uint32_t stat;
	unsigned long flags;
5260 5261
	scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
	struct qla_hw_data *ha = base_vha->hw;
5262 5263 5264
	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
	struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;

5265 5266 5267
	if (IS_QLA82XX(ha))
		return PCI_ERS_RESULT_RECOVERED;

5268 5269 5270 5271 5272 5273 5274 5275 5276 5277 5278 5279 5280 5281 5282 5283 5284
	spin_lock_irqsave(&ha->hardware_lock, flags);
	if (IS_QLA2100(ha) || IS_QLA2200(ha)){
		stat = RD_REG_DWORD(&reg->hccr);
		if (stat & HCCR_RISC_PAUSE)
			risc_paused = 1;
	} else if (IS_QLA23XX(ha)) {
		stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
		if (stat & HSR_RISC_PAUSED)
			risc_paused = 1;
	} else if (IS_FWI2_CAPABLE(ha)) {
		stat = RD_REG_DWORD(&reg24->host_status);
		if (stat & HSRX_RISC_PAUSED)
			risc_paused = 1;
	}
	spin_unlock_irqrestore(&ha->hardware_lock, flags);

	if (risc_paused) {
5285 5286
		ql_log(ql_log_info, base_vha, 0x9003,
		    "RISC paused -- mmio_enabled, Dumping firmware.\n");
5287
		ha->isp_ops->fw_dump(base_vha, 0);
5288 5289 5290 5291 5292 5293

		return PCI_ERS_RESULT_NEED_RESET;
	} else
		return PCI_ERS_RESULT_RECOVERED;
}

5294 5295
static uint32_t
qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5296 5297 5298 5299 5300 5301 5302
{
	uint32_t rval = QLA_FUNCTION_FAILED;
	uint32_t drv_active = 0;
	struct qla_hw_data *ha = base_vha->hw;
	int fn;
	struct pci_dev *other_pdev = NULL;

5303 5304
	ql_dbg(ql_dbg_aer, base_vha, 0x9006,
	    "Entered %s.\n", __func__);
5305 5306 5307 5308 5309 5310 5311 5312 5313 5314 5315 5316 5317

	set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);

	if (base_vha->flags.online) {
		/* Abort all outstanding commands,
		 * so as to be requeued later */
		qla2x00_abort_isp_cleanup(base_vha);
	}


	fn = PCI_FUNC(ha->pdev->devfn);
	while (fn > 0) {
		fn--;
5318 5319
		ql_dbg(ql_dbg_aer, base_vha, 0x9007,
		    "Finding pci device at function = 0x%x.\n", fn);
5320 5321 5322 5323 5324 5325 5326 5327
		other_pdev =
		    pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
		    ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
		    fn));

		if (!other_pdev)
			continue;
		if (atomic_read(&other_pdev->enable_cnt)) {
5328 5329 5330
			ql_dbg(ql_dbg_aer, base_vha, 0x9008,
			    "Found PCI func available and enable at 0x%x.\n",
			    fn);
5331 5332 5333 5334 5335 5336 5337 5338
			pci_dev_put(other_pdev);
			break;
		}
		pci_dev_put(other_pdev);
	}

	if (!fn) {
		/* Reset owner */
5339 5340 5341
		ql_dbg(ql_dbg_aer, base_vha, 0x9009,
		    "This devfn is reset owner = 0x%x.\n",
		    ha->pdev->devfn);
5342 5343 5344
		qla82xx_idc_lock(ha);

		qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5345
		    QLA8XXX_DEV_INITIALIZING);
5346 5347 5348 5349 5350

		qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
		    QLA82XX_IDC_VERSION);

		drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5351 5352
		ql_dbg(ql_dbg_aer, base_vha, 0x900a,
		    "drv_active = 0x%x.\n", drv_active);
5353 5354 5355 5356 5357 5358 5359 5360 5361 5362 5363 5364

		qla82xx_idc_unlock(ha);
		/* Reset if device is not already reset
		 * drv_active would be 0 if a reset has already been done
		 */
		if (drv_active)
			rval = qla82xx_start_firmware(base_vha);
		else
			rval = QLA_SUCCESS;
		qla82xx_idc_lock(ha);

		if (rval != QLA_SUCCESS) {
5365 5366
			ql_log(ql_log_info, base_vha, 0x900b,
			    "HW State: FAILED.\n");
5367 5368
			qla82xx_clear_drv_active(ha);
			qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5369
			    QLA8XXX_DEV_FAILED);
5370
		} else {
5371 5372
			ql_log(ql_log_info, base_vha, 0x900c,
			    "HW State: READY.\n");
5373
			qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5374
			    QLA8XXX_DEV_READY);
5375
			qla82xx_idc_unlock(ha);
5376
			ha->flags.isp82xx_fw_hung = 0;
5377 5378 5379 5380 5381 5382 5383 5384
			rval = qla82xx_restart_isp(base_vha);
			qla82xx_idc_lock(ha);
			/* Clear driver state register */
			qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
			qla82xx_set_drv_active(base_vha);
		}
		qla82xx_idc_unlock(ha);
	} else {
5385 5386 5387
		ql_dbg(ql_dbg_aer, base_vha, 0x900d,
		    "This devfn is not reset owner = 0x%x.\n",
		    ha->pdev->devfn);
5388
		if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5389
		    QLA8XXX_DEV_READY)) {
5390
			ha->flags.isp82xx_fw_hung = 0;
5391 5392 5393 5394 5395 5396 5397 5398 5399 5400 5401
			rval = qla82xx_restart_isp(base_vha);
			qla82xx_idc_lock(ha);
			qla82xx_set_drv_active(base_vha);
			qla82xx_idc_unlock(ha);
		}
	}
	clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);

	return rval;
}

5402 5403 5404 5405
static pci_ers_result_t
qla2xxx_pci_slot_reset(struct pci_dev *pdev)
{
	pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5406 5407
	scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
	struct qla_hw_data *ha = base_vha->hw;
5408 5409
	struct rsp_que *rsp;
	int rc, retries = 10;
5410

5411 5412
	ql_dbg(ql_dbg_aer, base_vha, 0x9004,
	    "Slot Reset.\n");
5413

5414 5415 5416 5417 5418 5419 5420 5421
	/* Workaround: qla2xxx driver which access hardware earlier
	 * needs error state to be pci_channel_io_online.
	 * Otherwise mailbox command timesout.
	 */
	pdev->error_state = pci_channel_io_normal;

	pci_restore_state(pdev);

5422 5423 5424 5425 5426
	/* pci_restore_state() clears the saved_state flag of the device
	 * save restored state which resets saved_state flag
	 */
	pci_save_state(pdev);

5427 5428 5429 5430
	if (ha->mem_only)
		rc = pci_enable_device_mem(pdev);
	else
		rc = pci_enable_device(pdev);
5431

5432
	if (rc) {
5433
		ql_log(ql_log_warn, base_vha, 0x9005,
5434
		    "Can't re-enable PCI device after reset.\n");
5435
		goto exit_slot_reset;
5436 5437
	}

5438 5439
	rsp = ha->rsp_q_map[0];
	if (qla2x00_request_irqs(ha, rsp))
5440
		goto exit_slot_reset;
5441

5442
	if (ha->isp_ops->pci_config(base_vha))
5443 5444 5445 5446 5447 5448 5449 5450 5451
		goto exit_slot_reset;

	if (IS_QLA82XX(ha)) {
		if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
			ret = PCI_ERS_RESULT_RECOVERED;
			goto exit_slot_reset;
		} else
			goto exit_slot_reset;
	}
5452

5453 5454
	while (ha->flags.mbox_busy && retries--)
		msleep(1000);
5455

5456
	set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5457
	if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5458
		ret =  PCI_ERS_RESULT_RECOVERED;
5459
	clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5460

5461

5462
exit_slot_reset:
5463 5464
	ql_dbg(ql_dbg_aer, base_vha, 0x900e,
	    "slot_reset return %x.\n", ret);
5465

5466 5467 5468 5469 5470 5471
	return ret;
}

static void
qla2xxx_pci_resume(struct pci_dev *pdev)
{
5472 5473
	scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
	struct qla_hw_data *ha = base_vha->hw;
5474 5475
	int ret;

5476 5477
	ql_dbg(ql_dbg_aer, base_vha, 0x900f,
	    "pci_resume.\n");
5478

5479
	ret = qla2x00_wait_for_hba_online(base_vha);
5480
	if (ret != QLA_SUCCESS) {
5481 5482
		ql_log(ql_log_fatal, base_vha, 0x9002,
		    "The device failed to resume I/O from slot/link_reset.\n");
5483
	}
5484

5485 5486
	pci_cleanup_aer_uncorrect_error_status(pdev);

5487
	ha->flags.eeh_busy = 0;
5488 5489
}

5490
static const struct pci_error_handlers qla2xxx_err_handler = {
5491 5492 5493 5494 5495 5496
	.error_detected = qla2xxx_pci_error_detected,
	.mmio_enabled = qla2xxx_pci_mmio_enabled,
	.slot_reset = qla2xxx_pci_slot_reset,
	.resume = qla2xxx_pci_resume,
};

5497
static struct pci_device_id qla2xxx_pci_tbl[] = {
5498 5499 5500 5501 5502 5503 5504 5505 5506
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5507
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5508 5509
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5510
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5511
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5512
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5513
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5514
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5515
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5516 5517 5518 5519
	{ 0 },
};
MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);

5520
static struct pci_driver qla2xxx_pci_driver = {
5521
	.name		= QLA2XXX_DRIVER_NAME,
5522 5523 5524
	.driver		= {
		.owner		= THIS_MODULE,
	},
5525
	.id_table	= qla2xxx_pci_tbl,
5526
	.probe		= qla2x00_probe_one,
A
Adrian Bunk 已提交
5527
	.remove		= qla2x00_remove_one,
5528
	.shutdown	= qla2x00_shutdown,
5529
	.err_handler	= &qla2xxx_err_handler,
5530 5531
};

5532
static const struct file_operations apidev_fops = {
5533
	.owner = THIS_MODULE,
5534
	.llseek = noop_llseek,
5535 5536
};

L
Linus Torvalds 已提交
5537 5538 5539 5540 5541 5542
/**
 * qla2x00_module_init - Module initialization.
 **/
static int __init
qla2x00_module_init(void)
{
5543 5544
	int ret = 0;

L
Linus Torvalds 已提交
5545
	/* Allocate cache for SRBs. */
5546
	srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5547
	    SLAB_HWCACHE_ALIGN, NULL);
L
Linus Torvalds 已提交
5548
	if (srb_cachep == NULL) {
5549 5550
		ql_log(ql_log_fatal, NULL, 0x0001,
		    "Unable to allocate SRB cache...Failing load!.\n");
L
Linus Torvalds 已提交
5551 5552 5553
		return -ENOMEM;
	}

5554 5555 5556 5557 5558 5559 5560 5561 5562 5563 5564 5565 5566 5567 5568
	/* Initialize target kmem_cache and mem_pools */
	ret = qlt_init();
	if (ret < 0) {
		kmem_cache_destroy(srb_cachep);
		return ret;
	} else if (ret > 0) {
		/*
		 * If initiator mode is explictly disabled by qlt_init(),
		 * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
		 * performing scsi_scan_target() during LOOP UP event.
		 */
		qla2xxx_transport_functions.disable_target_scan = 1;
		qla2xxx_transport_vport_functions.disable_target_scan = 1;
	}

L
Linus Torvalds 已提交
5569 5570
	/* Derive version string. */
	strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5571
	if (ql2xextended_error_logging)
5572 5573
		strcat(qla2x00_version_str, "-debug");

5574 5575
	qla2xxx_transport_template =
	    fc_attach_transport(&qla2xxx_transport_functions);
5576 5577
	if (!qla2xxx_transport_template) {
		kmem_cache_destroy(srb_cachep);
5578 5579
		ql_log(ql_log_fatal, NULL, 0x0002,
		    "fc_attach_transport failed...Failing load!.\n");
5580
		qlt_exit();
L
Linus Torvalds 已提交
5581
		return -ENODEV;
5582
	}
5583 5584 5585

	apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
	if (apidev_major < 0) {
5586 5587
		ql_log(ql_log_fatal, NULL, 0x0003,
		    "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5588 5589
	}

5590 5591 5592 5593
	qla2xxx_transport_vport_template =
	    fc_attach_transport(&qla2xxx_transport_vport_functions);
	if (!qla2xxx_transport_vport_template) {
		kmem_cache_destroy(srb_cachep);
5594
		qlt_exit();
5595
		fc_release_transport(qla2xxx_transport_template);
5596 5597
		ql_log(ql_log_fatal, NULL, 0x0004,
		    "fc_attach_transport vport failed...Failing load!.\n");
L
Linus Torvalds 已提交
5598
		return -ENODEV;
5599
	}
5600 5601
	ql_log(ql_log_info, NULL, 0x0005,
	    "QLogic Fibre Channel HBA Driver: %s.\n",
5602
	    qla2x00_version_str);
5603
	ret = pci_register_driver(&qla2xxx_pci_driver);
5604 5605
	if (ret) {
		kmem_cache_destroy(srb_cachep);
5606
		qlt_exit();
5607
		fc_release_transport(qla2xxx_transport_template);
5608
		fc_release_transport(qla2xxx_transport_vport_template);
5609 5610 5611
		ql_log(ql_log_fatal, NULL, 0x0006,
		    "pci_register_driver failed...ret=%d Failing load!.\n",
		    ret);
5612 5613
	}
	return ret;
L
Linus Torvalds 已提交
5614 5615 5616 5617 5618 5619 5620 5621
}

/**
 * qla2x00_module_exit - Module cleanup.
 **/
static void __exit
qla2x00_module_exit(void)
{
5622
	unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5623
	pci_unregister_driver(&qla2xxx_pci_driver);
5624
	qla2x00_release_firmware();
5625
	kmem_cache_destroy(srb_cachep);
5626
	qlt_exit();
5627 5628
	if (ctx_cachep)
		kmem_cache_destroy(ctx_cachep);
L
Linus Torvalds 已提交
5629
	fc_release_transport(qla2xxx_transport_template);
5630
	fc_release_transport(qla2xxx_transport_vport_template);
L
Linus Torvalds 已提交
5631 5632 5633 5634 5635 5636 5637 5638 5639
}

module_init(qla2x00_module_init);
module_exit(qla2x00_module_exit);

MODULE_AUTHOR("QLogic Corporation");
MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(QLA2XXX_VERSION);
5640 5641 5642 5643 5644
MODULE_FIRMWARE(FW_FILE_ISP21XX);
MODULE_FIRMWARE(FW_FILE_ISP22XX);
MODULE_FIRMWARE(FW_FILE_ISP2300);
MODULE_FIRMWARE(FW_FILE_ISP2322);
MODULE_FIRMWARE(FW_FILE_ISP24XX);
5645
MODULE_FIRMWARE(FW_FILE_ISP25XX);