# SpiMsg - [Overview](#section1972004157165636) - [Summary](#section1293398165636) - [Data Fields](#pub-attribs) - [Details](#section770647843165636) - [Field](#section1902860348165636) - [csChange](#a1a38a03e30428aca7054cc8555b749a9) - [delayUs](#a443b7f63c6b33719759eacf600da3aab) - [len](#acb96c50b34d79d00277cbea9881b701a) - [rbuf](#a575755ef9506c10199c47f636f1de1de) - [speed](#adff9e15325aab2afb066a1f3489b55d5) - [wbuf](#ae2aed8b3bd1d75a50f82c880a45cf521) ## **Overview** **Related Modules:** [SPI](SPI.md) **Description:** Defines the custom SPI transfer message. Attention : The specific SPI controller determines whether **speed**, **delayUs**, and **csChange** are supported. **Since:** 1.0 ## **Summary** ## Data Fields

Variable Name

Description

wbuf

uint8_t *

rbuf

uint8_t *

len

uint32_t

speed

uint32_t

delayUs

uint16_t

csChange

uint8_t

## **Details** ## **Field ** ## csChange ``` uint8_t SpiMsg::csChange ``` **Description:** Whether to switch off the CS before the next transfer when the current transfer has been completed. **1** indicates to switch off the CS; **0** indicates to switch on the CS. ## delayUs ``` uint16_t SpiMsg::delayUs ``` **Description:** Delay \(in microseconds\) before starting the next transfer. The value **0** indicates there is no delay between transfers. ## len ``` uint32_t SpiMsg::len ``` **Description:** Length of the read and write buffers. The read buffer and the write buffer have the same length. ## rbuf ``` uint8_t* SpiMsg::rbuf ``` **Description:** Address of the read buffer ## speed ``` uint32_t SpiMsg::speed ``` **Description:** Current message transfer speed ## wbuf ``` uint8_t* SpiMsg::wbuf ``` **Description:** Address of the write buffer