For the compiler warning, uninitizlized var when getting value by a
pointer.
Signed-off-by: NHiroshi DOYU <hdoyu@nvidia.com>
Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>

Remove unnecessary cleanup procedures with devm_*() functions.
Signed-off-by: NHiroshi DOYU <hdoyu@nvidia.com>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>

To simplify the code, alloc necessary data at once.
Signed-off-by: NHiroshi DOYU <hdoyu@nvidia.com>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>

The necessary info is expected to pass from DT.

For more precise resource reservation, there shouldn't be any
overlapping of register range between SMMU and MC. SMMU register
offset needs to be calculated correctly, based on its register bank.
Signed-off-by: NHiroshi DOYU <hdoyu@nvidia.com>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>

Print an attached device name correctly.
Signed-off-by: NHiroshi DOYU <hdoyu@nvidia.com>
Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>

Tegra 30 IOMMU H/W, SMMU (System Memory Management Unit). This patch
implements struct iommu_ops for SMMU for the upper IOMMU API.

This H/W module supports multiple virtual address spaces(domain x4),
and manages 2 level H/W translation pagetable.
Signed-off-by: NHiroshi DOYU <hdoyu@nvidia.com>
Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>