- 23 12月, 2011 2 次提交
-
-
由 Lothar Waßmann 提交于
There is no need to have the clock enabled all the time the driver is loaded. It will be enabled anyway in mxs_dma_alloc_chan_resources() when a channel is actually going to be used. Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
-
由 Lothar Waßmann 提交于
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
-
- 27 10月, 2011 1 次提交
-
-
由 Vinod Koul 提交于
fixup usage of dma direction by introducing dma_transfer_direction, this patch moves dma/drivers/* to use new enum Cc: Jassi Brar <jaswinder.singh@linaro.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Viresh Kumar <viresh.kumar@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Mika Westerberg <mika.westerberg@iki.fi> Cc: H Hartley Sweeten <hartleys@visionengravers.com> Cc: Li Yang <leoli@freescale.com> Cc: Zhang Wei <zw@zh-kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Shawn Guo <shawn.guo@freescale.com> Cc: Yong Wang <yong.y.wang@intel.com> Cc: Tomoya MORINAGA <tomoya-linux@dsn.lapis-semi.com> Cc: Boojin Kim <boojin.kim@samsung.com> Cc: Barry Song <Baohua.Song@csr.com> Acked-by: NMika Westerberg <mika.westerberg@iki.fi> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
-
- 16 8月, 2011 1 次提交
-
-
由 Lothar Waßmann 提交于
After calling mxs_dma_disable_chan() for a channel, that channel becomes unusable because some controller registers can only be written when the clock is enabled via CLKGATE. Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
- 26 7月, 2011 2 次提交
-
-
由 Dong Aisheng 提交于
We met some channels in abnormal state after disable. Reset it to get a clean state. Signed-off-by: NDong Aisheng <b29396@freescale.com> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Axel Lin 提交于
Signed-off-by: NAxel Lin <axel.lin@gmail.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
- 14 7月, 2011 1 次提交
-
-
由 Shawn Guo 提交于
In general, the mxs-dma users get separate irq for each channel, but gpmi is special one which has only one irq shared by all gpmi channels. It causes mxs_dma channel allocation function fail for all other gpmi channels except the first one calling into the function. The patch gets request_irq call skipped for NO_IRQ case, and leaves this gpmi specific quirk to gpmi driver to sort out. It will fix above problem if gpmi driver sets chan_irq as gpmi irq for only one channel and NO_IRQ for all the rest channels. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Cc: Vinod Koul <vinod.koul@intel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
- 02 3月, 2011 1 次提交
-
-
由 Shawn Guo 提交于
This patch adds dma support for Freescale MXS-based SoC i.MX23/28, including apbh-dma and apbx-dma. * apbh-dma and apbx-dma are supported in the driver as two mxs-dma instances. * apbh-dma is different between mx23 and mx28, hardware version register is used to differentiate. * mxs-dma supports pio function besides data transfer. The driver uses dma_data_direction DMA_NONE to identify the pio mode, and steals sgl and sg_len to get pio words and numbers from clients. * mxs dmaengine has some very specific features, like sense function and the special NAND support (nand_lock, nand_wait4ready). These are too specific to implemented in generic dmaengine driver. * The driver refers to imx-sdma and only a single descriptor is statically assigned to each channel. Signed-off-by: NShawn Guo <shawn.guo@freescale.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-