1. 11 6月, 2012 1 次提交
    • J
      drm/radeon: fix tiling and command stream checking on evergreen v3 · d2609875
      Jerome Glisse 提交于
      Fix regresson since the introduction of command stream checking on
      evergreen (thread referenced below). Issue is cause by ddx allocating
      bo with formula width*height*bpp while programming the GPU command
      stream with ALIGN(height, 8). In some case (where page alignment does
      not hide the extra size bo should be according to height alignment)
      the kernel will reject the command stream.
      
      This patch reprogram the command stream to slice - 1 (slice is
      a derivative value from height) which avoid rejecting the command
      stream while keeping the value of command stream checking from a
      security point of view.
      
      This patch also fix wrong computation of layer size for 2D tiled
      surface. Which should fix issue when 2D color tiling is enabled.
      This dump the radeon KMS_DRIVER_MINOR so userspace can know if
      they are on a fixed kernel or not.
      
      https://lkml.org/lkml/2012/6/3/80
      https://bugs.freedesktop.org/show_bug.cgi?id=50892
      https://bugs.freedesktop.org/show_bug.cgi?id=50857
      
      !!! STABLE need a custom version of this patch for 3.4 !!!
      
      v2: actually bump the minor version and add comment about stable
      v3: do compute the height the ddx was trying to use
      
      [airlied: drop left over debug]
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      d2609875
  2. 09 6月, 2012 1 次提交
    • L
      Revert "drm/i915/crt: Do not rely upon the HPD presence pin" · 8f53369b
      Linus Torvalds 提交于
      This reverts commit 9e612a00.
      
      It incorrectly finds VGA connectors where none are attached, apparently
      not noticing that nothing replied to the EDID queries, and happily using
      the default EDID modes that have nothing to do with actual hardware.
      
      That in turn then causes X to fall down to the lowest common
      denominator, which is usually the default 1024x768 mode that is in the
      default EDID and pretty much anything supports).
      
      I'd suggest that if not relying on the HDP pin, the code should at least
      check whether it gets valid EDID data back, rather than just assume
      there's something on the VGA connector.
      
      Cc: Dave Airlie <airlied@linux.ie>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      8f53369b
  3. 07 6月, 2012 1 次提交
  4. 06 6月, 2012 1 次提交
  5. 05 6月, 2012 14 次提交
  6. 02 6月, 2012 6 次提交
  7. 01 6月, 2012 5 次提交
  8. 31 5月, 2012 10 次提交
  9. 30 5月, 2012 1 次提交
    • C
      drm/i915: Reset last_retired_head when resetting ring · c3b20037
      Chris Wilson 提交于
      When we reset the ring control registers, including the HEAD and TAIL of
      the ring, we also need to reset associated state. In this instance, we
      were failing to reset the cached value of ring->last_retired_head and so
      upon the first request for more space following a resume would
      potentially (depending on a narrow race window) believe that the HEAD had
      advanced much further than reality.
      
      This is a regression from:
      
      commit a71d8d94
      Author: Chris Wilson <chris@chris-wilson.co.uk>
      Date:   Wed Feb 15 11:25:36 2012 +0000
      
          drm/i915: Record the tail at each request and use it to estimate the head
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: stable@vger.kernel.org # 3.4
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      c3b20037