1. 20 12月, 2007 2 次提交
  2. 12 7月, 2007 2 次提交
  3. 29 6月, 2007 1 次提交
  4. 14 6月, 2007 1 次提交
    • B
      [POWERPC] Rewrite IO allocation & mapping on powerpc64 · 3d5134ee
      Benjamin Herrenschmidt 提交于
      This rewrites pretty much from scratch the handling of MMIO and PIO
      space allocations on powerpc64.  The main goals are:
      
       - Get rid of imalloc and use more common code where possible
       - Simplify the current mess so that PIO space is allocated and
         mapped in a single place for PCI bridges
       - Handle allocation constraints of PIO for all bridges including
         hot plugged ones within the 2GB space reserved for IO ports,
         so that devices on hotplugged busses will now work with drivers
         that assume IO ports fit in an int.
       - Cleanup and separate tracking of the ISA space in the reserved
         low 64K of IO space. No ISA -> Nothing mapped there.
      
      I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
      far, that's it :-)
      
      With this patch, all allocations are done using the code in
      mm/vmalloc.c, though we use the low level __get_vm_area with
      explicit start/stop constraints in order to manage separate
      areas for vmalloc/vmap, ioremap, and PCI IOs.
      
      This greatly simplifies a lot of things, as you can see in the
      diffstat of that patch :-)
      
      A new pair of functions pcibios_map/unmap_io_space() now replace
      all of the previous code that used to manipulate PCI IOs space.
      The allocation is done at mapping time, which is now called from
      scan_phb's, just before the devices are probed (instead of after,
      which is by itself a bug fix). The only other caller is the PCI
      hotplug code for hot adding PCI-PCI bridges (slots).
      
      imalloc is gone, as is the "sub-allocation" thing, but I do beleive
      that hotplug should still work in the sense that the space allocation
      is always done by the PHB, but if you unmap a child bus of this PHB
      (which seems to be possible), then the code should properly tear
      down all the HPTE mappings for that area of the PHB allocated IO space.
      
      I now always reserve the first 64K of IO space for the bridge with
      the ISA bus on it. I have moved the code for tracking ISA in a separate
      file which should also make it smarter if we ever are capable of
      hot unplugging or re-plugging an ISA bridge.
      
      This should have a side effect on platforms like powermac where VGA IOs
      will no longer work. This is done on purpose though as they would have
      worked semi-randomly before. The idea at this point is to isolate drivers
      that might need to access those and fix them by providing a proper
      function to obtain an offset to the legacy IOs of a given bus.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      3d5134ee
  5. 09 3月, 2007 2 次提交
  6. 08 12月, 2006 1 次提交
    • R
      [POWERPC] Define pci_unmap_addr() et al. when CONFIG_NOT_COHERENT_CACHE=y · 1d4454e7
      Roland Dreier 提交于
      The current PowerPC code makes pci_unmap_addr(), pci_unmap_addr_set(),
      and friends trivial for all 32-bit kernels.  This is reasonable, since
      for those kernels it is true that pci_unmap_single() does not need the
      DMA address from the original DMA mapping -- in fact, it is a NOP.
      
      However, I recently tried the tg3 driver on a PowerPC 440SPe machine,
      which runs a 32-bit kernel and has non-cache-coherent PCI DMA.  I
      found that the tg3 driver crashed in pci_dma_sync_single_for_cpu(),
      since for non-coherent systems, that function must invalidate the
      cache for the DMA address range requested, and therefore it does use
      the address passed in.  tg3 uses a DMA address it stashes away with
      pci_unmap_addr_set() and retrieves with pci_unmap_addr().  Of course,
      since pci_unmap_addr() is defined to (0) right now, this doesn't work.
      
      It seems to me that the tg3 driver is using pci_unmap_addr() in a
      legitimate way -- I wouldn't want to have to teach all drivers that
      they should use pci_unmap_addr() if they only need the address for
      unmapping functions, but if they want the pci_dma_sync functions, then
      they have to store the DMA address without the helper macros.
      The right fix therefore seems to be in the definition of the macros in
      <asm/pci.h> -- we should use the trivial versions only for 32-bit
      kernels for coherent systems, and the real versions for both 64-bit
      kernels and non-coherent systems.
      Signed-off-by: NRoland Dreier <rolandd@cisco.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      1d4454e7
  7. 04 12月, 2006 1 次提交
    • B
      [POWERPC] Refactor 64 bits DMA operations · 12d04eef
      Benjamin Herrenschmidt 提交于
      This patch completely refactors DMA operations for 64 bits powerpc. 32 bits
      is untouched for now.
      
      We use the new dev_archdata structure to add the dma operations pointer
      and associated data to struct device. While at it, we also add the OF node
      pointer and numa node. In the future, we might want to look into merging
      that with pci_dn as well.
      
      The old vio, pci-iommu and pci-direct DMA ops are gone. They are now replaced
      by a set of generic iommu and direct DMA ops (non PCI specific) that can be
      used by bus types. The toplevel implementation is now inline.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      12d04eef
  8. 02 12月, 2006 1 次提交
  9. 13 11月, 2006 1 次提交
  10. 28 6月, 2006 1 次提交
  11. 09 1月, 2006 1 次提交
  12. 19 11月, 2005 1 次提交
    • P
      powerpc: Merge pci.h · f8ef2705
      Paul Mackerras 提交于
      This involves some minor changes: a few unused functions that the
      ppc32 pci.c provides are no longer declared here or exported;
      pcibios_assign_all_busses now just refers to the pci_assign_all_buses
      variable on both 32-bit and 64-bit; pcibios_scan_all_fns is now
      just 0 instead of a function that always returns 0 on 64-bit.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      f8ef2705
  13. 07 11月, 2005 1 次提交
  14. 29 10月, 2005 1 次提交
    • R
      [PATCH] ppc: make phys_mem_access_prot() work with pfns instead of addresses · 8b150478
      Roland Dreier 提交于
      Change the phys_mem_access_prot() function to take a pfn instead of an
      address.  This allows mmap64() to work on /dev/mem for addresses above 4G
      on 32-bit architectures.  We start with a pfn in mmap_mem(), so there's no
      need to convert to an address; in fact, it's actively bad, since the
      conversion can overflow when the address is above 4G.
      
      Similarly fix the ppc32 page_is_ram() function to avoid a conversion to an
      address by directly comparing to max_pfn.  Working with max_pfn instead of
      high_memory fixes page_is_ram() to give the right answer for highmem pages.
      Signed-off-by: NRoland Dreier <rolandd@cisco.com>
      Cc: Anton Blanchard <anton@samba.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      8b150478
  15. 09 9月, 2005 1 次提交
    • D
      [PATCH] Make sparc64 use setup-res.c · 085ae41f
      David S. Miller 提交于
      There were three changes necessary in order to allow
      sparc64 to use setup-res.c:
      
      1) Sparc64 roots the PCI I/O and MEM address space using
         parent resources contained in the PCI controller structure.
         I'm actually surprised no other platforms do this, especially
         ones like Alpha and PPC{,64}.  These resources get linked into the
         iomem/ioport tree when PCI controllers are probed.
      
         So the hierarchy looks like this:
      
         iomem --|
      	   PCI controller 1 MEM space --|
      				        device 1
      					device 2
      					etc.
      	   PCI controller 2 MEM space --|
      				        ...
         ioport --|
                  PCI controller 1 IO space --|
      					...
                  PCI controller 2 IO space --|
      					...
      
         You get the idea.  The drivers/pci/setup-res.c code allocates
         using plain iomem_space and ioport_space as the root, so that
         wouldn't work with the above setup.
      
         So I added a pcibios_select_root() that is used to handle this.
         It uses the PCI controller struct's io_space and mem_space on
         sparc64, and io{port,mem}_resource on every other platform to
         keep current behavior.
      
      2) quirk_io_region() is buggy.  It takes in raw BUS view addresses
         and tries to use them as a PCI resource.
      
         pci_claim_resource() expects the resource to be fully formed when
         it gets called.  The sparc64 implementation would do the translation
         but that's absolutely wrong, because if the same resource gets
         released then re-claimed we'll adjust things twice.
      
         So I fixed up quirk_io_region() to do the proper pcibios_bus_to_resource()
         conversion before passing it on to pci_claim_resource().
      
      3) I was mistakedly __init'ing the function methods the PCI controller
         drivers provide on sparc64 to implement some parts of these
         routines.  This was, of course, easy to fix.
      
      So we end up with the following, and that nasty SPARC64 makefile
      ifdef in drivers/pci/Makefile is finally zapped.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      085ae41f
  16. 05 8月, 2005 1 次提交
  17. 12 7月, 2005 1 次提交
  18. 28 6月, 2005 3 次提交
    • A
      [PATCH] PCI: fix up errors after dma bursting patch and CONFIG_PCI=n · bb4a61b6
      Andrew Morton 提交于
      With CONFIG_PCI=n:
      
      In file included from include/linux/pci.h:917,
                       from lib/iomap.c:6:
      include/asm/pci.h:104: warning: `enum pci_dma_burst_strategy' declared inside parameter list
      include/asm/pci.h:104: warning: its scope is only this definition or declaration, which is probably not what you want.
      include/asm/pci.h: In function `pci_dma_burst_advice':
      include/asm/pci.h:106: dereferencing pointer to incomplete type
      include/asm/pci.h:106: `PCI_DMA_BURST_INFINITY' undeclared (first use in this function)
      include/asm/pci.h:106: (Each undeclared identifier is reported only once
      include/asm/pci.h:106: for each function it appears in.)
      make[1]: *** [lib/iomap.o] Error 1
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      bb4a61b6
    • D
      [PATCH] PCI: DMA bursting advice · e24c2d96
      David S. Miller 提交于
      After seeing, at best, "guesses" as to the following kind
      of information in several drivers, I decided that we really
      need a way for platforms to specifically give advice in this
      area for what works best with their PCI controller implementation.
      
      Basically, this new interface gives DMA bursting advice on
      PCI.  There are three forms of the advice:
      
      1) Burst as much as possible, it is not necessary to end bursts
         on some particular boundary for best performance.
      
      2) Burst on some byte count multiple.  A DMA burst to some multiple of
         number of bytes may be done, but it is important to end the burst
         on an exact multiple for best performance.
      
         The best example of this I am aware of are the PPC64 PCI
         controllers, where if you end a burst mid-cacheline then
         chip has to refetch the data and the IOMMU translations
         which hurts performance a lot.
      
      3) Burst on a single byte count multiple.  Bursts shall end
         exactly on the next multiple boundary for best performance.
      
         Sparc64 and Alpha's PCI controllers operate this way.  They
         disconnect any device which tries to burst across a cacheline
         boundary.
      
         Actually, newer sparc64 PCI controllers do not have this behavior.
         That is why the "pdev" is passed into the interface, so I can
         add code later to check which PCI controller the system is using
         and give advice accordingly.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      e24c2d96
    • M
      [PATCH] PCI: fix-pci-mmap-on-ppc-and-ppc64.patch · 2311b1f2
      Michael Ellerman 提交于
      This is an updated version of Ben's fix-pci-mmap-on-ppc-and-ppc64.patch
      which is in 2.6.12-rc4-mm1.
      
      It fixes the patch to work on PPC iSeries, removes some debug printks
      at Ben's request, and incorporates your
      fix-pci-mmap-on-ppc-and-ppc64-fix.patch also.
      
      Originally from Benjamin Herrenschmidt <benh@kernel.crashing.org>
      
      This patch was discussed at length on linux-pci and so far, the last
      iteration of it didn't raise any comment.  It's effect is a nop on
      architecture that don't define the new pci_resource_to_user() callback
      anyway.  It allows architecture like ppc who put weird things inside of
      PCI resource structures to convert to some different value for user
      visible ones.  It also fixes mmap'ing of IO space on those archs.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      2311b1f2
  19. 17 4月, 2005 1 次提交
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4