1. 03 7月, 2012 14 次提交
  2. 01 7月, 2012 2 次提交
  3. 29 6月, 2012 7 次提交
  4. 28 6月, 2012 2 次提交
  5. 27 6月, 2012 2 次提交
    • J
      ARM: OMAP4470: Fix OMAP4470 boot failure · e90b833e
      Jon Hunter 提交于
      OMAP4470 currently fails to boot, printing various messages such as ...
      
      omap_hwmod: mpu: cannot clk_get main_clk dpll_mpu_m2_ck
      omap_hwmod: mpu: cannot _init_clocks
      ------------[ cut here ]------------
      WARNING: at arch/arm/mach-omap2/omap_hwmod.c:2062 _init+0x2a0/0x2e4()
      omap_hwmod: mpu: couldn't init clocks
      Modules linked in:
      [<c001c7fc>] (unwind_backtrace+0x0/0xf4) from [<c0043c64>] (warn_slowpath_common+0x4c/0x64)
      [<c0043c64>] (warn_slowpath_common+0x4c/0x64) from [<c0043d10>] (warn_slowpath_fmt+0x30/0x40)
      [<c0043d10>] (warn_slowpath_fmt+0x30/0x40) from [<c0674208>] (_init+0x2a0/0x2e4)
      [<c0674208>] (_init+0x2a0/0x2e4) from [<c067428c>] (omap_hwmod_setup_one+0x40/0x60)
      [<c067428c>] (omap_hwmod_setup_one+0x40/0x60) from [<c0674280>] (omap_hwmod_setup_one+0x34/0x60)
      [<c0674280>] (omap_hwmod_setup_one+0x34/0x60) from [<c06726f4>] (omap_dm_timer_init_one+0x30/0x250)
      [<c06726f4>] (omap_dm_timer_init_one+0x30/0x250) from [<c0672930>] (omap2_gp_clockevent_init+0x1c/0x108)
      [<c0672930>] (omap2_gp_clockevent_init+0x1c/0x108) from [<c0672c60>] (omap4_timer_init+0x10/0x5c)
      [<c0672c60>] (omap4_timer_init+0x10/0x5c) from [<c066c418>] (time_init+0x20/0x30)
      [<c066c418>] (time_init+0x20/0x30) from [<c0668814>] (start_kernel+0x1b0/0x304)
      [<c0668814>] (start_kernel+0x1b0/0x304) from [<80008044>] (0x80008044)
      ---[ end trace 1b75b31a2719ed1c ]---
      
      The problem is that currently none of the clocks are being registered for
      OMAP4470 devices and so on boot-up no clocks can be found and the kernel panics.
      
      This fix allows the kernel to boot without failure using a simple RAMDISK file
      system on OMAP4470 blaze board.
      
      Per feedback from Paul and Benoit the 4470 clock data is incomplete for new
      modules such as the 2D graphics block that has been added to the 4470.
      Therefore add a warning to indicate that the clock data is incomplete.
      
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Benoit Cousson <b-cousson@ti.com>
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      [tony@atomide.com: updated comments]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      e90b833e
    • S
      ARM: EXYNOS: Fix EXYNOS_DEV_DMA Kconfig entry · 58c553d4
      Sachin Kamat 提交于
      Commit 20ef9e08 ("ARM: EXYNOS: Support DMA for EXYNOS5250 SoC")
      renamed EXYNOS4_DEV_DMA to EXYNOS_DEV_DMA. But some machine entries
      still had EXYNOS4_DEV_DMA. Changed them to EXYNOS_DEV_DMA.
      Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
      Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
      58c553d4
  6. 26 6月, 2012 4 次提交
  7. 25 6月, 2012 3 次提交
    • M
      ARM: dma-mapping: fix buffer chunk allocation order · 593f4735
      Marek Szyprowski 提交于
      IOMMU-aware dma_alloc_attrs() implementation allocates buffers in
      power-of-two chunks to improve performance and take advantage of large
      page mappings provided by some IOMMU hardware. However current code, due
      to a subtle bug, allocated those chunks in the smallest-to-largest
      order, what completely killed all the advantages of using larger than
      page chunks. If a 4KiB chunk has been mapped as a first chunk, the
      consecutive chunks are not aligned correctly to the power-of-two which
      match their size and IOMMU drivers were not able to use internal
      mappings of size other than the 4KiB (largest common denominator of
      alignment and chunk size).
      
      This patch fixes this issue by changing to the correct largest-to-smallest
      chunk size allocation sequence.
      Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
      593f4735
    • G
      m68knommu: define a local devm_clk_get() function · 19a1d332
      Greg Ungerer 提交于
      Commit f4d40de3 ("net fec: do not depend
      on grouped clocks") breaks compilation of the FEC driver for non iMX
      platforms in linux-3.5-rc1. For example when compiling for ColdFire I get:
      
            LD      vmlinux
          drivers/built-in.o: In function `fec_probe':
          fec.c:(.devinit.text+0x1e0): undefined reference to `devm_clk_get'
      
      Define a simple devm_clk_get() function for the m68knommu architecture.
      Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
      19a1d332
    • A
      Fix typo in printed messages · 02b7d834
      Anatol Pomozov 提交于
      Coult -> Could
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      02b7d834
  8. 24 6月, 2012 3 次提交
  9. 23 6月, 2012 2 次提交
    • P
      ARM: shmobile: r8a7779: Route all interrupts to ARM · 86f887c1
      Phil Edworthy 提交于
      Without this, the interrupts for I2C, VIN, GPIO, SDHC, HSCIF and
      HPB-DMAC are sent to the SH processor.
      Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com>
      Acked-by: NMagnus Damm <damm@opensource.se>
      Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
      86f887c1
    • D
      ARM: 7428/1: Prevent KALLSYM size mismatch on ARM. · 9973290c
      David Brown 提交于
      ARM builds seem to be plagued by an occasional build error:
      
          Inconsistent kallsyms data
          This is a bug - please report about it
          Try "make KALLSYMS_EXTRA_PASS=1" as a workaround
      
      The problem has to do with alignment of some sections by the linker.
      The kallsyms data is built in two passes by first linking the kernel
      without it, and then linking the kernel again with the symbols
      included.  Normally, this just shifts the symbols, without changing
      their order, and the compression used by the kallsyms gives the same
      result.
      
      On non SMP, the per CPU data is empty.  Depending on the where the
      alignment ends up, it can come out as either:
      
         +-------------------+
         | last text segment |
         +-------------------+
         /* padding */
         +-------------------+     <- L1_CACHE_BYTES alignemnt
         | per cpu (empty)   |
         +-------------------+
      __per_cpu_end:
         /* padding */
      __data_loc:
         +-------------------+     <- THREAD_SIZE alignment
         | data              |
         +-------------------+
      
      or
      
         +-------------------+
         | last text segment |
         +-------------------+
         /* padding */
         +-------------------+     <- L1_CACHE_BYTES alignemnt
         | per cpu (empty)   |
         +-------------------+
      __per_cpu_end:
         /* no padding */
      __data_loc:
         +-------------------+     <- THREAD_SIZE alignment
         | data              |
         +-------------------+
      
      if the alignment satisfies both.  Because symbols that have the same
      address are sorted by 'nm -n', the second case will be in a different
      order than the first case.  This changes the compression, changing the
      size of the kallsym data, causing the build failure.
      
      The KALLSYMS_EXTRA_PASS=1 workaround usually works, but it is still
      possible to have the alignment change between the second and third
      pass.  It's probably even possible for it to never reach a fixedpoint.
      
      The problem only occurs on non-SMP, when the per-cpu data is empty,
      and when the data segment has alignment (and immediately follows the
      text segments).  Fix this by only including the per_cpu section on
      SMP, when it is not empty.
      Signed-off-by: NDavid Brown <davidb@codeaurora.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      9973290c
  10. 22 6月, 2012 1 次提交