- 20 10月, 2008 1 次提交
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由 Lennert Buytenhek 提交于
This adds DSA switch instantiation hooks to the orion5x and the kirkwood ARM SoC platform code, and instantiates the DSA switch driver on the 88F5181L FXO RD, the 88F5181L GE RD, the 6183 AP GE RD, the Linksys WRT350n v2, and the 88F6281 RD boards. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Tested-by: NNicolas Pitre <nico@marvell.com> Tested-by: NPeter van Valderen <linux@ddcrew.com> Tested-by: NDirk Teurlings <dirk@upexia.nl> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 05 9月, 2008 1 次提交
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由 Lennert Buytenhek 提交于
Currently, there are two different fields in the mv643xx_eth_platform_data struct that together describe the PHY address -- one field (phy_addr) has the address of the PHY, but if that address is zero, a second field (force_phy_addr) needs to be set to distinguish the actual address zero from a zero due to not having filled in the PHY address explicitly (which should mean 'use the default PHY address'). If we are a bit smarter about the encoding of the phy_addr field, we can avoid the need for a second field -- this patch does that. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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- 07 8月, 2008 1 次提交
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由 Russell King 提交于
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 24 7月, 2008 1 次提交
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由 Lennert Buytenhek 提交于
The mv643xx_eth hardware has a provision for polling the PHY's MII management registers to obtain the (R)(G)MII interface speed (10/100/1000) and duplex (half/full) and pause (off/symmetric) settings to use to talk to the PHY. The driver currently does not make use of this feature. Instead, whenever there is a link status change event, it reads the current link parameters from the PHY, and programs those parameters into the mv643xx_eth MAC by hand. This patch switches the mv643xx_eth driver to letting the MAC auto-determine the (R)(G)MII link parameters by PHY polling, if there is a PHY present. For PHYless ports (when e.g. the (R)(G)MII interface is connected to a hardware switch), we keep hardcoding the MII interface parameters. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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- 08 7月, 2008 2 次提交
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由 Nicolas Pitre 提交于
This patch adds support for the Marvell Orion-VoIP RD-88F5181L-FXO Reference Design, and enables use of the ethernet, USB, Cardbus and mini-PCIe ports. Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Lennert Buytenhek 提交于
This patch adds support for the Marvell Orion-VoIP RD2-88F5181L-GE Reference Design, and enables use of the ethernet, USB, Cardbus and mini-PCIe ports. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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