1. 21 4月, 2008 3 次提交
  2. 23 2月, 2008 1 次提交
  3. 18 2月, 2008 1 次提交
    • A
      [CRYPTO] null: Add missing Kconfig dependency on BLKCIPHER · c8620c25
      Adrian Bunk 提交于
      This patch fixes the following build error caused by commit 
      3631c650:
      
      <--  snip  -->
      
      ...
        LD      .tmp_vmlinux1
      crypto/built-in.o: In function `skcipher_null_crypt':
      crypto_null.c:(.text+0x3d14): undefined reference to `blkcipher_walk_virt'
      crypto_null.c:(.text+0x3d14): relocation truncated to fit: R_MIPS_26 against `blkcipher_walk_virt'
      crypto/built-in.o: In function `$L32':
      crypto_null.c:(.text+0x3d54): undefined reference to `blkcipher_walk_done'
      crypto_null.c:(.text+0x3d54): relocation truncated to fit: R_MIPS_26 against `blkcipher_walk_done'
      crypto/built-in.o:(.data+0x2e8): undefined reference to `crypto_blkcipher_type'
      make[1]: *** [.tmp_vmlinux1] Error 1
      
      <--  snip  -->
      Signed-off-by: NAdrian Bunk <bunk@kernel.org>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      c8620c25
  4. 15 2月, 2008 1 次提交
  5. 11 1月, 2008 17 次提交
  6. 11 10月, 2007 5 次提交
    • R
      [CRYPTO] xts: XTS blockcipher mode implementation without partial blocks · f19f5111
      Rik Snel 提交于
      XTS currently considered to be the successor of the LRW mode by the IEEE1619
      workgroup. LRW was discarded, because it was not secure if the encyption key
      itself is encrypted with LRW.
      
      XTS does not have this problem. The implementation is pretty straightforward,
      a new function was added to gf128mul to handle GF(128) elements in ble format.
      Four testvectors from the specification
      	http://grouper.ieee.org/groups/1619/email/pdf00086.pdf
      were added, and they verify on my system.
      Signed-off-by: NRik Snel <rsnel@cube.dyndns.org>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      f19f5111
    • H
      [CRYPTO] aead: Add authenc · 3c09f17c
      Herbert Xu 提交于
      This patch adds the authenc algorithm which constructs an AEAD algorithm
      from an asynchronous block cipher and a hash.  The construction is done
      by concatenating the encrypted result from the cipher with the output
      from the hash, as is used by the IPsec ESP protocol.
      
      The authenc algorithm exists as a template with four parameters:
      
      	authenc(auth, authsize, enc, enckeylen).
      
      The authentication algorithm, the authentication size (i.e., truncating
      the output of the authentication algorithm), the encryption algorithm,
      and the encryption key length.  Both the size field and the key length
      field are in bytes.  For example, AES-128 with SHA1-HMAC would be
      represented by
      
      	authenc(hmac(sha1), 12, cbc(aes), 16)
      
      The key for the authenc algorithm is the concatenation of the keys for
      the authentication algorithm with the encryption algorithm.  For the
      above example, if a key of length 36 bytes is given, then hmac(sha1)
      would receive the first 20 bytes while the last 16 would be given to
      cbc(aes).
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      3c09f17c
    • H
      [CRYPTO] api: Add aead crypto type · 1ae97820
      Herbert Xu 提交于
      This patch adds crypto_aead which is the interface for AEAD
      (Authenticated Encryption with Associated Data) algorithms.
      
      AEAD algorithms perform authentication and encryption in one
      step.  Traditionally users (such as IPsec) would use two
      different crypto algorithms to perform these.  With AEAD
      this comes down to one algorithm and one operation.
      
      Of course if traditional algorithms were used we'd still
      be doing two operations underneath.  However, real AEAD
      algorithms may allow the underlying operations to be
      optimised as well.
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      1ae97820
    • H
      [CRYPTO] seed: New cipher algorithm · e2ee95b8
      Hye-Shik Chang 提交于
      This patch adds support for the SEED cipher (RFC4269).
      
      This patch have been used in few VPN appliance vendors in Korea for
      several years.  And it was verified by KISA, who developed the
      algorithm itself.
      
      As its importance in Korean banking industry, it would be great
      if linux incorporates the support.
      Signed-off-by: NHye-Shik Chang <perky@FreeBSD.org>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      e2ee95b8
    • A
      [CRYPTO] Kconfig: Remove "default m"s · a349365e
      Adrian Bunk 提交于
      Other options requiring specific block cipher algorithms already have
      the appropriate select's.
      Signed-off-by: NAdrian Bunk <bunk@stusta.de>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      a349365e
  7. 13 7月, 2007 2 次提交
    • D
      async_tx: add the async_tx api · 9bc89cd8
      Dan Williams 提交于
      The async_tx api provides methods for describing a chain of asynchronous
      bulk memory transfers/transforms with support for inter-transactional
      dependencies.  It is implemented as a dmaengine client that smooths over
      the details of different hardware offload engine implementations.  Code
      that is written to the api can optimize for asynchronous operation and the
      api will fit the chain of operations to the available offload resources. 
       
      	I imagine that any piece of ADMA hardware would register with the
      	'async_*' subsystem, and a call to async_X would be routed as
      	appropriate, or be run in-line. - Neil Brown
      
      async_tx exploits the capabilities of struct dma_async_tx_descriptor to
      provide an api of the following general format:
      
      struct dma_async_tx_descriptor *
      async_<operation>(..., struct dma_async_tx_descriptor *depend_tx,
      			dma_async_tx_callback cb_fn, void *cb_param)
      {
      	struct dma_chan *chan = async_tx_find_channel(depend_tx, <operation>);
      	struct dma_device *device = chan ? chan->device : NULL;
      	int int_en = cb_fn ? 1 : 0;
      	struct dma_async_tx_descriptor *tx = device ?
      		device->device_prep_dma_<operation>(chan, len, int_en) : NULL;
      
      	if (tx) { /* run <operation> asynchronously */
      		...
      		tx->tx_set_dest(addr, tx, index);
      		...
      		tx->tx_set_src(addr, tx, index);
      		...
      		async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param);
      	} else { /* run <operation> synchronously */
      		...
      		<operation>
      		...
      		async_tx_sync_epilog(flags, depend_tx, cb_fn, cb_param);
      	}
      
      	return tx;
      }
      
      async_tx_find_channel() returns a capable channel from its pool.  The
      channel pool is organized as a per-cpu array of channel pointers.  The
      async_tx_rebalance() routine is tasked with managing these arrays.  In the
      uniprocessor case async_tx_rebalance() tries to spread responsibility
      evenly over channels of similar capabilities.  For example if there are two
      copy+xor channels, one will handle copy operations and the other will
      handle xor.  In the SMP case async_tx_rebalance() attempts to spread the
      operations evenly over the cpus, e.g. cpu0 gets copy channel0 and xor
      channel0 while cpu1 gets copy channel 1 and xor channel 1.  When a
      dependency is specified async_tx_find_channel defaults to keeping the
      operation on the same channel.  A xor->copy->xor chain will stay on one
      channel if it supports both operation types, otherwise the transaction will
      transition between a copy and a xor resource.
      
      Currently the raid5 implementation in the MD raid456 driver has been
      converted to the async_tx api.  A driver for the offload engines on the
      Intel Xscale series of I/O processors, iop-adma, is provided in a later
      commit.  With the iop-adma driver and async_tx, raid456 is able to offload
      copy, xor, and xor-zero-sum operations to hardware engines.
       
      On iop342 tiobench showed higher throughput for sequential writes (20 - 30%
      improvement) and sequential reads to a degraded array (40 - 55%
      improvement).  For the other cases performance was roughly equal, +/- a few
      percentage points.  On a x86-smp platform the performance of the async_tx
      implementation (in synchronous mode) was also +/- a few percentage points
      of the original implementation.  According to 'top' on iop342 CPU
      utilization drops from ~50% to ~15% during a 'resync' while the speed
      according to /proc/mdstat doubles from ~25 MB/s to ~50 MB/s.
       
      The tiobench command line used for testing was: tiobench --size 2048
      --block 4096 --block 131072 --dir /mnt/raid --numruns 5
      * iop342 had 1GB of memory available
      
      Details:
      * if CONFIG_DMA_ENGINE=n the asynchronous path is compiled away by making
        async_tx_find_channel a static inline routine that always returns NULL
      * when a callback is specified for a given transaction an interrupt will
        fire at operation completion time and the callback will occur in a
        tasklet.  if the the channel does not support interrupts then a live
        polling wait will be performed
      * the api is written as a dmaengine client that requests all available
        channels
      * In support of dependencies the api implicitly schedules channel-switch
        interrupts.  The interrupt triggers the cleanup tasklet which causes
        pending operations to be scheduled on the next channel
      * Xor engines treat an xor destination address differently than a software
        xor routine.  To the software routine the destination address is an implied
        source, whereas engines treat it as a write-only destination.  This patch
        modifies the xor_blocks routine to take a an explicit destination address
        to mirror the hardware.
      
      Changelog:
      * fixed a leftover debug print
      * don't allow callbacks in async_interrupt_cond
      * fixed xor_block changes
      * fixed usage of ASYNC_TX_XOR_DROP_DEST
      * drop dma mapping methods, suggested by Chris Leech
      * printk warning fixups from Andrew Morton
      * don't use inline in C files, Adrian Bunk
      * select the API when MD is enabled
      * BUG_ON xor source counts <= 1
      * implicitly handle hardware concerns like channel switching and
        interrupts, Neil Brown
      * remove the per operation type list, and distribute operation capabilities
        evenly amongst the available channels
      * simplify async_tx_find_channel to optimize the fast path
      * introduce the channel_table_initialized flag to prevent early calls to
        the api
      * reorganize the code to mimic crypto
      * include mm.h as not all archs include it in dma-mapping.h
      * make the Kconfig options non-user visible, Adrian Bunk
      * move async_tx under crypto since it is meant as 'core' functionality, and
        the two may share algorithms in the future
      * move large inline functions into c files
      * checkpatch.pl fixes
      * gpl v2 only correction
      
      Cc: Herbert Xu <herbert@gondor.apana.org.au>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      Acked-By: NNeilBrown <neilb@suse.de>
      9bc89cd8
    • D
      xor: make 'xor_blocks' a library routine for use with async_tx · 685784aa
      Dan Williams 提交于
      The async_tx api tries to use a dma engine for an operation, but will fall
      back to an optimized software routine otherwise.  Xor support is
      implemented using the raid5 xor routines.  For organizational purposes this
      routine is moved to a common area.
      
      The following fixes are also made:
      * rename xor_block => xor_blocks, suggested by Adrian Bunk
      * ensure that xor.o initializes before md.o in the built-in case
      * checkpatch.pl fixes
      * mark calibrate_xor_blocks __init, Adrian Bunk
      
      Cc: Adrian Bunk <bunk@stusta.de>
      Cc: NeilBrown <neilb@suse.de>
      Cc: Herbert Xu <herbert@gondor.apana.org.au>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      685784aa
  8. 11 7月, 2007 1 次提交
  9. 09 5月, 2007 1 次提交
  10. 02 5月, 2007 2 次提交
  11. 07 2月, 2007 3 次提交
  12. 06 2月, 2007 1 次提交
  13. 07 12月, 2006 2 次提交
    • R
      [CRYPTO] lrw: Liskov Rivest Wagner, a tweakable narrow block cipher mode · 64470f1b
      Rik Snel 提交于
      Main module, this implements the Liskov Rivest Wagner block cipher mode
      in the new blockcipher API. The implementation is based on ecb.c.
      
      The LRW-32-AES specification I used can be found at:
      http://grouper.ieee.org/groups/1619/email/pdf00017.pdf
      
      It implements the optimization specified as optional in the
      specification, and in addition it uses optimized multiplication
      routines from gf128mul.c.
      
      Since gf128mul.[ch] is not tested on bigendian, this cipher mode
      may currently fail badly on bigendian machines.
      Signed-off-by: NRik Snel <rsnel@cube.dyndns.org>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      64470f1b
    • R
      [CRYPTO] lib: table driven multiplications in GF(2^128) · c494e070
      Rik Snel 提交于
      A lot of cypher modes need multiplications in GF(2^128). LRW, ABL, GCM...
      I use functions from this library in my LRW implementation and I will
      also use them in my ABL (Arbitrary Block Length, an unencumbered (correct
      me if I am wrong, wide block cipher mode).
      
      Elements of GF(2^128) must be presented as u128 *, it encourages automatic
      and proper alignment.
      
      The library contains support for two different representations of GF(2^128),
      see the comment in gf128mul.h. There different levels of optimization
      (memory/speed tradeoff).
      
      The code is based on work by Dr Brian Gladman. Notable changes:
      - deletion of two optimization modes
      - change from u32 to u64 for faster handling on 64bit machines
      - support for 'bbe' representation in addition to the, already implemented,
        'lle' representation.
      - move 'inline void' functions from header to 'static void' in the
        source file
      - update to use the linux coding style conventions
      
      The original can be found at:
      http://fp.gladman.plus.com/AES/modes.vc8.19-06-06.zip
      
      The copyright (and GPL statement) of the original author is preserved.
      Signed-off-by: NRik Snel <rsnel@cube.dyndns.org>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      c494e070