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  1. 26 6月, 2008 1 次提交
  3. 19 6月, 2008 1 次提交
    • K
      powerpc/booke: Add support for new e500mc core · 3dfa8773
      由 Kumar Gala 提交于 
      The new e500mc core from Freescale is based on the e500v2 but with the
following changes:

* Supports only the Enhanced Debug Architecture (DSRR0/1, etc)
* Floating Point
* No SPE
* Supports lwsync
* Doorbell Exceptions
* Hypervisor
* Cache line size is now 64-bytes (e500v1/v2 have a 32-byte cache line)
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      3dfa8773
  5. 12 6月, 2008 1 次提交
  7. 09 6月, 2008 4 次提交
  9. 03 6月, 2008 3 次提交
    • K
      [POWERPC] 40x/Book-E: Save/restore volatile exception registers · fca622c5
      由 Kumar Gala 提交于 
      On machines with more than one exception level any system register that
might be modified by the "normal" exception level needs to be saved and
restored on taking a higher level exception.  We already are saving
and restoring ESR and DEAR.

For critical level add SRR0/1.
For debug level add CSRR0/1 and SRR0/1.
For machine check level add DSRR0/1, CSRR0/1, and SRR0/1.

On FSL Book-E parts we always save/restore the MAS registers for critical,
debug, and machine check level exceptions.  On 44x we always save/restore
the MMUCR.

Additionally, we save and restore the ksp_limit since we have to adjust it
for each exception level.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Acked-by: NPaul Mackerras <paulus@samba.org>
      fca622c5
    • K
      [POWERPC] Rework EXC_LEVEL_EXCEPTION_PROLOG code · 369e757b
      由 Kumar Gala 提交于 
      * Cleanup the code a bit my allocating an INT_FRAME on our exception
  stack there by make references go from GPR11-INT_FRAME_SIZE(r8) to
  just GPR11(r8)
* simplify {lvl}_transfer_to_handler code by moving the copying of the
  temp registers we use if we come from user space into the PROLOG
* If the exception came from kernel mode copy thread_info flags,
  preempt, and task pointer from the process thread_info.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Acked-by: NPaul Mackerras <paulus@samba.org>
      369e757b
    • K
      [POWERPC] Move to runtime allocated exception stacks · bcf0b088
      由 Kumar Gala 提交于 
      For the additonal exception levels (critical, debug, machine check) on
40x/book-e we were using "static" allocations of the stack in the
associated head.S.

Move to a runtime allocation to make the code a bit easier to read as
we mimic how we handle IRQ stacks.  Its also a bit easier to setup the
stack with a "dummy" thread_info in C code.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Acked-by: NPaul Mackerras <paulus@samba.org>
      bcf0b088
  11. 23 5月, 2008 3 次提交
  13. 17 5月, 2008 1 次提交
  15. 16 5月, 2008 2 次提交
    • S
      [POWERPC] Move of_device_get_modalias to drivers/of · 09e67ca2
      由 Stephen Rothwell 提交于 
      Commit 140b932f ("Create modalias file
in sysfs for of_platform bus") needs this to avoid breaking the sparc
builds.

Just move the code and add whitespace around some binary operators.
Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
Acked-by: NDavid S. Miller <davem@davemloft.net>
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      09e67ca2
    • P
      [POWERPC] Defer processing of interrupts when the CPU wakes from sleep mode · a560643e
      由 Paul Mackerras 提交于 
      This provides a way to defer processing of an interrupt that wakes the
processor out of sleep mode.  On 32-bit platforms that use an
interrupt to wake the processor, we have to have interrupts enabled in
hardware at the point where we go to sleep, otherwise the processor
will never wake up.  However, because interrupts are logically
disabled at this point, we don't want to process the interrupt
straight away.

This is handled by setting the _TLF_SLEEPING flag.  When we get an
interrupt and _TLF_SLEEPING is set, we firstly clear the MSR_EE
(external interrupt enable) bit in the saved MSR value, and secondly
we then return to the address in the link register, like we do for
_TLF_NAPPING, but without actually handling the interrupt.

Note that this is handled somewhat differently on powerbooks, so this
new code will only be used on non-Apple machines.
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      a560643e
  17. 14 5月, 2008 3 次提交
  19. 12 5月, 2008 2 次提交
  21. 09 5月, 2008 6 次提交
  23. 06 5月, 2008 1 次提交
    • S
      [POWERPC] 4xx: Fix problem with new TLB storage attibute fields on 440x6 core · a96df496
      由 Stefan Roese 提交于 
      The new 440x6 core used on AMCC 460EX/GT introduces new storage attibure
fields to the TLB2 word. Those are:

Bit  11   12   13   14   15
     WL1  IL1I IL1D IL2I IL2D

With these bits the cache (L1 and L2) can be configured in a more flexible
way, instruction- and data-cache independently now. The "old" I and W bits
are still available and setting these old bits will automically set these
new bits too (for backward compatibilty).

The current code does not clear these fields resulting in disabling the cache
by chance. This patch now makes sure that these new bits are cleared when
the TLB2 word is written.
Signed-off-by: NStefan Roese <sr@denx.de>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
      a96df496
  25. 04 5月, 2008 1 次提交
    • U
      unified (weak) sys_pipe implementation · d35c7b0e
      由 Ulrich Drepper 提交于 
      This replaces the duplicated arch-specific versions of "sys_pipe()" with
one unified implementation.  This removes almost 250 lines of duplicated
code.

It's marked __weak, so that *if* an architecture wants to override the
default implementation it can do so by simply having its own replacement
version, since many architectures use alternate calling conventions for
the 'pipe()' system call for legacy reasons (ie traditional UNIX
implementations often return the two file descriptors in registers)

I still haven't changed the cris version even though Linus says the BKL
isn't needed.  The arch maintainer can easily do it if there are really
no obstacles.
Signed-off-by: NUlrich Drepper <drepper@redhat.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      d35c7b0e
  27. 02 5月, 2008 1 次提交
    • P
      [POWERPC] Bolt in SLB entry for kernel stack on secondary cpus · 3b575064
      由 Paul Mackerras 提交于 
      This fixes a regression reported by Kamalesh Bulabel where a POWER4
machine would crash because of an SLB miss at a point where the SLB
miss exception was unrecoverable.  This regression is tracked at:

http://bugzilla.kernel.org/show_bug.cgi?id=10082

SLB misses at such points shouldn't happen because the kernel stack is
the only memory accessed other than things in the first segment of the
linear mapping (which is mapped at all times by entry 0 of the SLB).
The context switch code ensures that SLB entry 2 covers the kernel
stack, if it is not already covered by entry 0.  None of entries 0
to 2 are ever replaced by the SLB miss handler.

Where this went wrong is that the context switch code assumes it
doesn't have to write to SLB entry 2 if the new kernel stack is in the
same segment as the old kernel stack, since entry 2 should already be
correct.  However, when we start up a secondary cpu, it calls
slb_initialize, which doesn't set up entry 2.  This is correct for
the boot cpu, where we will be using a stack in the kernel BSS at this
point (i.e. init_thread_union), but not necessarily for secondary
cpus, whose initial stack can be allocated anywhere.  This doesn't
cause any immediate problem since the SLB miss handler will just
create an SLB entry somewhere else to cover the initial stack.

In fact it's possible for the cpu to go quite a long time without SLB
entry 2 being valid.  Eventually, though, the entry created by the SLB
miss handler will get overwritten by some other entry, and if the next
access to the stack is at an unrecoverable point, we get the crash.

This fixes the problem by making slb_initialize create a suitable
entry for the kernel stack, if we are on a secondary cpu and the stack
isn't covered by SLB entry 0.  This requires initializing the
get_paca()->kstack field earlier, so I do that in smp_create_idle
where the current field is initialized.  This also abstracts a bit of
the computation that mk_esid_data in slb.c does so that it can be used
in slb_initialize.
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      3b575064
  29. 01 5月, 2008 2 次提交
  31. 30 4月, 2008 3 次提交
  33. 29 4月, 2008 5 次提交