- 24 2月, 2012 3 次提交
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由 Bjorn Helgaas 提交于
Everybody uses the generic pcibios_resource_to_bus() supplied by the core now, so remove the ARCH_HAS_GENERIC_PCI_OFFSETS used during conversion. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
Tell the PCI core about host bridge address translation so it can take care of bus-to-resource conversion for us. Here's the wrinkle on Cobalt: we can't generate normal I/O port addresses on PCI because the GT-64111 doesn't do any address translation, so we have this: CPU I/O port addresses [io 0x0000-0xffffff] PCI bus I/O port addresses [io 0x10000000-0x10ffffff] Legacy-mode IDE controllers start out with the legacy bus addresses, e.g., 0x1f0, assigned by pci_setup_device(). These are outside the range of addresses GT-64111 can generate on PCI, but pcibios_fixup_device_resources() converted them to CPU addresses anyway by adding io_offset. Therefore, we had to pre-adjust them in cobalt_legacy_ide_fixup(). With io_offset = 0xf0000000, we had this: res->start = 0x1f0 initialized in pci_setup_device() res->start = 0x100001f0 -= io_offset in cobalt_legacy_ide_fixup() res->start = 0x1f0 += io_offset in pcibios_fixup_device_resources() The difference after this patch is that the generic pci_bus_to_resource() only adds the offset if the bus address is inside a host bridge window. Since 0x1f0 is not a valid bus address and is not inside any windows, it is unaffected, so we now have this: region->start = 0x1f0 initialized in pci_setup_device() res->start = 0x1f0 no offset by pci_bus_to_resource() That means we can remove both pcibios_fixup_device_resources() and cobalt_legacy_ide_fixup(). I would *rather* set the host bridge offset to zero (which corresponds to what the GT-64111 actually does), and have both CPU and PCI addresses of [io 0x10000000-0x10ffffff]. However, that would require changes to generic code that assumes legacy I/O addresses, such as pic1_io_resource ([io 0x0020-0x00021]), and we'd have to keep a Cobalt IDE fixup. Of course, none of this changes the fact that references to I/O port 0x1f0 actually go to port 0x100001f0, not 0x1f0, on the Cobalt PCI bus. Fortunately the VT82C586 IDE controller only decodes the low 24 address bits, so it does work. CC: Ralf Baechle <ralf@linux-mips.org> CC: Yoichi Yuasa <yuasa@linux-mips.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
Some architectures (alpha, mips, powerpc) have an arch-specific "pci_probe_only" flag. Others use PCI_PROBE_ONLY in pci_flags for the same purpose. This moves mips to the pci_flags approach so generic code can use the same test across all architectures. CC: Ralf Baechle <ralf@linux-mips.org> CC: linux-mips@linux-mips.org Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 05 8月, 2010 1 次提交
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由 Chandrakala Chavva 提交于
MSI-X interrupts are not supported yet for Octeon, return error if MSI-X interrupts are requested by driver so that the driver will fall back to use MSI interrupts. Signed-off-by: NChandrakala Chavva <cchavva@caviumnetworks.com> To: linux-mips@linux-mips.org Cc: David Daney <ddaney@caviumnetworks.com> Patchwork: https://patchwork.linux-mips.org/patch/1506/Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
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- 13 3月, 2010 2 次提交
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由 FUJITA Tomonori 提交于
All the architectures properly set NEED_DMA_MAP_STATE now so we can safely add linux/pci-dma.h to linux/pci.h and remove the linux/pci-dma.h inclusion in arch's asm/pci.h Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: NArnd Bergmann <arnd@arndb.de> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 FUJITA Tomonori 提交于
Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 10 9月, 2009 1 次提交
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由 Alex Chiang 提交于
This was #define'd as 0 on all platforms, so let's get rid of it. This change makes pci_scan_slot() slightly easier to read. Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Tony Luck <tony.luck@intel.com> Cc: David Howells <dhowells@redhat.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Jeff Dike <jdike@addtoit.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Reviewed-by: NMatthew Wilcox <willy@linux.intel.com> Acked-by: NRussell King <linux@arm.linux.org.uk> Acked-by: NRalf Baechle <ralf@linux-mips.org> Acked-by: NKyle McMartin <kyle@mcmartin.ca> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NPaul Mundt <lethal@linux-sh.org> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NAlex Chiang <achiang@hp.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 18 6月, 2009 1 次提交
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由 Matthew Wilcox 提交于
This function was only used by pci_claim_resource(), and the last commit deleted that use. Signed-off-by: NMatthew Wilcox <willy@linux.intel.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 10 12月, 2008 1 次提交
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由 Ralf Baechle 提交于
Certain X11 servers such as the SIS server will only work if PCI mmap is implemented. This patch implements PCI mmap but to be on the same side so close to a release it only supports uncached mappings so performance will not be optimal for some uses such as framebuffers. Thanks to Zhang Le <r0bertz@gentoo.org> for the original report and testing. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 11 10月, 2008 1 次提交
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 31 7月, 2008 1 次提交
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由 Atsushi Nemoto 提交于
Introduce pcibios_plat_setup for platform-specific pcibios_setup. Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 20 7月, 2008 1 次提交
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由 Dmitri Vorobiev 提交于
The pcibios_max_latency variable is needlessly defined global, and this patch makes it static. Build-tested using malta_defconfig. Signed-off-by: NDmitri Vorobiev <dmitri.vorobiev@movial.fi> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 16 7月, 2008 1 次提交
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由 Atsushi Nemoto 提交于
Declare pci_probe_only, etc. in asm-mips/pci.h file. This will fix some sparse warnings. Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 12 10月, 2007 1 次提交
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由 Ralf Baechle 提交于
The cost is just too low. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 12 7月, 2007 2 次提交
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由 Jan Beulich 提交于
Based on replies to a respective query, remove the pci_dac_dma_...() APIs (except for pci_dac_dma_supported() on Alpha, where this function is used in non-DAC PCI DMA code). Signed-off-by: NJan Beulich <jbeulich@novell.com> Cc: Andi Kleen <ak@suse.de> Cc: Jesse Barnes <jesse.barnes@intel.com> Cc: Christoph Hellwig <hch@infradead.org> Acked-by: NDavid Miller <davem@davemloft.net> Cc: Jeff Garzik <jeff@garzik.org> Cc: <linux-arch@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Michael Ellerman 提交于
I'm not sure if this is going to fly, weak symbols work on the compilers I'm using, but whether they work for all of the affected architectures I can't say. I've cc'ed as many arch maintainers/lists as I could find. But assuming they do, we can use a weak empty definition of pcibios_add_platform_entries() to avoid having an empty definition on every arch. Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 11 7月, 2007 1 次提交
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由 Ralf Baechle 提交于
This is to break the code of people who think they are supposed to scribble into the pci device structure - it's off limits. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 19 2月, 2007 1 次提交
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由 Ralf Baechle 提交于
This implementation has support for the concept of one separate ioport address space by PCI domain. A pointer to the virtual address where the port space of a domain has been mapped has been added to struct pci_controller and systems should be fixed to fill in this value. For single domain systems this will be the same value as passed to set_io_port_base(). Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 11 12月, 2006 1 次提交
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 26 4月, 2006 1 次提交
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由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 30 10月, 2005 2 次提交
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由 Andrew Isaacson 提交于
PCI support code for PLX 7250 PCI-X tunnel on BCM91480B BigSur board. Signed-Off-By: NAndy Isaacson <adi@broadcom.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 05 9月, 2005 3 次提交
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由 Yoichi Yuasa 提交于
This patch has added pcibios_bus_to_resource to MIPS. Signed-off-by: NYoichi Yuasa <yuasa@hh.iij4u.or.jp> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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由 Yoichi Yuasa 提交于
Add pcibios_select_root to MIPS. Signed-off-by: NYoichi Yuasa <yuasa@hh.iij4u.or.jp> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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由 Ralf Baechle 提交于
Fix the MIPS coherency configuration such that we always keep the mapping state in <asm/pci.h> when we need to on non-coherent platforms. Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 12 7月, 2005 1 次提交
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由 David Shaohua Li 提交于
http://bugme.osdl.org/show_bug.cgi?id=4016Written-by: NDavid Shaohua Li <shaohua.li@intel.com> Acked-by: NAdam Belay <abelay@novell.com> Signed-off-by: NLen Brown <len.brown@intel.com>
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- 28 6月, 2005 2 次提交
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由 Andrew Morton 提交于
With CONFIG_PCI=n: In file included from include/linux/pci.h:917, from lib/iomap.c:6: include/asm/pci.h:104: warning: `enum pci_dma_burst_strategy' declared inside parameter list include/asm/pci.h:104: warning: its scope is only this definition or declaration, which is probably not what you want. include/asm/pci.h: In function `pci_dma_burst_advice': include/asm/pci.h:106: dereferencing pointer to incomplete type include/asm/pci.h:106: `PCI_DMA_BURST_INFINITY' undeclared (first use in this function) include/asm/pci.h:106: (Each undeclared identifier is reported only once include/asm/pci.h:106: for each function it appears in.) make[1]: *** [lib/iomap.o] Error 1 Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 David S. Miller 提交于
After seeing, at best, "guesses" as to the following kind of information in several drivers, I decided that we really need a way for platforms to specifically give advice in this area for what works best with their PCI controller implementation. Basically, this new interface gives DMA bursting advice on PCI. There are three forms of the advice: 1) Burst as much as possible, it is not necessary to end bursts on some particular boundary for best performance. 2) Burst on some byte count multiple. A DMA burst to some multiple of number of bytes may be done, but it is important to end the burst on an exact multiple for best performance. The best example of this I am aware of are the PPC64 PCI controllers, where if you end a burst mid-cacheline then chip has to refetch the data and the IOMMU translations which hurts performance a lot. 3) Burst on a single byte count multiple. Bursts shall end exactly on the next multiple boundary for best performance. Sparc64 and Alpha's PCI controllers operate this way. They disconnect any device which tries to burst across a cacheline boundary. Actually, newer sparc64 PCI controllers do not have this behavior. That is why the "pdev" is passed into the interface, so I can add code later to check which PCI controller the system is using and give advice accordingly. Signed-off-by: NDavid S. Miller <davem@davemloft.net> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 17 4月, 2005 1 次提交
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由 Linus Torvalds 提交于
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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