Add the platform bits which are required to support SPI controllers.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add support for clock instances for each spi controller.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NJaswinder Singh <jaswinder.singh@linaro.org>
[kgene.kim@samsung.com: changed the name of clk for consensus]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add the platform bits which are required to support SPI controllers.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The sclk_spi clock is derived currently from the first level divider
(MMCx_RATIO) which is incorrect. The output of the first level clock
is divided by a second level divider (MMCx_PRE_RATIO), the output of
which is used as the spi bus clock (sclk_spi). Fix the clock hierarchy
issues for the sclk_spi clock.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NJaswinder Singh <jaswinder.singh@linaro.org>
[kgene.kim@samsung.com: changed the name of clk for consensus]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The platform data pointer that is passed to the spi gpio setup functions
is not used. Hence, this parameter is removed from all the spi gpio setup
functions.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NJaswinder Singh <jaswinder.singh@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Platform data is used to specify controller hardware specific information
such as the tx/rx fifo level mask and bit offset of rx fifo level. Such
information is not suitable to be supplied from device tree. Instead,
it can be moved into the driver data and removed from platform data.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NJaswinder Singh <jaswinder.singh@linaro.org>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Commit ca1d72f0 ('PM / Domains: Make it possible to add devices to
inactive domains') introduced possibility to add devices to inactive
power domains and added pm_genpd_dev_need_restore() function which lets
platform core to notify power domain core that the specified device must
be restored (with its runtime_resume() callback) before first use.

This patch adds the pm_genpd_dev_need_restore() call what brings back
the suspend/resume behaviour for the client devices known from the
previous power domain driver (removed by commit 91cfbd4e - 'ARM:
EXYNOS: Hook up power domains to generic power domain infrastructure').
Client device drivers relay on that suspend/resume behaviour, thus this
patch fixes runtime pm operation for client devices.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Some bootloaders disable unused power domains to reduce power
consuption. Power domain driver can easily read the actual state from
the hardware registers instead of assuming that their initial state is
always 'on'.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Commit 20ef9e08 ("ARM: EXYNOS: Support DMA for EXYNOS5250 SoC")
renamed EXYNOS4_DEV_DMA to EXYNOS_DEV_DMA. But some machine entries
still had EXYNOS4_DEV_DMA. Changed them to EXYNOS_DEV_DMA.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds function for suspend and resume of Exynos5250.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
[kgene.kim@samsung.com: re-worked on top of v3.4-rc7]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds clock register list for save and restore. When system
enter suspend mode and wakeup from suspend mode, All clock register is
reset.  So critical register should be saved and reset.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
[kgene.kim@samsung.com: re-worked on top of v3.4-rc7]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds pmu table setting feature for EXYNOS5250.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
[kgene.kim@samsung.com: re-worked on top of v3.4-rc7]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch changes the function name of pmc. to support new
EXYNOS SoCs commonly.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch removes GIC save & restore functino in pm.c. Because when
enalbe CPU_PM feature, GIC driver execute save and restore function
in CPU_PM notifier.
So it is not needed to GIC save & restore function at pm.c file.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

irq_of_parse_and_map does not have an empty definition for the
!CONFIG_OF case, so we should not try to call it then:

arch/arm/mach-exynos/common.c: In function 'combiner_init':
arch/arm/mach-exynos/common.c:576:3: warning: implicit declaration of function 'irq_of_parse_and_map'
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This patch adds platform data for using S3C-HSOTG driver at
Universal_C210 target.
Signed-off-by: NLukasz Majewski <l.majewski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds hsotg device to the NURI board.
Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
[Rebased on the newest git/kgene/linux-samsung #for-next]
Signed-off-by: NLukasz Majewski <l.majewski@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch supports to control usb otg phy of EXYNOS4210.
Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
[Rebased on the newest git/kgene/linux-samsung #for-next]
Signed-off-by: NLukasz Majewski <l.majewski@samsung.com>
[kgene.kim@samsung.com: squashed 2 patches together]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Use AUXDATA to set the device names for controller instances
discovered from device tree.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add device tree based instantiation of the interrupt combiner controller.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add irq_domain support for hardware interrupts of the interrupt combiner.
The hardware interrupts of all the instances of the combiner are grouped
in a single irq_domain.

Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

A seperate bus_type instance is not required for EXYNOS5. The
existing bus_type instance used with EXYNOS4 is sufficient for
both EXYNOS4 and EXYNOS5. This also solves issue of uninitialized
usage of exynos4_subsys in EXYNOS4 power management code that is
reused for EXYNOS5 also. In addition to that, the existing
exynos4_subsys bus_type is renamed to exynos_subsys to indicate
that it is reused on both EXYNOS4 and EXYNOS5 platforms.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The fout clock of BPLL and MPLL have a selectable source on EXYNOS5250.
The clock options are a fixed divided by 2 clock and the output of the
PLL itself. Add support for these new clock instances.
Signed-off-by: NKisoo Yu <ksoo.yu@samsung.com>
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
[kgene.kim@samsung.com: moved common pll stuff into s5p-clock.c]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add GPC4 bank instance which is included in rev1 of EXYNOS5.
Signed-off-by: NSangsu Park <sangsu4u.park@samsung.com>
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Redefine IRQ_MCT_L0,1 irq definition as it is changed in rev1 of EXYNOS5.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Adapt to changes in GIC physical address in rev1 of EXYNOS5.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add watchdog timer clock instance for EXYNOS5 watchdog controller.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch provides the suspend/resume support for EXYNOS4412.
Signed-off-by: NInderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The naming EXYNOS4 is changed to EXYNOS for using shared SPI
config of EXYNOS4 and EXYNOS5. And S3C64XX_DEV_SPIn configs
are added to MACH_SMDK5250 config to use SPI on the EYXNOS5250.
Signed-off-by: NKyoungil Kim <ki0351.kim@samsung.com>
[kgene.kim@samsung.com: updated because of non-existing config]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

mach-exynos/dma.c is updated to support both exynos4 and exynos5.
Signed-off-by: NBoojin Kim <boojin.kim@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

It should be (1 << 2) for ctrlbit of exynos5_clk_pdma1.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Commit 069d4e74 ("ARM: EXYNOS4: Remove clock event timers using
ARM private timers") removed support for local timers and forced
to use MCT as event source. However MCT is not operating properly
on early revision of EXYNOS4 SoCs. All UniversalC210 boards are
based on it, so that commit broke support for it. This patch
provides a workaround that enables UniversalC210 boards to boot
again. s5p-timer is used as an event source, it works only for
non-SMP builds.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Enable FIMC 0,1,2,3 and media device (md) support on SMDK4X12 boards.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

MFC (multi-format codec) device is added to SMDK4212 and SMDK4412 boards.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

DRM core device and FIMD DRM platform device support is added to SMDKV310 board.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

DRM core device and FIMD DRM platform device support is added to Origen board.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Adds missing storage class static to origen_bt_pdata structure.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch enables core cpuidle timekeeping and irq enabling and
remove those redundant parts from the exynos cpuidle drivers
Signed-off-by: NAmit Daniel <amit.kachhap@linaro.org>
Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: NRobert Lee <rob.lee@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>