- 28 2月, 2013 2 次提交
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由 Arnd Bergmann 提交于
The original device tree binding for this driver, from Viresh Kumar unfortunately conflicted with the generic DMA binding, and did not allow to completely seperate slave device configuration from the controller. This is an attempt to replace it with an implementation of the generic binding, but it is currently completely untested, because I do not have any hardware with this particular controller. The patch applies on top of the slave-dma tree, which contains both the base support for the generic DMA binding, as well as the earlier attempt from Viresh. Both of these are currently not merged upstream however. This version incorporates feedback from Viresh Kumar, Andy Shevchenko and Russell King. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Acked-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Vinod Koul <vinod.koul@linux.intel.com> Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Matt Porter 提交于
Adds a dma_request_slave_channel_compat() wrapper which accepts both the arguments from dma_request_channel() and dma_request_slave_channel(). Based on whether the driver is instantiated via DT, the appropriate channel request call will be made. This allows for a much cleaner migration of drivers to the dmaengine DT API as platforms continue to be mixed between those that boot using DT and those that do not. Suggested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMatt Porter <mporter@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 20 2月, 2013 1 次提交
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由 Arnd Bergmann 提交于
This reverts commit f9965aa2. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 14 2月, 2013 15 次提交
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由 Padmavathi Venna 提交于
This patch adds #dma-cells property to PL330 DMA controller nodes for supporting generic dma dt bindings on samsung exynos5250 platform. Signed-off-by: NPadmavathi Venna <padma.v@samsung.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Padmavathi Venna 提交于
This patch registers the pl330 dma controller driver with the generic device tree dma helper functions. Signed-off-by: NPadmavathi Venna <padma.v@samsung.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Padmavathi Venna 提交于
Add xlate to translate the device-tree binding information into the appropriate format. The filter function requires the dma controller device and dma channel number as filter_params. Signed-off-by: NPadmavathi Venna <padma.v@samsung.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Padmavathi Venna 提交于
This patch adds a new pl330_dt_filter for DT case to filter the required channel based on the new filter params and modifies the old filter only for non-DT case as suggested by Arnd Bergmann. Signed-off-by: NPadmavathi Venna <padma.v@samsung.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
There is no need to assign 0 to residue, because dma_cookie_status() does this for us. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Acked-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
Accordingly to commentary in the platform_device_register_full the memory allocated for dma_mask will not going to be freed. That's why is better to assign dma_mask afterwards. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
When status is DMA_SUCCESS the residue should be zero. Otherwise it's a bug. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
In case the len is 0 we must return without trying to unlock the lock that was not locked. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
dmaengine_device_control returns -ENOSYS in case the dma driver doesn't have such functionality. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
It's possible to have an inconsistency in the list due to unprotected operation on it. The patch adds a proper locking on the list operation. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Fabio Baltieri 提交于
Fix dma_tc_handle() to call d40_desc_remove() and d40_desc_done() only for non-cyclic transfers, as this was breaking ux500_pcm since introduced in: d49278e3 dmaengine: dma40: Add support to split up large elements Reported-by: NShreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NFabio Baltieri <fabio.baltieri@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Cong Ding 提交于
The memory allocated to ofdma might be a leakage when error occurs. Signed-off-by: NCong Ding <dinggnu@gmail.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
In some cases we got the device without dma_mask configured. We have to apply the default value to avoid crashes during memory mapping. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Fengguang Wu 提交于
>> drivers/dma/ioat/dma_v3.c:371:6: sparse: symbol 'ioat3_timer_event' was not declared. Reported-by: NFengguang Wu <fengguang.wu@intel.com> Signed-off-by: NFengguang Wu <fengguang.wu@intel.com> Acked-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Vinod Koul 提交于
as requested by Rob Suggested-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 13 2月, 2013 2 次提交
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由 Dave Jiang 提交于
There is a race that can hit during __cleanup() when the ioat->head pointer is incremented during descriptor submission. The __cleanup() can clear the PENDING flag when it does not see any active descriptors. This causes new submitted descriptors to be ignored because the COMPLETION_PENDING flag is cleared. This was introduced when code was adapted from ioatdma v1 to ioatdma v2. For v2 and v3, IOAT_COMPLETION_PENDING flag will be abandoned and a new flag IOAT_CHAN_ACTIVE will be utilized. This flag will also be protected under the prep_lock when being modified in order to avoid the race. Signed-off-by: NDave Jiang <dave.jiang@intel.com> Reviewed-by: NDan Williams <djbw@fb.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Mika Westerberg 提交于
Intel Lynxpoint PCH Low Power Subsystem has DMA controller to support general purpose serial buses like SPI, I2C, and HSUART. This controller is enumerated from ACPI namespace with ACPI ID INTL9C60. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 28 1月, 2013 7 次提交
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由 Andy Shevchenko 提交于
Currently the driver returns full length of the active descriptor which is wrong. We have to go throught the active descriptor and substract the length of each sent children in the chain from the total length along with the actual data in the DMA channel registers. The cyclic case is not handled by this patch due to len field in the descriptor structure is left untouched by the original code. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
It will be useful to have the length of the transfer in the descriptor. The cyclic transfer functions remained untouched. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
By this new field we distinguish a total length of the chain and the individual length of each descriptor in the chain. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
The soft LLP mode is working for active descriptor only. So, we do not need to have a copy of its pointer. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
It's usefull to have the values of the DW_PARAMS and DWC_PARAMS printed when debug mode is enabled. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Barry Song 提交于
Just like Russell pointed out in "DMAEngine: sirf: add DMA pause/resume support" at http://www.spinics.net/lists/arm-kernel/msg212496.html here I find sirfsoc_dma_terminate_all() has same problem, so move the locking to the front of registers access. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Barry Song 提交于
pause/resume are important for users like ALSA sound drivers, this patches make the sirf prima2/marco support DMA commands DMA_PAUSE and DMA_RESUME. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 21 1月, 2013 4 次提交
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由 Vinod Koul 提交于
Pull ste_dma40 fixes from Fabio Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
The proper place for the main logic of the soft LLP mode is dwc_scan_descriptors. It prevents to get the transfer unexpectedly aborted in case the user calls dwc_tx_status. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
The driver assumes that hardware has two AHB masters which might not be always true. In such cases we must not exceed number of the AHB masters present in the hardware. In the proposed scheme in this patch, we would choose the master with highest possible number whenever we exceed max AHB masters. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
Currently descriptors are allocated from normal cacheable memory and that slows down filling the descriptors, as we need to call cache_coherency routines afterwards. It would be better to allocate memory for these descriptors from DMA_COHERENT memory. This would make code much cleaner too. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: NMika Westerberg <mika.westerberg@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 20 1月, 2013 3 次提交
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由 Cong Ding 提交于
the variable chan is dereferenced in line 635, so it is no reason to check null again in line 641. Signed-off-by: NCong Ding <dinggnu@gmail.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Cong Ding 提交于
the pointer cfg is dereferenced in line 594, so it's no reason to check null again in line 620. Signed-off-by: NCong Ding <dinggnu@gmail.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Matt Porter 提交于
The edma_slave_config() implementation depends on the direction field such that it will not properly configure a slave channel when called without direction set. This fixes the implementation so that the slave config is copied as is and prep_slave_sg() handles the direction dependent handling. spi-omap2-mcspi and omap_hsmmc both expose this bug as they configure the slave channel config from a common path with an unconfigured direction field. Signed-off-by: NMatt Porter <mporter@ti.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 14 1月, 2013 6 次提交
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由 Fabio Baltieri 提交于
Clock code was changed to use clk_prepare_enable in: b707c65 dma/ste_dma40: Fixup clock usage during probe but clk_disable on probe fail path was not updated. This patch fix this by using clk_disable_unprepare in place of clk_disable. Acked-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NFabio Baltieri <fabio.baltieri@linaro.org>
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由 Fabio Baltieri 提交于
Some DMA channels may be used by other cores in the SoC. This patch modifies the dma interrupt handler to ignore interrupts from unknown channels. Cc: Rabin Vincent <rabin.vincent@stericsson.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NFabio Baltieri <fabio.baltieri@linaro.org>
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由 Fabio Baltieri 提交于
This patch add support to manage LLI by SW for select phy channels. There is a HW issue in certain controllers due to which on certain occassions HW LLI cannot be used on some physical channels. To avoid the HW issue on a specific phy channel, the phy channel number can be added to the list of soft_lli_channels and there after all the transfers on that channel will use software LLI, for peripheral to memory transfers. SoftLLI introduces relink overhead, that could impact performace for certain use cases. This is based on a previous patch of Narayanan Gopalakrishnan. Cc: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NFabio Baltieri <fabio.baltieri@linaro.org>
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由 Fabio Baltieri 提交于
Use internal variables to the cycles to improve code readability, no functional changes. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NFabio Baltieri <fabio.baltieri@linaro.org>
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由 Fabio Baltieri 提交于
This patch contains various non functional cosmetic fixes. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NFabio Baltieri <fabio.baltieri@linaro.org>
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由 Fabio Baltieri 提交于
Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NFabio Baltieri <fabio.baltieri@linaro.org>
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