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  1. 17 11月, 2016 1 次提交
    • K
      gpio: Remove GPIO_DEVRES option · f9c22ec6
      由 Keno Fischer 提交于 
      This option was added in 6a89a314 to
allow use of the devm_gpio_* functions without CONFIG_GPIOLIB.

However, only a few months later in
b69ac524, CONFIG_GPIOLIB was added
as a dependency, defeating the original purpose of this option.
Instead of that patch, the original commit could have just been
reverted (and in fact was partially so in
403c1d0b). Further, since this
option has a dependency on HAS_IOMEM, even though it does not
require it, it causes build failures when !HAS_IOMEM (e.g. in a
uml build).

Fix that by completely removing the option, in essence completing
the reversion of the original commit.
Signed-off-by: NKeno Fischer <keno@juliacomputing.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      f9c22ec6
  3. 29 9月, 2016 1 次提交
  5. 27 9月, 2016 1 次提交
  7. 07 9月, 2016 1 次提交
  9. 31 8月, 2016 1 次提交
  11. 19 8月, 2016 1 次提交
  13. 11 8月, 2016 3 次提交
  15. 22 7月, 2016 1 次提交
  17. 07 6月, 2016 1 次提交
  19. 29 4月, 2016 1 次提交
  21. 14 4月, 2016 1 次提交
  23. 10 4月, 2016 1 次提交
  25. 16 3月, 2016 1 次提交
  27. 09 3月, 2016 1 次提交
  29. 12 2月, 2016 2 次提交
  31. 11 2月, 2016 1 次提交
    • N
      gpio: add tps65218 gpio · c366c76a
      由 Nicolas Saenz Julienne 提交于 
      Driver for the GPIO block found in ti's tps65218 pmics.

The device has two GPIOs and one GPO pin which can be configured as follows:
GPIO1:
	-general-purpose, open-drain output controlled by GPO1 user bit and/or
	 sequencer
	-DDR3 reset input signal from SOC. Signal is either latched or
	 passed-trough to GPO2 pin. See below for details.
GPO2:
	-general-purpose output controlled by GPO2 user bit
	-DDR3 reset output signal. Signal is controlled by GPIO1 and PGOOD.
	 See below for details.
	-Output buffer can be configured as open-drain or push-pull.
GPIO3:
	-general-purpose, open-drain output controlled by GPO3 user bit and/or
	 sequencer
	-reset input-signal for DCDC1 and DCDC2.

The input configurations are not meant to be used by the user so the driver
only offers GPOs.

v2: Added request routine that evaluates the fw config flags and removed module
    owner
v3: Added .direction_input() routine, and took care of all Linus Walleij
suggestions (clamp to bool, use proper include)
Signed-off-by: NNicolas Saenz Julienne <nicolassaenzj@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      c366c76a
  33. 10 2月, 2016 3 次提交
  35. 05 2月, 2016 1 次提交
  37. 28 1月, 2016 2 次提交
  39. 02 12月, 2015 1 次提交
    • A
      gpio: samsung: move gpio-samsung driver back to platform code · 0f20e456
      由 Arnd Bergmann 提交于 
      The gpio-samsung driver is special in the sense that it
interacts directly in multiple ways with the legacy platform
code for the s3c24xx and s3c64xx platforms. In contrast,
all devicetree based machines for Samsung, including the
ones on those two SoC families use a different driver.

The header files that define the interface between the platform
code and the gpio driver are not visible when building a
kernel for ARCH_MULTIPLATFORM, which prevents us from
turning on this option for s3c64xx.

To work around this, we now move the driver back into platform
code, from where it was originally moved to as part of commit
1b39d5f2 ("gpio/samsung: gpio-samsung.c to support
Samsung GPIOs").

The long-term plan for this driver would be to remove it
entirely, after all Samsung machines have been converted
over to boot from DT, but there is currently no timeline
for when that might happen.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
      0f20e456
  41. 01 12月, 2015 1 次提交
    • W
      gpio: Add GPIO support for the ACCES 104-IDI-48 · 6ddcf9b4
      由 William Breathitt Gray 提交于 
      The ACCES 104-IDI-48 family of PC/104 utility boards feature 48
individually optically isolated digital inputs. Enabled inputs feature
change-of-state detection capability; if change-of-state detection is
enabled, an interrupt is fired off if a change of input level
(low-to-high or high-to-low) is detected. Change-of-state IRQs are
enabled/disabled on 8-bit boundaries, for a total of six boundaries.

This driver provides GPIO and IRQ support for these 48 channels of
digital input. The base port address for the device may be configured
via the idi_48_base module parameter. The interrupt line number for the
device may be configured via the idi_48_irq module parameter.
Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      6ddcf9b4
  43. 27 10月, 2015 1 次提交
  45. 26 10月, 2015 1 次提交
    • Y
      gpio: driver for AMD Promontory · 6057d40f
      由 YD Tseng 提交于 
      This patch adds a new GPIO driver for AMD Promontory chip.

This GPIO controller is enumerated by ACPI and the ACPI compliant
hardware ID is AMDF030.

Change history:

v2: 1. fix coding style
    2. registers renaming
v3: 1. change include file
    2. fix coding style
    3. remove module_init/exit, add module_platform_driver
    4. remove MODULE_ALIAS
v4: 1. change TOTAL_GPIO_PINS to PT_TOTAL_GPIO
    2. remove PCI dependency in Kconfig
    3. fix subject line
Signed-off-by: NYD Tseng <Yd_Tseng@asmedia.com.tw>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      6057d40f
  47. 02 10月, 2015 2 次提交
  49. 03 9月, 2015 1 次提交
  51. 16 7月, 2015 1 次提交
  53. 10 6月, 2015 1 次提交
  55. 02 6月, 2015 1 次提交
    • G
      gpio: Add GPIO support for Broadcom STB SoCs · 3b0213d5
      由 Gregory Fong 提交于 
      This adds support for the GPIO IP "UPG GIO" used on
Broadcom STB SoCs (BCM7XXX and some others). Uses
basic_mmio_gpio to instantiate a gpio_chip for each bank.
The driver assumes that it handles the base set of GPIOs
on the system and that it can start its numbering sequence
from 0, so any GPIO expanders used with it must dynamically
assign GPIO numbers after this driver has finished
registering its GPIOs.

Does not implement the interrupt-controller portion yet,
will be done in a future commit.

v2:
- change include to use <linux/gpio/driver.h> instead of
  <linux/gpio.h>
- get rid of unnecessary imask member in struct bank
- rename GPIO_PER_BANK -> MAX_GPIO_PER_BANK
- always have 32 GPIOs per bank and add 'width' member in
  struct bank to hold actual number of GPIOs in use
- mark of_match table as const
List-usage-fixed-by: NBrian Norris <computersforpeace@gmail.com>
Signed-off-by: NGregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      3b0213d5
  57. 06 5月, 2015 1 次提交
  59. 05 5月, 2015 1 次提交
  61. 07 4月, 2015 1 次提交
  63. 28 3月, 2015 1 次提交
  65. 08 3月, 2015 1 次提交
    • T
      drivers/gpio: Altera soft IP GPIO driver · c5abbba9
      由 Tien Hock Loh 提交于 
      Adds a new driver for Altera soft GPIO IP. The driver is able to do
read/write and allows GPIO to be a interrupt controller.

Tested on Altera GHRD on interrupt handling and IO.

v10:
- Updated conflicting device tree parameters
- Removed unused headers
- Used macro instead of magic numbers for ngpio
- Code readability cleanup using ?: and temporal variables
- Removed leftover garbage and unnecessary function calls
- Checked bgpio_init but unusable because Altera GPIO may not
  be a multiple of 8 bits

v9:
- Removed duplicated initialization on set_type using temporals
  to improve code readability in calling generic_handle_irq
- Using ?: ternary to reduce code size

v8:
- Using for_each_set_bit
- Added const for struct definition
- Removed naggy pr_err
- Sort alpha header
- Remove unused macros
- Use fixed width data types instead of unsigned long
- Whitespace issue fixes
- Removed _relaxed function for better compatibility across different
  CPU
- Changed irq_create_mapping to platform_get_irq updated implementation
  to use gpiochip_irqchip_add
- Reserve interrupt-cells number 2 in device tree binding for future
  use
- Remove confusing sections on devicetree bindings
- Added tristate Kconfig help text

v7:
- Used dev_warn instead of pr_warn
- Clean up unnecesarry if else indentation

v6:
- Added irq_startup and irq_shutdown
- Changed bitwise clamping style
- Cleanup bitwise operation to improve readability change naming of
  mapped irqs from virq to mapped_irq

v5:
- Dispose irq_domain mapping correctly
- Update optional binding description in binding docs

v4:
- Added vendor prefix to devicetree binding for IP specific properties
  using MMIO GPIO helper library instead of manually map PIO to memory
- altera_gpio_chip inline struct documentation to kerneldoc
- Using dev_ print to print a better failure message

v2, v3:
- Do not reference NO_IRQ
- Updated irq_set_type to only allow the hardware configured irq type
Signed-off-by: NTien Hock Loh <thloh@altera.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      c5abbba9