- 21 6月, 2013 1 次提交
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由 Mika Westerberg 提交于
ACPI part of the driver accidentally used sizeof(*ssp) instead of the correct sizeof(*pdata). This leads to nasty memory corruptions like the one below: BUG: unable to handle kernel paging request at 0000000749fd30b8 IP: [<ffffffff813fe8a1>] __list_del_entry+0x31/0xd0 PGD 0 Oops: 0000 [#1] PREEMPT SMP Modules linked in: CPU: 0 PID: 30 Comm: kworker/0:1 Not tainted 3.10.0-rc6v3.10-rc6_sdhci_modprobe+ #443 task: ffff8801483a0940 ti: ffff88014839e000 task.ti: ffff88014839e000 RIP: 0010:[<ffffffff813fe8a1>] [<ffffffff813fe8a1>] __list_del_entry+0x31/0xd0 RSP: 0000:ffff88014839fde8 EFLAGS: 00010046 RAX: ffff880149fd30b0 RBX: ffff880149fd3040 RCX: dead000000200200 RDX: 0000000749fd30b0 RSI: ffff880149fd3058 RDI: ffff88014834d640 RBP: ffff88014839fde8 R08: ffff88014834d640 R09: 0000000000000001 R10: ffff8801483a0940 R11: 0000000000000001 R12: ffff880149fd3040 R13: ffffffff810e0b30 R14: ffff8801483a0940 R15: ffff88014834d640 FS: 0000000000000000(0000) GS:ffff880149e00000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 0000000000000168 CR3: 0000000001e0b000 CR4: 00000000001407f0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400 Stack: ffff88014839fe48 ffffffff810e0baf ffffffff81120abd ffff88014839fe20 ffff8801483a0940 ffff8801483a0940 ffff8801483a0940 ffff8801486b1c90 ffff88014834d640 ffffffff810e0b30 0000000000000000 0000000000000000 Call Trace: [<ffffffff810e0baf>] worker_thread+0x7f/0x390 [<ffffffff81120abd>] ? trace_hardirqs_on+0xd/0x10 [<ffffffff810e0b30>] ? manage_workers.isra.22+0x2b0/0x2b0 [<ffffffff810e6c09>] kthread+0xd9/0xe0 [<ffffffff810f93df>] ? local_clock+0x3f/0x50 [<ffffffff810e6b30>] ? kthread_create_on_node+0x110/0x110 [<ffffffff818c5dec>] ret_from_fork+0x7c/0xb0 [<ffffffff810e6b30>] ? kthread_create_on_node+0x110/0x110 Fix this by using the right structure size in devm_kzalloc(). Reported-by: NJerome Blin <jerome.blin@intel.com> Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NMark Brown <broonie@linaro.org> Cc: stable@vger.kernel.org # 3.9+
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- 08 4月, 2013 1 次提交
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由 Sachin Kamat 提交于
Use the newly introduced devm_ioremap_resource() instead of devm_request_and_ioremap() which provides more consistent error handling. devm_ioremap_resource() provides its own error messages; so all explicit error messages can be removed from the failure code paths. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Acked-by: NEric Miao <eric.y.miao@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 02 4月, 2013 1 次提交
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由 Rafael J. Wysocki 提交于
The ACPI handle of struct spi_master's dev member should not be set, because this causes that struct spi_master to be associated with the ACPI device node corresponding to its parent as the second "physical_device", which is incorrect (this happens during the registration of struct spi_master). Consequently, acpi_register_spi_devices() should use the ACPI handle of the parent of the struct spi_master it is called for rather than that struct spi_master's ACPI handle (which should be NULL). Make that happen and modify the spi-pxa2xx driver, which currently is the only driver for ACPI-enumerated SPI controller chips, not to set the ACPI handle for the struct spi_master it creates. Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 13 3月, 2013 1 次提交
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由 Mika Westerberg 提交于
Intel LPSS SPI controllers need to have bit 0 (disable_ssp_dma_finish) set in SSP_REG in order to properly perform DMA transfers spanning over multiple blocks. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 08 2月, 2013 6 次提交
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由 Mika Westerberg 提交于
Intel Lynxpoint PCH Low Power Subsystem has two general purpose SPI controllers that are LPSS_SSP compatible. These controllers are enumerated from ACPI namespace with ACPI IDs INT33C0 and INT33C1. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Tested-by: NLu Cao <lucao@marvell.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mika Westerberg 提交于
Intel LPSS SPI is pretty much the same as the PXA27xx SPI except that it has few additional features over the original: o FIFO depth is 256 entries o RX FIFO has one watermark o TX FIFO has two watermarks, low and high o chip select can be controlled by writing to a register The new FIFO registers follow immediately the PXA27xx registers but then there are some additional LPSS private registers at offset 1k or 2k from the base address. For these private registers we add new accessors that take advantage of drv_data->lpss_base once it is resolved. We add a new type LPSS_SSP that can be used to distinguish the LPSS devices from others. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Tested-by: NLu Cao <lucao@marvell.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mika Westerberg 提交于
This is useful when testing the functionality of the controller from userspace and there aren't any real SPI slave devices connected to the bus. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Tested-by: NLu Cao <lucao@marvell.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mika Westerberg 提交于
Drivers should put the device into low power states proactively whenever the device is not in use. Thus implement support for runtime PM and use the autosuspend feature to make sure that we can still perform well in case we see lots of SPI traffic within short period of time. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Tested-by: NLu Cao <lucao@marvell.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mika Westerberg 提交于
To be able to use DMA with this driver on non-PXA platforms we implement support for the generic DMA engine API. This lets user to use different DMA engines with little or no modification to the driver. Request lines and channel numbers can be passed to the driver from the platform specific data. The DMA engine implementation will be selected by default even on PXA platform. User can select the legacy DMA API by enabling Kconfig option CONFIG_SPI_PXA2XX_PXADMA. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Tested-by: NLu Cao <lucao@marvell.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mika Westerberg 提交于
The PXA SPI driver uses PXA platform specific private DMA implementation which does not work on non-PXA platforms. In order to use this driver on other platforms we break out the private DMA implementation into a separate file that gets compiled only when CONFIG_SPI_PXA2XX_PXADMA is set. The DMA functions are stubbed out if there is no DMA implementation selected (i.e we are building on non-PXA platform). While we are there we can kill the dummy DMA bits in pxa2xx_spi.h as they are not needed anymore for CE4100. Once this is done we can add the generic DMA engine support to the driver that allows usage of any DMA controller that implements DMA engine API. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Tested-by: NLu Cao <lucao@marvell.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 26 1月, 2013 3 次提交
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由 Mika Westerberg 提交于
Convert clk_enable() to clk_prepare_enable() and clk_disable() to clk_disable_unprepare() respectively in order to support the common clk framework. Otherwise we get warnings on the console as the clock is not prepared before it is enabled. In addition we must cache the maximum clock rate to drv_data->max_clk_rate at probe time because clk_get_rate() cannot be called in tasklet context. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mika Westerberg 提交于
The SPI core provides infrastructure for standard message queueing so use that instead of handling everything in the driver. This simplifies the driver. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mika Westerberg 提交于
Fix following warnings seen when compiling 64-bit: drivers/spi/spi-pxa2xx.c: In function ‘map_dma_buffers’: drivers/spi/spi-pxa2xx.c:384:7: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] drivers/spi/spi-pxa2xx.c:384:40: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] drivers/spi/spi-pxa2xx.c: In function ‘pxa2xx_spi_probe’: drivers/spi/spi-pxa2xx.c:1572:34: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] drivers/spi/spi-pxa2xx.c:1572:34: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] drivers/spi/spi-pxa2xx.c:1572:34: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] drivers/spi/spi-pxa2xx.c:1572:27: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 08 1月, 2013 1 次提交
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由 Mika Westerberg 提交于
The spi-pxa2xx-pci glue driver had to implement pxa_ssp_request()/free() in order to support the spi-pxa2xx platform driver. Since the ACPI enabled platforms can use the same platform driver we would need to implement pxa_ssp_request()/free() in some central place that can be shared by the ACPI and PCI glue code. Instead of doing that we can make pxa_ssp_request()/free() to be available only when CONFIG_ARCH_PXA is set. On other arches these are being stubbed out in preference to passing the ssp_device from the platform data directly. We also change the SPI bus number to be taken from ssp->port_id instead of platform device id. This way the supporting code that passes the ssp can decide the number (or it can set it to the same as pdev->id). Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 08 12月, 2012 1 次提交
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由 Grant Likely 提交于
CONFIG_HOTPLUG is going away as an option. As result the __dev* markings will be going away. Remove use of __devinit, __devexit_p, __devinitdata, __devinitconst, and __devexit. Bill Pemberton has done most of the legwork on this series. I've used his script to purge the attributes from the drivers/gpio tree. Reported-by: NBill Pemberton <wfp5p@virginia.edu> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 06 6月, 2011 1 次提交
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由 Grant Likely 提交于
Sort the SPI makefile and enforce the naming convention spi_*.c for spi drivers. This change also rolls the contents of atmel_spi.h into the .c file since there is only one user of that particular include file. v2: - Use 'spi-' prefix instead of 'spi_' to match what seems to be be the predominant pattern for subsystem prefixes. - Clean up filenames in Kconfig and header comment blocks Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NWolfram Sang <w.sang@pengutronix.de> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
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- 08 4月, 2011 1 次提交
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由 Vasily Khoruzhick 提交于
There's a race condition in stop_queue() in some drivers - if drv_data->queue is empty, but drv_data->busy is still set (or opposite situation) stop_queue will return -EBUSY. So fix loop condition to check that both drv_data->queue is empty and drv_data->busy is not set. This patch affects following drivers: pxa2xx_spi spi_bfin5xx amba-pl022 dw_spi Signed-off-by: NVasily Khoruzhick <anarsoul@gmail.com> Acked-by: NEric Miao <eric.y.miao@gmail.com> Acked-by: NMike Frysinger <vapier@gentoo.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 31 3月, 2011 1 次提交
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由 Lucas De Marchi 提交于
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>
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- 22 1月, 2011 1 次提交
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由 Grant Likely 提交于
Having conditional around the of_match_table and the of_node pointers turns out to make driver code use ugly #ifdef blocks. Drop the conditionals and remove the #ifdef blocks from the affected drivers. Also tidy up minor whitespace issues within the same hunks. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 03 12月, 2010 3 次提交
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the of_node will auto-publish devices which are added to the device tree. Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
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After all TX bytes are sent, the driver spins while the SPI core is busy and then it spins for a "short" period of time until RX bytes are available. On Sodavile the busy flag disappears pretty quick and after that it takes approx ~130ms (sometimes less but not much) until there are bytes available in the RX FIFO. This patch removes the busy loop and modifies the RX threshould so we get woken up once the remainings bytes arrived. Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>
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The SPI core on Sodaville supports chip selects. Its configuration moved into the SSSR register at bit 0 and 1. Thus Sodaville can be hooked up with up to 4 devices. This patch ensures that the bits which are otherwiese reserved are only touched on Sodaville and not on any other PXAs. Also it makes sure that the status register does not lose the CS information while clearing the ROR bit. Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>
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- 01 12月, 2010 5 次提交
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For PXA the default threshold is FIFO_DEPTH / 2. Adjust this value for CE4100. Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>
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Sodaville's SPI controller is very much the same as in PXA25x. The difference: - The RX/TX FIFO is only 4 words deep instead of 16 - No DMA support - The SPI controller offers a CS functionality Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>
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The PXA-SPI driver relies on some files / defines which are arm specific and are within the ARM tree. The CE4100 SoC which is x86 has also the SPI core. This patch moves the ssp and spi files from arm/mach-pxa and plat-pxa to include/linux where the CE4100 can access them. This move got verified by building the following defconfigs: cm_x2xx_defconfig corgi_defconfig em_x270_defconfig ezx_defconfig imote2_defconfig pxa3xx_defconfig spitz_defconfig zeus_defconfig raumfeld_defconfig magician_defconfig Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>
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Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>
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This is required in case the interrupt line is shared with other devices. Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>
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- 26 11月, 2010 1 次提交
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use platform_driver_register instead of platform_driver_probe. The latter only checks available devices at the time of calling. So if a device gets inserter at a later point in time then the driver will never play with it. Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>
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- 11 5月, 2010 4 次提交
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由 Haojian Zhuang 提交于
In order to prevent code ambiguous, add namespace on functions in ssp driver. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Haojian Zhuang 提交于
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Eric Miao 提交于
No need to separate them as they should be together from the begining. Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Eric Miao 提交于
The previous definitions of SSCR0_SCR and SSCR0_SerClkDiv() prevented them being used simultaneously when supporting multiple PXA SoCs, esp. in drivers/spi/pxa2xx_spi.c, make them correct. The change from SSCR0_SerClkDiv(2) to SSCR0_SCR(2), will make the result a little bit different in pxa2xx_spi_probe(), however, since that's only used as a default initialization value, it's acceptable. Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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- 30 3月, 2010 1 次提交
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由 Tejun Heo 提交于
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: NTejun Heo <tj@kernel.org> Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
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- 16 12月, 2009 1 次提交
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由 Alexey Dobriyan 提交于
Signed-off-by: NAlexey Dobriyan <adobriyan@gmail.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 23 9月, 2009 1 次提交
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由 Antonio Ospite 提交于
Register pxa2xx_spi earlier so it can be used with cpufreq Signed-off-by: NDaniel Ribeiro <drwyrm@gmail.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Cc: David Brownell <dbrownell@users.sourceforge.net> Cc: Eric Miao <eric.y.miao@gmail.com> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Daniel Ribeiro <drwyrm@gmail.com> Cc: Samuel Ortiz <sameo@linux.intel.com> Cc: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 10 9月, 2009 1 次提交
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由 Mike Rapoport 提交于
Signed-off-by: NMike Rapoport <mike@compulab.co.il> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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- 19 6月, 2009 3 次提交
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由 Daniel Ribeiro 提交于
Commit a7bb3909 ("spi: pxa2xx_spi: introduce chipselect GPIO to simplify the common cases") introduces chipselect GPIO, and configures the CS polarity using SPI_CS_HIGH spi->mode flag. Add SPI_CS_HIGH to the allowed modes. Signed-off-by: NDaniel Ribeiro <drwyrm@gmail.com> Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 David Brownell 提交于
Move some common spi_setup() error checks into the SPI framework from the spi_master controller drivers: - Add a new "mode_bits" field to spi_master - Use that in spi_setup to validate the spi->mode value being requested. Setting this new field is now mandatory for any controller supporting more than vanilla SPI_MODE_0. - Update all spi_master drivers to: * Initialize that field * Remove current spi_setup() checks using that value. This is a net minor code shrink. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 David Brownell 提交于
Start moving some spi_setup() functionality into the SPI core from the various spi_master controller drivers: - Make that function stop being an inline; - Move two common idioms from drivers into that new function: * Default bits_per_word to 8 if that field isn't set * Issue a standardized dev_dbg() message This is a net minor source code shrink, and supports enhancments found in some follow-up patches. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 13 5月, 2009 1 次提交
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由 Daniel Ribeiro 提交于
setup() may fail before ctldata is set, causing a kernel panic on cleanup(). Signed-off-by: NDaniel Ribeiro <drwyrm@gmail.com> Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Cc: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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