1. 02 2月, 2008 9 次提交
  2. 11 1月, 2008 1 次提交
  3. 06 11月, 2007 5 次提交
  4. 24 10月, 2007 1 次提交
    • T
      jmicron: update quirk for JMB361/3/5/6 · 3a9e3a51
      Tejun Heo 提交于
      Set bits 0, 4, 5 and 7 of PCI configuration register 0x40 in the
      quirk.  This has the following effects and is recommended by the
      vendor.
      
      * Force enable of IDE channels (used to be left alone as BIOS
        configured)
      
      * Change initial phase behavior of PIO cycle such that the host pulls
        down the bus instead of tristating it.  Vendor recommends this
        setting.
      
      The above settings are better for the current generation of
      controllers and needed for the upcoming next generation.
      
      Tested on JMB363.
      Signed-off-by: NTejun Heo <htejun@gmail.com>
      Cc: Ethan Hsiao <ethanhsiao@jmicron.com>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      3a9e3a51
  5. 13 10月, 2007 3 次提交
  6. 29 9月, 2007 1 次提交
  7. 11 9月, 2007 1 次提交
  8. 23 8月, 2007 5 次提交
  9. 12 7月, 2007 3 次提交
  10. 01 6月, 2007 2 次提交
  11. 31 5月, 2007 1 次提交
  12. 12 5月, 2007 1 次提交
  13. 03 5月, 2007 1 次提交
  14. 29 4月, 2007 1 次提交
    • J
      libata/IDE: remove combined mode quirk · 8cdfb29c
      Jeff Garzik 提交于
      Both old-IDE and libata should be able handle all controllers and
      devices found using normal resource reservation methods.
      
      This eliminates the awful, low-performing split-driver configuration
      where old-IDE drove the PATA portion of a PCI device, in PIO-only mode,
      and libata drove the SATA portion of the /same/ PCI device, in DMA mode.
      Typically vendors would ship SATA hard drive / PATA optical
      configuration, which would lend itself to slow (PIO-only) CD-ROM
      performance.
      
      For Intel users running in combined mode, it is now wholly dependent on
      your driver choice (potentially link order, if you compile both drivers
      in) whether old-IDE or libata will drive your hardware.
      
      In either case, you will get full performance from both SATA and PATA
      ports now, without having to pass a kernel command line parameter.
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      8cdfb29c
  15. 27 3月, 2007 1 次提交
  16. 05 3月, 2007 1 次提交
    • E
      [PATCH] msi: sanely support hardware level msi disabling · f5f2b131
      Eric W. Biederman 提交于
      In some cases when we are not using msi we need a way to ensure that the
      hardware does not have an msi capability enabled.  Currently the code has been
      calling disable_msi_mode to try and achieve that.  However disable_msi_mode
      has several other side effects and is only available when msi support is
      compiled in so it isn't really appropriate.
      
      Instead this patch implements pci_msi_off which disables all msi and msix
      capabilities unconditionally with no additional side effects.
      
      pci_disable_device was redundantly clearing the bus master enable flag and
      clearing the msi enable bit.  A device that is not allowed to perform bus
      mastering operations cannot generate intx or msi interrupt messages as those
      are essentially a special case of dma, and require bus mastering.  So the call
      in pci_disable_device to disable msi capabilities was redundant.
      
      quirk_pcie_pxh also called disable_msi_mode and is updated to use pci_msi_off.
      Signed-off-by: NEric W. Biederman <ebiederm@xmission.com>
      Cc: Michael Ellerman <michael@ellerman.id.au>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Greg KH <greg@kroah.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      f5f2b131
  17. 02 3月, 2007 2 次提交
    • T
      ahci/pata_jmicron: match class not function number · e34bb370
      Tejun Heo 提交于
      Make jmiron_ata quirk update pdev->class after programming the device
      and update ahci and pata_jmicron such that they match class code
      instead of checking function number manually.  For ahci, it matches
      for vendor and class.  For pata_jmicron, it matches vendor, device and
      class as IDE class isn't as well defined as AHCI class.
      
      This makes jmicron device matching more conventional and script
      friendly.
      Signed-off-by: NTejun Heo <htejun@gmail.com>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      e34bb370
    • T
      jmicron ATA: reimplement jmicron ATA quirk · 5ee2ae7f
      Tejun Heo 提交于
      Reimplement jmicron ATA quirk.
      
      * renamed to quirk_jmicron_ata()
      * quirk is invoked only for the affected controllers
      * programming is stricter.  e.g. conf5 bit24 is cleared if
        unnecessary.
      * code factored for readability
      * JMB360 and JMB368 are programmed into proper mode
      
      Verified on JMB360, 363 and 368.
      Signed-off-by: NTejun Heo <htejun@gmail.com>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      5ee2ae7f
  18. 10 2月, 2007 1 次提交